On the topographic and optical properties of SiC/SiO2 surfaces

The roughness of the semiconductor surface substantially influences properties of the whole structure, especially when thin films are created. In our work 3C SiC, 4H SiC and Si/a-SiC:H/SiO₂ structures treated by various oxidation a passivation procedures are studied by atomic force microscopy (AFM) and scanning tunnelling microscopy (STM). Surface roughness properties are studied by fractal geometry methods. The complexity of the analysed surface is sensitive to the oxidation and passivation steps and the proposed fractal complexity measure values enable quantification of the fine surface changes. We also determined the optical properties of oxidized and passivated samples by using visual modelling and stochastic optimization.      

Nitric acid oxidation of Si (NAOS) method for low temperature fabrication of SiO2/Si and SiO2/SiC structures

We have developed low temperature formation methods of SiO₂/Si and SiO₂/SiC structures by use of nitric acid, i.e., nitric acid oxidation of Si (or SiC) (NAOS) methods. By use of the azeotropic NAOS method (i.e., immersion in 68 wt% HNO₃ aqueous solutions at 120 °C), an ultrathin (i.e., 1.3-1.4 nm) SiO₂ layer with a low leakage current density can be formed on Si. The leakage current density can be further decreased by post-metallization anneal (PMA) at 200 °C in hydrogen atmosphere, and consequently the leakage current density at the gate bias voltage of 1 V becomes 1/4-1/20 of that of an ultrathin (i.e., 1.5 nm) thermal oxide layer usually formed at temperatures between 800 and 900 °C. The low leakage current density is attributable to (i) low interface state density, (ii) low SiO₂ gap-state density, and (iii) high band discontinuity energy at the SiO₂/Si interface arising from the high atomic density of the NAOS SiO₂ layer.For the formation of a relatively thick (i.e., ≥10 nm) SiO₂ layer, we have developed the two-step NAOS method in which the initial and subsequent oxidation is performed by immersion in ∼40 wt% HNO₃ and azeotropic HNO₃ aqueous solutions, respectively. In this case, the SiO₂ formation rate does not depend on the Si surface orientation. Using the two-step NAOS method, a uniform thickness SiO₂ layer can be formed even on the rough surface of poly-crystalline Si thin films. The atomic density of the two-step NAOS SiO₂ layer is slightly higher than that for thermal oxide. When PMA at 250 °C in hydrogen is performed on the two-step NAOS SiO₂ layer, the current-voltage and capacitance-voltage characteristics become as good as those for thermal oxide formed at 900 °C.A relatively thick (i.e., ≥10 nm) SiO₂ layer can also be formed on SiC at 120 °C by use of the two-step NAOS method. With no treatment before the NAOS method, the leakage current density is very high, but by heat treatment at 400 °C in pure hydrogen, the leakage current density is decreased by approximately seven orders of magnitude. The hydrogen treatment greatly smoothens the SiC surface, and the subsequent NAOS method results in the formation of an atomically smooth SiO₂/SiC interface and a uniform thickness SiO₂.     

Study of density of interface states in MOS structure with ultrathin NAOS oxide

The quality of the interface region in a semiconductor device and the density of interface states (DOS) play important roles and become critical for the quality of the whole device containing ultrathin oxide films. In the present study the metal-oxide-semiconductor (MOS) structures with ultrathin SiO₂ layer were prepared on Si(100) substrates by using a low temperature nitric acid oxidation of silicon (NAOS) method. Carrier confinement in the structure produces the space quantization effect important for localization of carriers in the structure and determination of the capacitance. We determined the DOS by using the theoretical capacitance of the MOS structure computed by the quantum mechanical approach. The development of the density of SiO₂/Si interface states was analyzed by theoretical modeling of the C-V curves, based on the superposition of theoretical capacitance without interface states and additional capacitance corresponding to the charges trapped by the interface states. The development of the DOS distribution with the passivation procedures can be determined by this method.     

Imaging and spectroscopy of defects in semiconductors using aberration-corrected STEM

The distribution of single dopant or impurity atoms can dramatically alter the properties of semiconductor materials. The sensitivity to detect and localize such single atoms has been greatly improved by the development of aberration correctors for scanning transmission electron microscopes. Today, electron probes with diameters well below 1 Å are available thanks to the improved electron optics. Simultaneous acquisition of image signals and electron energy-loss spectroscopy data provides means of characterization of defect structures in semiconductors with unprecedented detail. In addition to an improvement of the lateral spatial resolution, depth sensitivity is greatly enhanced because of the availability of larger probe forming angles. We report the characterization of an alternate gate dielectric interface structure. Isolated Hf atoms are directly imaged within a SiO₂ thin film formed between an HfO₂ layer and the silicon substrate. Electron energy-loss spectroscopy shows significant changes of the silicon valence state across the interface structure.     

Properties of thick SiO2/Si structure formed at 120 °C by use of two-step nitric acid oxidation method

Thick (i.e., ∼10 nm) SiO₂/Si structure has been formed at 121 °C by immersion of Si in relatively low concentration HNO₃ followed by that in 68 wt.% HNO₃ (i.e., two-step nitric acid (HNO₃) oxidation method of Si, NAOS) and spectroscopic properties and electrical characteristics of the NAOS SiO₂ layers are investigated. The SiO₂ thickness strongly depends on the concentration of HNO₃ aqueous solutions employed in the initial oxidation, and it becomes the largest at the HNO₃ concentration of 40 wt.%. The MOS diodes with the ∼9 nm SiO₂ layer formed by the NAOS method possess a relatively low leakage current density (e.g., 10⁻⁸ A/cm² at the forward bias of 1 V) and it is further decreased by more than one order of magnitude by post-metallization annealing (PMA) in hydrogen at 250 °C. The good leakage characteristic is attributable to atomically flat SiO₂/Si interfaces and high atomic density of 2.30-2.32 × 10²² atoms/cm³ of the NAOS SiO₂ layers. High-density interface states are present in as-prepared SiO₂ layers and they are eliminated by PMA in hydrogen.     

Passivation of defect states in Si-based and GaAs structures

Formation of defect states on semiconductor surfaces, at its interfaces with thin films and in semiconductor volumes is usually predetermined by such parameters as semiconductor growth process, surface treatment procedures, passivation, thin film growth kinetics, etc. This paper presents relation between processes leading to formation of defect states and their passivation in Si and GaAs related semiconductors and structures. Special focus is on oxidation kinetics of yttrium stabilized zirconium/SiO₂/Si and Sm/GaAs structures. Plasma anodic oxidation of yttrium stabilized zirconium based structures reduced size of polycrystalline silicon blocks localised at thin film/Si interface. Samarium deposited before oxidation on GaAs surface led to elimination of EL2 and/or ELO defects in MOS structures. Consequently, results of successful passivation of deep traps of interface region by CN⁻ atomic group using HCN solutions on oxynitride/Si and double oxide layer/Si structures are presented and discussed. By our knowledge, we are presenting for the first time the utilization of X-ray reflectivity method for determination of both density of SiO₂ based multilayer structure and corresponding roughnesses (interfaces and surfaces), respectively.     

Effect of wet-chemical substrate smoothing on passivation of ultrathin-SiO<Subscript>2</Subscript>/n-Si(111) interfaces prepared with atomic oxygen at thermal impact energies

Ultrathin SiO₂ layers for potential applications in nano-scale electronic and photovoltaic devises were prepared by exposure to thermalized atomic oxygen under UHV conditions. Wet-chemical substrate pretreatment, layer deposition and annealing processes were applied to improve the electronic Si/SiO₂ interface properties. This favourable effect of optimized wet-chemical pre-treatment can be preserved during the subsequent oxidation. The corresponding atomic-scale analysis of the electronic interface states after substrate pre-treatment and the subsequent silicon oxide layer formation is performed by field-modulated surface photovoltage (SPV), atomic force microscopy (AFM) and spectroscopic ellipsometry in the ultraviolet and visible region (UV-VIS-SE).     

Effect of a change in the intermediate layer accompanying deposition of metal on the electrophysical properties of a metal-semiconductor contact

Comparative studies, by the method of IR spectroscopy, of the reflection-absorption properties of oxide layers and the electrophysical characteristics of Ti-SiO_x-Si contacts were performed. It is shown that electron-beam deposition of Ti on a heated SiO_x-Si substrate gives a thinner layer of silicon oxide and leads to the formation of titanium oxide at the interface. The changes observed, based on the IR spectra, in the properties of the oxide layers as a function of the substrate temperature and the method of oxidation permit drawing conclusions regarding the predominant mechanisms for the passage of majority and minority charge carriers in the contact.Translated from Izvestiya Vysshikh Uchebnykh Zavedenii, Fizika, No. 9, pp. 86–90, September, 1988.     

Low temperature fabrication of 5-10 nm SiO2/Si structure using advanced nitric acid oxidation of silicon (NAOS) method

We have developed the advanced nitric acid oxidation of Si (NAOS) method to form relatively thick (5-10 nm) SiO₂/Si structure with good electrical characteristics. This method simply involves immersion of Si in 68 wt% nitric acid aqueous solutions at 120 °C with polysilazane films. Fourier transform infrared absorption (FT-IR) measurements show that the atomic density of the NAOS SiO₂ layer is considerably high even without post-oxidation anneal (POA), i.e., 2.28 × 10²² atoms/cm², and it increases by POA at 400 °C in wet-oxygen (2.32 × 10²² atoms/cm²) or dry-oxygen (2.30 × 10²² atoms/cm²). The leakage current density is considerably low (e.g., 10⁻⁵ A/cm² at 8 MV/cm) and it is greatly decreased (10⁻⁸ A/cm² at 8 MV/cm) by POA at 400 °C in wet-oxygen. POA in wet-oxygen increases the atomic density of the SiO₂ layer, and decreases the density of oxide fixed positive charges.     

Layer uniformity in glucose oxidase immobilization on SiO2 surfaces

The goal of this work was the characterization, step by step, of the enzyme glucose oxidase (GOx) immobilization on silicon oxide surfaces, mainly by means of X-Ray photoelectron spectroscopy (XPS). The immobilization protocol consists of four steps: oxide activation, silanization, linker molecule deposition and GOx immobilization. The linker molecule, glutaraldehyde (GA) in this study, must be able to form a uniform layer on the sample surface in order to maximize the sites available for enzyme bonding and achieve the best enzyme deposition. Using a thin SiO₂ layer grown on Si wafers and following the XPS Si2p signal of the Si substrate during the immobilization steps, we demonstrated both the glutaraldehyde layer uniformity and the possibility to use XPS to monitor thin layer uniformity. In fact, the XPS substrate signal, not shielded by the oxide, is suppressed only when a uniform layer is deposited. The enzyme correct immobilization was monitored using the XPS C1s and N1s signals. Atomic force microscopy (AFM) measurements carried out on the same samples confirmed the results.     

Physical and mechanical properties of silicon near the SiO2/Si interface

The influence of an oxide coating on the strength characteristics of single-crystal silicon surface layers is investigated by the microindentation method. It is shown experimentally that a strengthened layer with a thickness of 0.2–0.4 μm and a microhardness of 20–35 GPa, which is two or three times as much as the microhardness of bulk single-crystal silicon, is present near the SiO₂/Si interface. The thickness and microhardness of this layer depends on the growth conditions of the oxide. The formation of this layer is most probably caused by interstitial silicon atoms formed near the SiO₂/Si interface during silicon oxidation.     

Positioning of cationic silver nanoparticle by using AFM lithography and electrostatic interaction

One-dimensional metal lines of silver nanoparticles with a nano-sized width were generated onto silicon surface by using a nano-level lithography technique, field induced oxidation (FIO) by AFM, on self-assembled monolayer-modified Si wafers. This FIO technique provided SiO₂ lines a width of less than 100 nm. Short-time immersion of partially anodized silicon surface which is covered by a cationic silanol surfactant ((CH₃O)₃SiCH₂CH₂CH₂N(CH₃)₃⁺Cl⁻)-monolayer into quaternary ammonium (HSCH₂CH₂N(CH₃)₃⁺Br⁻)-covered silver nanoparticles readily and reproducibly gave nano-metal lines of silver onto silicon wafers. Hydrophilicity of the whole wafer surface was indispensable for homogeneously wetting the anodized SiO₂ area with a nanodimensional width.     

New fabrication of a strained Si/Si1−yGey dual channel on a relaxed Si1−xGex virtual substrate using a Ge-rich layer formed by oxidation

This paper presents a new method of forming a Si/SiGe dual channel on a Si_0.8Ge_0.2 virtual substrate. Generally, in a CMOS process using a Si/SiGe dual channel, due to several processes involving ion-implantation, annealing and dry-etching after the deposition of the Si/SiGe dual channel, the surface can be damaged, leading to reduced electrical properties. However, if the dual channel is formed during a specific stage of the CMOS process, the defects of the dual channel can be reduced and the thermal stability will be excellent. Therefore, in this paper, a method for minimizing the defects of the dual channel is presented. This method uses the segregation of the Ge in the oxidation process of a SiGe. A Si/SiGe dual channel formed using this method achieved results that were identical to a dual channel deposited using the chemical vapor deposition (CVD) method.     

Microstructure and dielectric properties of La2O3 doped amorphous SiO2 films as gate dielectric material

As a potential gate dielectric material, the La₂O₃ doped SiO₂ (LSO, the mole ratio is about 1:5) films were fabricated on n-Si (0 0 1) substrates by using pulsed laser deposition technique. By virtue of several measurements, the microstructure and electrical properties of the LSO films were characterized. The LSO films keep the amorphous state up to a high annealing temperature of 800 °C. From HRTEM and XPS results, these La atoms of the LSO films do not react with silicon substrate to form any La-compound at interfacial layer. However, these O atoms of the LSO films diffuse from the film toward the silicon substrate so as to form a SiO₂ interfacial layer. The thickness of SiO₂ layer is only about two atomic layers. A possible explanation for interfacial reaction has been proposed. The scanning electron microscope image shows the surface of the amorphous LSO film very flat. The LSO film shows a dielectric constant of 12.8 at 1 MHz. For the LSO film with thickness of 3 nm, a small equivalent oxide thickness of 1.2 nm is obtained. The leakage current density of the LSO film is 1.54 × 10⁻⁴ A/cm² at a gate bias voltage of 1 V.     

Electronic structure and topography of annealed SrTiO3(1 1 1) surfaces studied with MIES and STM

Perovskites of ABO₃ type like strontium titanate (SrTiO₃) are of great practical concern as materials for oxygen sensors operating at high temperatures. It is well known that the surface layer shows different properties compared to the bulk. Numerous studies exist for the SrTiO₃(1 0 0) and (1 1 0) surfaces which have investigated the changes in the electronic structure and topography as a function of the preparation conditions. They have indicated a rather complex behaviour of the surface and the near surface region of SrTiO₃ at elevated temperatures. Up to now, the behaviour of the SrTiO₃(1 1 1) surfaces under thermal treatment is not sufficiently known. This contribution is intended to work out the relation between alteration of the surface topography with respect to the preparation conditions and the simultaneous changes of the electronic structure. We applied scanning tunneling microscopy (STM) to investigate the surface topography and, additionally, metastable impact electron spectroscopy (MIES) to study the surface electronic structure of reconstructed SrTiO₃(1 1 1) surfaces. The crystals were heated up to 1000 °C under reducing and oxidizing conditions. Both preparation conditions cause strong changes of the surface topography and electronic structure. A microfaceting of the topmost layers is found.     

Refractive index of silicon oxide surface films determined by polarization method of photomagnetoelectric investigation

The polarization method of photomagnetoelectric investigation was used for determining values of refractive indexes of SiO₂ surface layers. This method of investigation is complementary to ellipsometry. It is based on measurements of intensity of variously polarized radiation which enters semiconductor sample through the investigated surface layer. The SiO₂ layers were obtained by thermal oxidation of 〈111〉 and 〈100〉 oriented silicon in different gases     

Role of masking oxide on the silicon surface on defect formation in SIMOX structures

The properties of Si/SiO₂ structures produced by oxygen implantation into silicon (SIMOX technology) are investigated by the high-frequency C-V method and by the electroluminescence (EL) method. The existence of electrically active and luminescence centers in the oxide layer near the interface is established. The effect of a SiO₂ masking layer on the silicon surface on defect formation in the SIMOX structure is elucidated. The dependence of the concentration of the electrically active and luminescence centers on the thickness of the masking layer is found.     

On interface properties of ultra-thin and very-thin oxide/a-Si:H structures prepared by oxygen based plasmas and chemical oxidation

Amorphous hydrogenated silicon (a-Si:H) belongs still to most promising types of semiconductors for its utilization in fabrication of TFTs and thin film solar cell technology due to corresponding cheap a-Si:H-based device production in comparison with, e.g. crystalline silicon (c-Si) technologies. The contribution deals with both two important modes of preparation of very-thin and ultra-thin silicon dioxide films in the surface region of a-Si:H semiconductor (oxygen plasma sources and liquid chemical methods) and electrical, optical and structural properties of produced oxide/semiconductor structures, respectively. Dominant aim is focused on investigation of oxide/semiconductor interface properties and their comparison and evaluation from view of utilization of used technological modes in the nanotechnological industry. Following three basic types of oxygen plasma sources were used for the first time in our laboratories for treatments of surfaces of a-Si:H substrates: (i) inductively coupled plasma in connection with its applying at plasma anodic oxidation; (ii) rf plasma as the source of positive oxygen ions for plasma immersion ion implantation process; (iii) dielectric barrier discharge ignited at high pressures.The liquid chemical manner of formation SiO₂/a-Si:H structures uses 68 wt% nitric acid aqueous solutions (i.e., azeotropic mixture with water). Their application in crystalline Si technologies has been presented with excellent results in the formation of ultra-thin SiO₂/c-Si structures [H. Kobayashi, M. Asuha, H.I. Takahashi, J. Appl. Phys. 94 (2003) 7328].Passivation of surface and interface states by liquid cyanide treatment is additional original technique applied after (or before) formation of almost all formed thin film/a-Si:H structures. Passivation process should be used if high-quality electronical parameters of devices can be reached.     

Nanostructuring Si surface and Si/SiO2 interface using porous-alumina-on-Si template technology. Electrical characterization of Si/SiO2 interface

In this work, anodic porous alumina thin films with pores in the nanometer range are grown on silicon by electrochemistry and are used as masking material for the nanopatterning of the silicon substrate. The pore diameter and density are controlled by the electrochemical process. Through the pores of the alumina film chemical oxidation of the silicon substrate is performed, leading to the formation of regular arrays of well-separated stoichiometric silicon dioxide nanodots on silicon, with a density following the alumina pores density and a diameter adjustable by adjusting the chemical oxidation time. The alumina film is dissolved chemically after the SiO₂ nanodots growth, revealing the arrays of silicon dioxide dots on silicon. In a next step, the nanodots are also removed, leaving a nanopatterned bare silicon surface with regular arrays of nanopits at the footprint of each nanodot. This silicon surface structuring finds interesting applications in nanoelectronics. One such application is in silicon nanocrystals memories, where the structuring of the oxidized silicon surface leads to the growth of discrete silicon nanocrystals of uniform size. In this work, we examine the electrical quality of the Si/SiO₂ interface of a nanostructured oxidized silicon surface fabricated as above and we find that it is appropriate for electronic applications (an interface trap density below 1–3×10¹⁰ eV⁻¹ cm⁻² is obtained, indicative of the high quality of the thermal silicon oxide).     

Interfaces analysis of the HfO2/SiO2/Si structure

The physical and chemical properties of the HfO₂/SiO₂/Si stack have been analyzed using cross-section HR TEM, XPS, IR-spectroscopy and ellipsometry. HfO₂ films were deposited by the MO CVD method using as precursors the tetrakis 2,2,6,6 tetramethyl-3,5 heptanedionate hafnium—Hf(dpm)₄ and dicyclopentadienil-hafnium-bis-diethylamide—Сp₂Hf(N(C₂H₅)₂)₂.The amorphous interface layer (IL) between HfO₂ and silicon native oxide has been observed by the HRTEM method. The interface layer comprises hafnium silicate with a smooth varying of chemical composition through the IL thickness. The interface layer formation occurs both during HfO₂ synthesis, and at the annealing of the HfO₂/SiO₂/Si stack. It was concluded from the XPS, and the IR-spectroscopy that the hafnium silicate formation occurs via a solid-state reaction at the HfO₂/SiO₂ interface, and its chemical structure depends on the thickness of the SiO₂ underlayer.