Design considerations for 1.06-/spl mu/m InGaAsP-InP Geiger-mode avalanche photodiodes

For Geiger-mode avalanche photodiodes, the two most important performance metrics for most applications are dark count rate (DCR) and photon detection efficiency (PDE). In 1.06-/spl mu/m separate-absorber-avalanche (multiplier) InP-based devices, the primary sources of dark counts are tunneling through defect levels in the InP avalanche region and thermal generation in the InGaAsP absorber region. PDE is the probability that a photon will be absorbed (quantum efficiency) times the probability that the electron-hole pair generated will actually cause an avalanche. A device model based on experimental data that can simultaneously predict DCR and PDE as a function of overbias and temperature is presented. This model has been found useful in predicting changes in performance as various device parameters, such as avalanche layer thickness, are modified. This has led to designs that are capable simultaneously of low DCR and high PDE.     

Design and performance of an InGaAs-InP single-photon avalanche diode detector

This paper describes the design, fabrication, and performance of planar-geometry InGaAs-InP devices which were specifically developed for single-photon detection at a wavelength of 1550 nm. General performance issues such as dark count rate, single-photon detection efficiency, afterpulsing, and jitter are described.     

Delta-doped avalanche photodiodes for high bit-rate lightwavereceivers

The authors estimate the GB (grain bandwidth) product limits and the noise performance of a new SAGM-APD (separate avalanche, grating, and multiplication avalanche photodiode) structure: the δ-doped SAGM-APD. It is shown that GB products in excess of 140 GHz for a 0.2-μm-thick multiplication layer and possibly larger GB products for smaller widths can be obtained. While recent calculations have predicted increased GB products for this δ-doped SAGM-APD structure, the authors explicitly prove using conventional theory that this is possible only with a concomitant increase in the multiplication noise. It is further demonstrated that it is essential to optimize the width of the multiplication layer for a given bit-rate to achieve minimum multiplication noise consistent with a GB product high enough to accommodate the requisite frequency response at the optimum gain. It is shown that the δ-doped SAGM-APD structure is a very good candidate for high bit-rate receiver applications     

Design considerations of power MOSFET for high frequencysynchronous rectification

Synchronous rectifiers used in high frequency, low output voltage applications are power MOSFETs specially designed to replace the usual output Schottky diodes in order to reduce converter losses. This paper deals with the analysis and design optimization of a synchronous rectifier suitable for applications of 1 to 10 MHz switching-mode power supplies. Three different MOSFET structures were studied and evaluated through detailed 2-dimensional device simulations. The internal parameters are optimized against three major performance factors, namely (1) the recovery time of the body diode, (2) the product of on-state resistance and input capacitance, i.e., the loss factor, and (3) the breakdown voltage of the body diode. Based on the evaluation, the UMOS structure produces the lowest RC loss factor and the shortest body diode reverse recovery. The final design optimization of the UMOS was then carried out and an optimized device is presented as the final design     

Frequency response of avalanche photodetectors with separateabsorption and multiplication layers

We present analytical expressions for the frequency response of avalanche photodetectors (APDs) with separate absorption and multiplication regions (SAM). The effect of the electric field profile in the multiplication layer on frequency response is considered for the first time. Previous theories have assumed that the multiplication layer is very thin and the peak electric field, which corresponds to the effective multiplication plane, is positioned away from the absorption layer. This is a poor assumption for many devices, and in particular for silicon hetero-interface photodetectors (SHIPs). We present a theoretical model in which the thickness of the multiplication layer is arbitrary and the peak electric field may be positioned arbitrarily in relation to the absorption layer. We also consider the effects of parasitics, transit-time, and avalanche buildup time. Both front and back illumination from either multiplication layer or absorption layer are considered. The calculated results are compared with experimental results for existing SHIP's and performance predictions are also made for optimized SHIP structures. SHIP APDs with gain-bandwidth product in excess of 500 GHz are possible     

Double epitaxy improves single-photon avalanche diode performance

A new single-proton avalanche diode (SPAD) with double-epitaxial silicon structure is presented. The device has a time response with short diffusion tail (270 ps time-constant), high resolution (45 ps FWHM, full-width at half maximum of the peak) and low noise, i.e. low-dark-count rate.<>     

Design considerations for improving low-temperature noise performance of silicon JFET's

A study of the effects of channel doping and device geometry variations on the operation of silicon JFET's has been carried out in an attempt to optimize the noise performance of such devices at low temperatures. In order to obtain optimum performance at temperatures below 125°K, low values of channel doping and large channel dimensions must be used. The high frequency electrical performance of such devices is poor because of larger parasitic capacitances.     

III-V alloy heterostructure high speed avalanche photodiodes

Heterostructure avalanche photodiodes have been successfully fabricated in several III-V alloy systems: GaAlAs/GaAs, GaAlSb/GaSb, GaAlAsSb/GaAlSb, and InGaAsP/InP. These diodes cover optical wavelengths from0.4 to 1.8 mum. Early stages of development show very encouraging results. High speed response of <35 ps and high quantum efficiency >95 percent have been obtained. The dark currents and the excess avalanche noise will also be discussed. A direct comparison of GaAlSb, GaAlAsSb, and InGaAsP avalanche photodiodes is given.     

Design considerations and performance evaluations of synchronousrectification in flyback converters

Design tradeoffs and performance comparisons of various implementations of the flyback converter with a synchronous rectifier (SR) are presented. Specifically, the merits and limitations of the constant-frequency (CF) continuous-conduction mode (CCM), CF discontinuous-conduction mode (DCM), variable-frequency (VF) DCM, and zero-voltage-switched (ZVS) DCM flyback converters with SRs are discussed. The theoretical efficiency improvements of the discussed synchronous rectification approaches relative to Schottky diode implementations are derived. Finally, theoretical results are verified on an experimental universal-input off-line 15 V/36 W flyback prototype     

High-speed-response InGaAs/InP heterostructure avalanche photodiode with InGaAsP buffer layers

The optical response time of an InGaAs/InP heterostructure avalanche photodiode (HAPD) with InGaAsP buffer layers is reported. It is shown that the buffer layers play an important role in reduction of the pile-up effect and are considered to be effective in achieving high-speed InGaAs/InP HAPDs.     

Low-bias performance of avalanche photodetector. A time-domainapproach

The performance of the InP-InGaAs avalanche photodiode (APD) at low bias voltages has been investigated directly from its impulse response without using any fitting parameters. The important mechanisms responsible for low-bias performance are the emission of holes from the InP-InGaAs interface potential-trap in the valence band, the velocity of the carriers, and the diffusion of photogenerated holes from the undepleted region to the depleted region of the absorption layer. A time-recurrence relation for the emission of holes from the trap has been derived and special attention has been paid to the velocity of carriers at low fields. The delay in the process of diffusion of photogenerated holes has been taken into account in obtaining the impulse response. The bandwidth at different gains have been calculated by taking the fast Fourier transform (FFT) of the current impulse response. The gain-bias and gain-bandwidth characteristics show reasonably good agreement between the data from the model and the experimental data of an earlier published work on InP-InGaAs APD     

Design considerations for shaped-beam reflectors

A modified procedure is proposed for the design of shaped-beam reflectors in general. The procedure involves explicitly the size of the reflector as a parameter and can thus be used to check quickly the minimum size of a reflector needed for a given shaped beam. Experimental results are given for a reflector designed on this basis.     

Design considerations for acousto-optic devices

The design and fabrication of wide-band bulk acousto-optic modulators (temporal modulation) and beam deflectors (spatial modulation) are described. Optimized device parameters can be obtained systematically for given specifications of the desired modulation bandwidth, throughput efficiency and number of resolvable elements. As the device operating frequency goes beyond a few hundred megahertz, the acoustic transducer response becomes sensitive to the intermediate metal layers between the piezoelectric transducer and the acoustooptic interaction medium. Transducer bandwidth and impedance matching can be optimized using computer modeling programs. Criteria for material selection based on performance requirements and propagation loss are presented. Practical considerations for the fabrication of high performance devices and specific device parameters are discussed.     

Design considerations for high-current photodetectors

This paper outlines the design considerations for gigahertz-bandwidth, high-current p-i-n photodiodes utilizing InGaAs absorbers. The factors being investigated are photodetector intrinsic region length, intrinsic region doping density, temperature effects, illumination spot size, illumination wavelength, frequency, and illumination direction. Space-charge calculations are used to determine optimal device geometry and conditions which maximize saturation photocurrent. A thermal model is developed to study the effects of temperature on high-current photodetector performance. The thermal and space-charge model results are combined to emphasize the importance of thin intrinsic region lengths to obtain high current. Finally, a comparison between surface-illuminated p-i-n structures and waveguide structures is made to differentiate between the problems associated with achieving high current in each structure and to outline techniques to achieve maximum performance     

Dynamic avalanche and reliability of high voltage diodes

Diode failures are a limiting factor for the reliability of power circuits. One failure reason is dynamic avalanche. Dynamic avalanche can be distinguished in three degrees, and some designs are rugged up to the third degree. Design modifications for improving the dynamic ruggedness and suitable test conditions are proposed.     

Computing the performance of optical receivers with avalanche diodedetectors

A method is described for exactly computing the probability distribution of the sum of the output of an avalanche diode and Gaussian noise using the Personick-McIntyre model of the random electron multiplication in the diode. A saddlepoint approximation is also presented. Both are incorporated in an optimization procedure for efficiently calculating the minimum input signal strength and the decision level that are needed to attain a preassigned error probability when the diode is embodied in a binary optical communication receiver     

The effect of injecting contacts on avalanche diode performance

Metal-semiconductor contact injection on the junction side of diffused-mesa avalanche diodes has been found to have a significant effect on the performance of these diodes as oscillators. A minority carrier injection ratio of 6 percent reduces the efficiency of what would be 9 percent efficient diodes to less than 1 percent and increases the FM noise by a factor of 2 as tested in a 6-GHz oscillator circuit. The dependence of the minority carrier injection ratio of the metal-semiconductor barrier upon current density has been measured and quantitatively modeled. Calculated values of diode admittance, including the effects of injection at the contact, are shown to be in agreement with measured values of both small-signal diode admittance versus frequency and large-signal diode admittance versus RF voltage. Germanium avalanche diodes with low-minority carrier injection contacts have demonstrated CW oscillation efficiencies greater than 9 percent at 6 GHz. The realization of low-injection contacts is shown to be a requirement for achievement of high-efficiency avalanche oscillation.     

Design methodology of the high performance large-grain polysiliconMOSFET

A methodology to design high-performance MOSFETs on the large-grain polysilicon-on-insulator (LPSOI) film is presented. Due to the metal-induced lateral crystallization (MILC) process in the formation of LPSOI films, the polysilicon grain locations and orientations can be reasonably controlled. Therefore, the performance of an LPSOI MOSFET can be optimized by carefully selecting the orientation and grain location according to the size of the desired transistor. The effects of various design parameters including the distance from the nickel strip, relative source/drain position, transistor orientation, and layout geometry are investigated. A ladder layout method is proposed to provide scalability in the design of high performance LPSOI MOSFETs. A design guideline for designing LPSOI NMOSFETs with different dimensions is given     

一种高性能32位移位寄存器单元的设计

介绍了一种用于32位微处理器中执行单元的双总线(64位输入32位输出)移位寄存器单元的设计。讨论了矩阵移位器和树状移位器结构,提出了基于两者结合的Matrix-Tree 结构并给出了其硬件电路的实现。为了能实现X86指令集全部移位类指令,采用了指令预处理的技术,节省了指令周期,提高了CPU的效率。