Improvement of Atomic-Layer-Deposited Al2O3/GaAs Interface Property by Sulfuration and NH3 Thermal Nitridation

Fermi level pinning at the interface between high-h gate dielectric and GaAs induced by unstable native oxides is a major obstacle for high performance GaAs-based metal-oxide-semiconductor （MOS） devices. We demonstrate the improved Al2O3/GaAs interracial characteristics by （NH4）2S immersion and NH3 thermal pretreatment prior to A1203 deposition. X-ray photoelectron spectroscopy （XPS） analysis confirms that sulfuration of GaAs surface by （NH4 ）2S solution can effectively reduce As-O bonds while Ga-O bonds and elemental As still exist at Al2O3 /GaAs interface. However, it is found that N incorporation during the further thermal nitridation on sulfurated GaAs can effectively suppress the native oxides and elemental As in the sequent deposition of Al2O3. Atomic force microscopy （AFM） shows that the further thermal nitridation on sulfurated GaAs surface can also improve the surface roughness.     

Influence of initial surface reconstruction on the interface structure of HfO2/GaAs

We show that the bonding structures and electrical properties of the HfO₂/GaAs interface can be controlled by a choice of the reconstruction on the initial GaAs surface. Electron-beam evaporation of HfO₂ onto the c(4 × 4) surface yielded As-O bonds at the interface, while Ga-O bonds were dominant at the interfaces formed on the (2 × 4) and (4 × 6) surfaces. Influences of the initial surface reconstruction on the interface structure persisted even after annealing at 673 K. Electrical characterization of Ir/HfO₂/GaAs capacitors indicated that the interfacial As-O bonds cause weak Fermi level pinning. It was also suggested that the interfaces dominated by the Ga-O bonds have trapping states in the upper half of the GaAs bandgap.     

Photoemission study of the adsorption of O2, CO and H2 on GaAs(110)

Ultraviolet photoemission spectroscopy with hv < 12 eV has been used to study O₂, CO, and H₂ adsorption on the cleaved GaAs(110) face. It was found that O₂ exposures above 10⁵ L(1LM = 10^?6 Torr sec) were required to produce changes in the energy distribution curves. At O₂ exposures of 10⁶ L on p-type and 10⁸ L on n-type an oxide peak is observed in the EDC's located 4 eV below the valence band maximum. On p-type GaAs, O₂ exposures cause the Fermi level at the surface to move up to a point 0.5 eV above the valence band maximum, while on n-type GaAs O₂ exposures do not remove the Fermi level pinning caused by empty surface states on the clean GaAs. CO was found to stick to GaAs, but to desorb over a period of hours, and not to change the surface Fermi level position. H₂ did not affect the EDC's, but atomic H lowered the electron affinity and raised the surface position of the Fermi level on p-type GaAs. A correlation is found in which gases which stick to the GaAs cause an upward movement of the Fermi level at the surface on p-type GaAs, while gases which stick only temporarily do not change the surface position of the Fermi level.     

High-k Al2O3 MOS structures with Si interface control layer formed on air-exposed GaAs and InGaAs wafers

This paper attempts to realize unpinned high-k insulator-semiconductor interfaces on air-exposed GaAs and In_0.53Ga_0.47As by using the Si interface control layer (Si ICL). Al₂O₃ was deposited by ex situ atomic layer deposition (ALD) as the high-k insulator. By applying an optimal chemical treatment using HF acid combined with subsequent thermal cleaning below 500 °C in UHV, interface bonding configurations similar to those by in situ UHV process were achieved both for GaAs and InGaAs after MBE growth of the Si ICL with no trace of residual native oxide components. As compared with the MIS structures without Si ICL, insertion of Si ICL improved the electrical interface quality, a great deal both for GaAs and InGaAs, reducing frequency dispersion of capacitance, hysteresis effects and interface state density (D_it). A minimum value of D_it of 2 × 10¹¹ eV⁻¹ cm⁻² was achieved both for GaAs and InGaAs. However, the range of bias-induced surface potential excursion within the band gap was different, making formation of electron layer by surface inversion possible in InGaAs, but not possible in GaAs. The difference was explained by the disorder induced gap state (DIGS) model.     

Double‐layer channel structure based ZnO thin‐film transistor grown by atomic layer deposition

A double channel structure has been used by depositing a thin amorphous‐AlZnO (a‐AZO) layer grown by atomic layer deposition between a ZnO channel and a gate dielectric to enhance the electrical stability. The effect of the a‐AZO layer on the electrical stability of a‐AZO/ZnO thin‐film transistors (TFTs) has been investigated under positive gate bias and temperature stress test. The use of the a‐AZO layer with 5 nm thickness resulted in enhanced subthreshold swing and decreased V_th shift under positive gate bias/temperature stress. In addition, the falling rate of the oxide TFT using a‐AZO/ ZnO double channel had a larger value (0.35 eV/V) than that of pure ZnO TFT (0.24 eV/V). These results suggest that the interface trap density between dielectric and channel was reduced by inserting a‐AZO layer at the interface between the channel and the gate insulator, compared with pure ZnO channel. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Nondestructive interface construction for CdS-buffered ZnO nanorod/Cu<Subscript>2</Subscript>O composite structure solar cells

In this work, ZnO nanorod/Cu₂O composite nanostructure solar cells were prepared using hydrothermal growth and electrodeposition. The CdS layer was added between ZnO and Cu₂O to suppress carrier reverse recombination. Nondestructive interface deposition methods were employed to prepare CdS and Cu₂O functional layers. The CdS layers were unconventionally deposited in non-alkaline solution, which can inhibit etching on the ZnO surface, and Cu₂O layers were electrodeposited in ZnO-buffered alkaline solution which can also inhibit etching on the ZnO surface. Finally, the performance of solar cells was improved by adding a highly resistive CdS intermediate layer between ZnO and Cu₂O layers. This work demonstrated the nondestructive interface approach of chemical solution deposition of functional layers on ZnO and possibilities for further improvements to the performance of Cu₂O-based nanostructure solar cells with the addition of an intermediated layer.     

High temperature characteristics of ZnO-based MOS-FETs with a photochemical vapor deposition SiO2 gate dielectric

The authors report the fabrication of ZnO-based metal-oxide-semiconductor field effect transistors (MOSFETs) with a high quality SiO₂ gate dielectric by photochemical vapor deposition (photo-CVD) on a sapphire substrate. Compared with ZnO-based metal-semiconductor FETs (MESFETs), it was found that the gate leakage current was decreased to more than two orders of magnitude by inserting the photo-CVD SiO₂ gate dielectric between ZnO and gate metal. Besides, it was also found that the fabricated ZnO MOSFETs can achieve normal operation of FET, even operated at 150 °C. This could be attributed to the high quality of photo-CVD SiO₂ layer. With a 2 μm gate length, the saturated I_ds and maximum transconductance (G_m) were 61.1 mA/mm and 10.2 mS/mm for ZnO-based MOSFETs measured at room temperature, while 45.7 mA/mm and 7.67 mS/mm for that measured at 150 °C, respectively.     

Structure and dielectric properties of ultra-thin ZrO<Subscript>2</Subscript> films for high-<Emphasis Type="Italic">k</Emphasis> gate dielectric application prepared by pulsed laser deposition

ZrO₂ thin films have been prepared on Pt-coated silicon substrates and directly on n-Si(100) substrates by the pulsed laser deposition (PLD) technique using a ZrO₂ ceramic target under different deposition conditions. X-ray diffraction showed that the films prepared at 400 °C in 20 Pa oxygen ambient remained amorphous. Differential thermal analysis was carried out to study the crystallization behavior of ZrO₂. The dielectric constant of ZrO₂ was determined to be around 24 by measuring a Pt/ZrO₂/Pt capacitor structure. Sputtering depth profile X-ray photoelectron spectroscopy was used to investigate the interfacial characteristics of ZrO₂/n-Si stacks. A Zr silicate interfacial layer was formed between the ZrO₂ layer and the silicon substrate. The equivalent oxide thickness (EOT) and leakage current densities of the films with 6.6 nm physical thickness post-annealed in O₂ and N₂ ambient were investigated. An EOT of 1.65 nm with a leakage current of 36.2 mA/cm² at 1 V gate voltage for the film post-annealed in N₂ has been obtained. ZrO₂ thin films prepared by PLD have acceptable structure and dielectric properties required by a candidate material of high-k gate dielectrics. PACS 77.55.+f; 81.15.Fg; 73.40.Qv     

The structure and optical characters of the ZnO film grown on GaAs/Al2O3 substrate

In this paper ZnO films are grown on GaAs/Al₂O₃ substrates at different temperature by metal-organic chemical vapor deposition (MOCVD). The GaAs/Al₂O₃ substrates are formed by depositing GaAs layer (∼35 nm) on the Al₂O₃ substrate. The results of X-ray photoelectron spectroscopy (XPS) and X-ray diffraction (XRD) demonstrate that most of the Ga and As atoms form Ga-As bond and the GaAs layer does not present any orientation. The characters of the ZnO films grown on GaAs/Al₂O₃ substrates are investigated by XRD, photoluminescence (PL), atomic force microscopy (AFM) and Raman scattering. Compared with ZnO film grown on Al₂O₃ substrate, ZnO film prepared by our fabrication scheme has good crystal and optical quality. Meanwhile its grain size becomes bigger according to the AFM image. Raman analysis indicates that the intrinsic defects and the in-plane tensile stress are obviously reduced in ZnO/GaAs/Al₂O₃ samples.     

Surface reactions in atomic layer deposition of HfO2, ZrO2 and Al2O3 on hydroxylated and sulfur-passivated GaAs(1 0 0) surfaces: A comparative study by density functional theory

The surface reactions in atomic layer deposition (ALD) of HfO₂, ZrO₂ and Al₂O₃ on hydroxylated and sulfur-passivated GaAs surfaces are compared by using density functional theory. The HfCl₄ and ZrCl₄ half-reactions show large similarities in energetics and geometrical structure. However, both of them show large discrepancies with the Al(CH₃)₃ (TMA) half-reaction. Calculations find that it is more energetically favorable for the Al₂O₃ deposition than the HfO₂ and ZrO₂ deposition at the initial ALD stage. In addition, calculations find that although the GaAs passivation with sulfur helps to improve the interfacial properties, it is both kinetically and thermodynamically less favorable.     

Effect of modification of S-terminated Ge(1 0 0) surface on ALD HfO2 gate stack

When S-termination on a Ge(1 0 0) surface was desorbed at an elevated temperature and an atomic layer deposition (ALD) HfO₂ film was deposited, interfacial thickness was less than 1 nm. As a result, the equivalent oxide thickness (EOT) of the stack on the initially S-terminated surface was thinner than that deposited on the O₃-oxidized surface, while HfO₂ film thickness was almost identical on both surfaces. Nevertheless, the HfO₂ stack on the initially S-terminated surface exhibited improved leakage current characteristics due to an increase in barrier height. Its thinner but robust interface will contribute to the scaling down of gate oxide integrity.     

Characterization of Y2O3 gate dielectric on n-GaAs substrates

Physical and electrical properties of sputtered deposited Y₂O₃ films on NH₄OH treated n-GaAs substrate are investigated. The as-deposited films and interfacial layer formation have been analyzed by using X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS). It is found that directly deposited Y₂O₃ on n-GaAs exhibits excellent electrical properties with low frequency dispersion (<5%), hysteresis voltage (0.24 V), and interface trap density (3 × 10¹² eV⁻¹ cm⁻²). The results show that the deposition of Y₂O₃ on n-GaAs can be an effective way to improve the interface quality by the suppression on native oxides formation, especially arsenic oxide which causes Fermi level pinning at high-k/GaAs interface. The Al/Y₂O₃/n-GaAs stack with an equivalent oxide thickness (EOT) of 2.1 nm shows a leakage current density of 3.6 × 10⁻⁶ A cm⁻² at a V_FB of 1 V. While the low-field leakage current conduction mechanism has been found to be dominated by the Schottky emission, Poole-Frenkel emission takes over at high electric fields. The energy band alignment of Y₂O₃ films on n-GaAs substrate is extracted from detailed XPS measurements. The valence and conduction band offsets at Y₂O₃/n-GaAs interfaces are found to be 2.14 and 2.21 eV, respectively.     

The interface structure of high performance ZnO Schottky diodes

Oxidized iridium (IrO_x) anodes fabricated on n-type ZnO single crystal wafers using reactive pulsed laser deposition are known to produce high quality Schottky barriers with ideality factors approaching the image-force-controlled limit for laterally homogeneous interfaces. These high performance IrO_x/ZnO Schottky contacts were cross-sectioned and analyzed using transmission electron microscopy, revealing an amorphous interfacial layer of 2–3 nm thickness. Electron energy loss spectroscopy, used to study the composition of the interface region, showed evidence of significant zinc diffusion across the interface into the IrO_x film, which leads to the creation of Zn vacancies (acceptors), in the ZnO sub-interface region. There is also evidence for oxygen passivation near the interface resulting from the use of an active oxygen ambient during the IrO_x deposition. Both these factors may explain the outstanding electrical performance of these Schottky devices.     

Effect of interface roughness on I–V relation of AlGaAs/GaAs heterojunction field effect transistor

We have modelled the interface roughness by Al atoms protruding into the GaAs layer at the AlGaAs/GaAs heterointerface. The I_sd − V_sdrelation is calculated to study the effect of the interface roughness on the carrier transport in an AlGaAs/GaAs heterojunction field effect transistor. With ideal conduction, I_sd − V_sdrelation is linear. The current becomes saturated when the Fermi level in the drain drops below the conduction bandedge of the source. Electron waves become scattered by interface roughness and the current is decreased. However, the interface roughness effect is small due to small size of scattering centers.     

Optically induced gate voltage spectroscopy in a GaAs/AlGaAs heterostructure

We report on measurements of optically induced gate voltage spectroscopy in a GaAs/AlGaAs heterostructure with a high mobility 2-dimensional electron gas (2DEG) in a thin (55 nm) GaAs layer. The optically induced gate voltage between the front gate and the 2DEG is sensitive to excess electron concentrations below 10⁷ cm⁻². In the gate voltage spectrum we observe a peak below the bandgap energy of GaAs, which is not observed in the photocurrent, luminescence or excitation spectra. Due to the extremely high sensitivity of this technique we attribute this below bandgap signal to very weak absorption lines below the GaAs bandgap energy by impurity bands or defect absorption. The fall-off of the below bandgap signal varies as exp (hω/E₀), where E₀ is an indicative for the quality of the heterostructure.     

Synthesis and characterization of Al-N codoped p-type ZnO epitaxial films using high-temperature homo-buffer layer

Al-N codoped p-type ZnO thin films have been prepared by DC magnetron reactive sputtering reproducibly using a high-temperature (HT) homo-buffer layer. The influence of HT buffer layer deposition time (T_ht) on film properties was investigated by X-ray diffraction (XRD), scanning electron micro-spectra (SEM) and Hall measurement. The Al-N codoped ZnO film was improved evidently in its crystal quality by varying the value of T_ht. Results of Hall effect showed that all of the Al-N codoped ZnO thin films were p-type conduction and had resistivity mainly below 50 Ω cm. The optimum deposition time of HT buffer layer is around 3 min from the comprehensive consideration of structural, electrical, and optical properties. The obtained ZnO thin film can meet the need of application in optoelectronic devices based on ZnO.     

Valence band studies of clean and oxygen exposed GaAs(100) surfaces

We found, by correlating band bending, ultraviolet photoemission spectroscopy, and partial yield spectroscopy measurements, that Fermi level pinning at midgap of n-type GaAs(110) is caused by extrinsic states. The exact nature of these states is not yet clear, but the surfaces with Fermi level pinning were strained as evidence by a smeared valence band emission. This smearing was removed by as little as one oxygen per 10⁴ to 10⁵ surface atoms. This implies that the oxygen has very long range effects in causing spontanesous but small rearrangement of the surface lattice and removing surface strains. When about 5% of a monolayer of oxygen is adsorbed, a major change in the electronic structure takes place. Again, the oxygen coverage is very small, which suggests long range effects now leading to a fairly large rearrrangement of the surface lattice. Finally, from comparing the oxygen induced emission for exposures greater than 10⁷ L O₂, with the spectra from gas photoemission measurements on molecular oxygen, we suggest that the oxygen is chemisorbed as a molecule on the (110) surface of GaAs.     

Interface models and processing technologies for surface passivation and interface control in III-V semiconductor nanoelectronics

Interface models and processing technologies are reviewed for successful establishment of surface passivation, interface control and MIS gate stack formation in III-V nanoelectronics. First, basic considerations on successful surface passivation and interface control are given, including review of interface models for the band alignment at interfaces, and effects of interface states in nanoscale devices. Then, a brief review is given on currently available surface passivation technologies for III-V materials, including the Si interface control layer (ICL)-based passivation scheme by the authors’ group. The Si-ICL technique has been successfully applied to surface passivation of nanowires and to formation of a HfO₂ high-k dielectric/GaAs interfaces with low values of the interface state density.     

Interfacial characteristics of Al/Al2O3/ZnO/n-GaAs MOS capacitor

The interfacial characteristics of Al/Al2O3/ZnO/n-GaAs metal-oxide-semiconductor (MOS) capacitor are investigated. The results measured by X-ray photoelectron spectroscopy (XPS) and high-resolution transmission electron microscopy (HRTEM) show that the presence of ZnO can effectively suppress the formations of oxides at the interface between the GaAs and gate dielectric and gain smooth interface. The ZnO-passivated GaAs MOS capacitor exhibits a very small hysteresis and frequency dispersion. Using the Terman method, the interface trap density is extracted from C-V curves. It is found that the ZnO layer can effectively improve the interface quality.     

The improvement of Al2O3/AlGaN/GaN MISHEMT performance by N2 plasma pretreatment

This paper discusses the effect of N 2 plasma treatment before dielectric deposition on the electrical performance of a Al2O3 /AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor(MISHEMT),with Al2O3 deposited by atomic layer deposition.The results indicated that the gate leakage was decreased two orders of magnitude after the Al2O3 /AlGaN interface was pretreated by N 2 plasma.Furthermore,effects of N 2 plasma pretreatment on the electrical properties of the AlGaN/Al2O3 interface were investigated by x-ray photoelectron spectroscopy measurements and the interface quality between Al2O3 and AlGaN film was improved.