高k栅介质对肖特基源漏超薄体SOI MOSFET性能的影响

研究了高k栅介质对肖特基源漏超薄体SOI MOSFET性能的影响.随着栅介质介电常数增大,肖特基源漏(SBSD) SOI MOSFET的开态电流减小,这表明边缘感应势垒降低效应(FIBL)并不是对势垒产生影响的主要机理.源端附近边缘感应势垒屏蔽效应(FIBS)是SBSD SOI MOSFET开态电流减小的主要原因.同时还发现,源漏与栅是否对准,高k栅介质对器件性能的影响也不相同.如果源漏与栅交叠,高k栅介质与硅衬底之间加入过渡层可以有效地抑制FIBS效应.如果源漏偏离栅,采用高k侧墙并结合堆叠栅结构,可以提高驱动电流.分析结果表明,来自栅极的电力线在介电常数不同的材料界面发生两次折射.根据结构参数的不同可以调节电力线的疏密,从而达到改变势垒高度,调节驱动电流的目的. 关键词： k栅介质')" href="#">高k栅介质 肖特基源漏(SBSD) 边缘感应势垒屏蔽(FIBS) 绝缘衬底上的硅(SOI)     

LDC-CNTFET: A carbon nanotube field effect transistor with linear doping profile channel

In this paper, a novel carbon nanotube field effect transistor with linear doping profile channel (LDC-CNTFET) is presented. The channel impurity concentration of the proposed structure is at maximum level at source side and linearly decreases toward zero at drain side. The simulation results show that the leakage current, on-off current ratio, subthreshold swing, drain induced barrier lowering, and voltage gain of the proposed structure improve in comparison with conventional CNTFET. Also, due to spreading the impurity throughout the channel region, the proposed structure has superior performance compared with a single halo CNTFET structure with equal saturation current. Design considerations show that the proposed structure enhances the device performance all over a wide range of channel lengths.     

Exploring the warped bulk

In this study, a gallium nitride (GaN) high electron mobility transistor (HEMT) with recessed insulator and barrier is reported. In the proposed structure, insulator is recessed into the barrier at the drain side and barrier is recessed into the buffer layer at the source side. We study important device characteristics such as electric field, breakdown voltage, drain current, maximum output power density, gate-drain capacitance, short channel effects and DC transconductance using two-dimensional and two-carrier device simulator. Recessed insulator in the drain side of the proposed structure reduces maximum electric field in the channel and therefore increases the breakdown voltage and maximum output power density compared to the conventional counterpart. Also, gate-drain capacitance value in the proposed structure is less than that of the conventional structure. Overall, the proposed structure reduces short channel effects. Because of the recessed regions at both the source and the drain sides, the average barrier thickness of the proposed structure is not changed. Thus, the drain current of the proposed structure is almost equivalent to that of the conventional transistor. In this work, length (L _r) and thickness (T _r) of the recessed region of the barrier at the source side are the same as those of the insulator at the drain side.     

Study of current drain during electrochemical etching of polycarbonate detectors

Polycarbonate (PC) detector is one of the common detectors for neutron and radon gas detection. Using this detector it is possible to measure the dose in mSv, by counting tracks/cm² on an etched surface. In this paper, a special procedure has been suggested to determine the dose based on current drain during the etching process. In these experiments the effects of voltage, frequency, effective etched area, PC detector's thickness, etched area (one side or two sides), etching solution temperature and dose absorbed by the PC foil have been studied.The results obtained show the current drain variation for a voltage of 200–1600 V, a frequency of 2–10 kHz, effective area with a diameter of 2–12 cm, PC thickness of 125–250–375– and a temperature of etching solution of 25–.Lexan PC foils were exposed to doses of of neutrons. The unexposed foils were considered as the background (BG) foils. Most of the experiments were performed at a voltage of 800 V, a frequency of 2 and 8 kHz, foil thickness of , diameter of effective etched area of foils of 2, 6 and 12 cm, temperatures of 25 and and the etching process from 0 up to overload stage. Overload stage occurs when the foil becomes so thin due to growth of the tracks that it leads to sparking between phase and null that makes a hole in the foil.Current drain curves versus the function of the etching time are absolutely different for various doses from zero (BG) to 10 rad (BG up to ). This is true especially for the time interval from 3 h of etching up to overload stage. In this way, it is possible to obtain a calibration of PC detector net current drain based on its absorbed dose.In this experiment, the number and diameter of tracks and their relation with drain current and PC foil residual thickness at overload stage have been studied.The same experiment has been performed for various concentrations of radon gas (Bq/m3) as well.     

纳米体硅鳍形场效应晶体管单粒子瞬态中的源漏导通现象

体硅鳍形场效应晶体管(FinFET)是晶体管尺寸缩小到30 nm以下应用最多的结构,其单粒子瞬态产生机理值得关注.利用脉冲激光单粒子效应模拟平台开展了栅长为30, 40, 60, 100 nm Fin FET器件的单粒子瞬态实验,研究FinFET器件单粒子瞬态电流脉冲波形随栅长变化情况;利用计算机辅助设计(technology computer-aided design, TCAD)软件仿真比较电流脉冲产生过程中器件内部电子浓度和电势变化,研究漏电流脉冲波形产生的物理机理.研究表明,不同栅长Fin FET器件瞬态电流脉冲尾部都存在明显的平台区,且平台区电流值随着栅长变短而增大;入射激光在器件沟道区下方体区产生高浓度电子将源漏导通产生导通电流,而源漏导通升高了体区电势,抑制体区高浓度电子扩散,使得导通状态维持时间长,形成平台区电流;尾部平台区由于持续时间长,收集电荷量大,会严重影响器件工作状态和性能.研究结论为纳米Fin FET器件抗辐射加固提供理论支撑.     

MOSFET scaling into the 10 nm regime

Scaling limits of the double-gate MOSFET structure are explored. Because short-channel effects can be adequately controlled by thinning the silicon body, the eventual scaling limit will be determined by the ability to control off-state leakage due to quantum mechanical tunneling and thermionic emission between the source and drain. Depending on threshold voltage and the source/drain doping profile, this will restrict gate length scaling to 5–11 nm. As power supplies are scaled down, maintaining on-state drive current may become difficult due to threshold voltage limitations. Series resistance becomes important as the body thickness is reduced, but intrinsic device performance may still be improved.     

Model and analysis of drain induced barrier lowering effect for 4H--SiC metal semiconductor field effect transistor

Based on an analytical solution of the two-dimensional Poisson equation in the subthreshold region, this paper investigates the behavior of DIBL (drain induced barrier lowering) effect for short channel 4H--SiC metal semiconductor field effect transistors (MESFETs). An accurate analytical model of threshold voltage shift for the asymmetric short channel 4H--SiC MESFET is presented and thus verified. According to the presented model, it analyses the threshold voltage for short channel device on the L/a (channel length/channel depth) ratio, drain applied voltage V_DS and channel doping concentration N_D, thus providing a good basis for the design and modelling of short channel 4H--SiC MESFETs device.     

Investigation of the performance and band-to-band tunneling effect of a new double-halo-doping carbon nanotube field-effect transistor

Carbon nanotube field-effect transistors (CNTFETs) can be fabricated with Ohmic- or Schottky-type contacts. We focus here on Ohmic CNTFETs. The CNTFETs suffer from band-to-band tunneling which in turn causes the ambipolar conduction. In this paper, to suppress the ambipolar behavior of CNTFETs and improve the performance of these devices, we have proposed application of symmetric double-halo (DH)-doping in CNTFETs. In this new structure, the source-side halo doping reduces the drain-induced barrier lowering (DIBL) and the drain-side halo reduces the band-to-band tunneling effect. Simulation results show in the DH-CNTFET, subthreshold swing below the 60 mV/decade conventional limit can be achieved. Also it decreases significantly the leakage current and drain conductance and increases on–off current ratio and voltage gain as compared to conventional CNTFET.     

Pseudomorphic InGaAs quantum-wire FETs with negative differential resistance

Pseudomorphic trench-type InGaAs/InAlAs quantum-wire field-effect transistors (QWR-FET) are realized by selective molecular beam epitaxy. The pseudomorphic QWR-FET has a negative differential resistance (NDR) effect with a low source–drain voltage (0.3 V). The NDR spectra are clearly observed in the 50–220 K temperature range. The operating current of the pseudomorphic QWR-FET is twice that of a lattice-matched QWR-FET, and this is thought to be due to the higher electron mobility.     

Non-recessed-gate quasi-E-mode double heterojunction AlGaN/GaN high electron mobility transistor with high breakdown voltage

A non-recessed-gate quasi-E-mode double heterojunction AlGaN/GaN high electron mobility transistor(quasi-EDHEMT) with a thin barrier, high breakdown voltage and good performance of drain induced barrier lowering(DIBL)was presented. Due to the metal organic chemical vapor deposition(MOCVD) grown 9-nm undoped AlGaN barrier, the effect that the gate metal depleted the two-dimensiomal electron gas(2DEG) was greatly impressed. Therefore, the density of carriers in the channel was nearly zero. Hence, the threshold voltage was above 0 V. Quasi-E-DHEMT with 4.1-μm source-to-drain distance, 2.6-μm gate-to-drain distance, and 0.5-μm gate length showed a drain current of 260 mA/mm.The threshold voltage of this device was 0.165 V when the drain voltage was 10 V and the DIBL was 5.26 mV/V. The quasi-E-DHEMT drain leakage current at a drain voltage of 146 V and a gate voltage of-6 V was below 1 mA/mm. This indicated that the hard breakdown voltage was more than 146 V.     

Heteromaterial-gate line tunnel field-effect transistor based on Si/Ge heterojunction

A Si/Ge heterojunction line tunnel field-effect transistor(LTFET) with a symmetric heteromaterial gate is proposed.Compared to single-material-gate LTFETs, the heteromaterial gate LTFET shows an off-state leakage current that is three orders of magnitude lower, and steeper subthreshold characteristics, without degradation in the on-state current. We reveal that these improvements are due to the induced local potential barrier, which arises from the energy-band profile modulation effect. Based on this novel structure, the impacts of the physical parameters of the gap region between the pocket and the drain, including the work-function mismatch between the pocket gate and the gap gate, the type of dopant, and the doping concentration, on the device performance are investigated. Simulation and theoretical calculation results indicate that the gap gate material and n-type doping level in the gap region should be optimized simultaneously to make this region fully depleted for further suppression of the off-state leakage current.     

具有部分本征GaN帽层新型AlGaN/GaN高电子迁移率晶体管特性分析

为了优化传统Al GaN/GaN高电子迁移率晶体管(high electron mobility transistors,HEMTs)器件的表面电场,提高击穿电压,本文提出了一种具有部分本征GaN帽层的新型Al GaN/GaN HEMTs器件结构.新型结构通过在Al GaN势垒层顶部、栅电极到漏电极的漂移区之间引入部分本征GaN帽层,由于本征GaN帽层和Al GaN势垒层界面处的极化效应,降低了沟道二维电子气(two dimensional electron gas,2DEG)的浓度,形成了栅边缘低浓度2DEG区域,使得沟道2DEG浓度分区,由均匀分布变为阶梯分布.通过调制沟道2DEG的浓度分布,从而调制了Al GaN/GaN HEMTs器件的表面电场.利用电场调制效应,产生了新的电场峰,且有效降低了栅边缘的高峰电场,Al GaN/GaN HEMTs器件的表面电场分布更加均匀.利用ISE-TCAD软件仿真分析得出:通过设计一定厚度和长度的本征GaN帽层,Al GaN/GaN HEMTs器件的击穿电压从传统结构的427 V提高到新型结构的960 V.由于沟道2DEG浓度减小,沟道电阻增加,使得新型Al GaN/GaN HEMTs器件的最大输出电流减小了9.2%,截止频率几乎保持不变,而最大振荡频率提高了12%.     

Optimization, design and fabrication of a non-cryogenic quantum infrared detector

A study of the optimization of the detectivity of a mid infrared double heterostructure photovoltaic detector is proposed. Simple approximate analytic expressions for the dark current are compared with full numerical calculations, and give physical insight on the mechanisms dominating the dark current. The analysis is performed step by step, from a simple p–n junction to the full double heterostructure. The influence of temperature, barrier band gap energy in a double heterostructure, doping density in the active region, on diffusion and generation–recombination mechanisms is analyzed. It is shown how the performances of a double heterostructure photovoltaic detector can be improved by a controlled doping the active region. Nevertheless, its development is still limited by the difficulties occurring during device processing. For example, the use of dry etching for the processing of InAs_0.91Sb_0.09 p–i–n photovoltaic detectors induces a strong leakage current along the mesa edge. In this letter, we show an improvement of the R₀A characteristic by several orders of magnitude at low temperature by using an Ion Beam Etching (IBE) followed by a wet chemical etching. This optimized and reliable device processing allows us to demonstrate that the detector performance is actually limited by the diffusion current of holes. Finally, we discuss the ability of an n-type barrier made of InAs/AlSb super-lattice to avoid hole diffusion and to improve the R₀A characteristic of these detectors. To cite this article: B. Vinter et al., C. R. Physique 4 (2003).     

A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

We investigate the influence of voltage drop across the lightly doped drain(LDD) region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson’s equation in the silicon and gate dielectric layers.The model can predict the fringing-induced barrier lowering effect and the short channel effect.It is also valid for non-LDD MOSFETs.Based on this model,the relationship between threshold voltage roll-off and three parameters,channel length,drain voltage and gate dielectric permittivity,is investigated.Compared with the non-LDD MOSFET,the LDD MOSFET depends slightly on channel length,drain voltage,and gate dielectric permittivity.The model is verified at the end of the paper.     

Effect of a magnetic field on the I – V characteristics of a germanium-electrolyte interface

A study has been made of the effect of the magnetic field on the I–V dependences (the so-called polarization curves) of an (n-Ge)-electrolyte interface and on the Ge electrode potential during anodic polarization. It is shown that the magnetic field shifts the saturation current toward lower currents and sharply increases the Ge surface potential in the current region. This is due to the effect of the magnetic field on the polarization current in the sample, which is governed by the diffusive flux of minority carriers. The shift of the breakdown region toward higher potentials in a magnetic field is evidence of impact-ionization multiplication of minority current carriers in the field of the Ge surface barrier.Translated from Izvestiya Vysshikh Uchebnykh Zavedenii, Fizika, Vol.12, No. 3, pp. 99–103, March, 1969.The authors thank A. A. Lebedev for interest in the study and comments.     

The hole transport characteristics in SiGe/Si double and triple barrier resonant tunneling structures

Experimental measurements and theoretical calculations have been used to study the hole transport characteristics in SiGe/Si double and triple barrier resonant tunneling structures. The main emphasis is put on discussing the symmetry of I–V characteristics with forward and reverse bias, their temperature dependences and relations to quantum well designs. The calculations show that at current resonance, the sub-level can be much lower (e.g, for heavy hole resonance) or much higher (e.g, for light hole resonance) than the quasi-Fermi-level in the spacer. The distinctly different features of the measured first and second resonances for SiGe/Si double and triple barrier resonant tunneling, can be understood, by considering the different population of the heavy hole and light hole bands in the spacer region and the temperature dependences of Fermi-level, carrier mobility and effective masses. The analysis of dependences of the transmission and I–V curve with quantum well designs presents the possibility of using an asymmetric triple barrier structure to improve the resonant tunneling performance.     

Measurements of the dynamic conductance on SS-and NS-point contacts

Mechanically point contacts made of Ta, Al, Ag (anvil) and of Ta, Ag (needle) were investigated in the temperature range between 4.2 K and 1.3 K and in magnetic fields up to 0.8 T. For point contacts consisting of two superconducting electrodes we measured the current voltage characteristics and also the dynamic conductance. The characteristics with a negative differential conductance and the occurrence of an excess current point to the appearance of Andreev-multiple reflection at an SNS-interface in the contact region.The investigated current voltage characteristics and the dynamic conductance of typical NS-point contacts (Ta–Ag and Ta–Al) point to a microconstriction with a barrier of arbitrary strength at the interface between the normalconductor and the superconductor. We performed theoretical calculations forT=0 and also for temperatures up to the critical temperature using the model of Blonder, Tinkham and Klapwijk (BTK model). In this model the Andreev-reflection is the main scattering mechanism at the NS-interface but also elastic scattering and transmission processes are taken into consideration. The comparison of our theoretical results with the experimental results and also the determined excess current at all investigated point contacts lead to the assumption that there exist metallic contacts with very small barrier strengths at the NS-interface where the Andreev-reflection is the dominant process and the other scattering mechanisms play a subdominant role.     

Performance assessment of nanoscale Schottky MOSFET as resonant tunnelling device: Non-equilibrium Green’s function formalism

A comprehensive study is performed on the electrical characteristics of Schottky barrier MOSFET (SBMOSFET) in nanoscale regime, by employing the non-equilibrium Green’s function (NEGF) approach. Quantum confinement results in the enhancement of effective Schottky barrier height (SBH). High enough Schottky barriers at the source/drain and the channel form a double barrier profile along the channel that results in the formation of resonance states. We have, for the first time, proposed a resonant tunnelling device based on SBMOSFET in which multiple resonance states are modulated by the gate voltage. Role of essential factors such as temperature, SBH, bias voltage and structural parameters on the feasibility of this device for silicon-based resonant tunnelling applications are extensively studied. Resonant tunnelling appears at low temperatures and low drain voltages and as a result negative differential resistance (NDR) is apparent in the transfer characteristic. Scaling down the gate length to 6 nm increases the peak-to-valley ratio (PVR) of the drain current. As the effective SBH reduces, the curvature of the double barrier profile is gradually diminished. Therefore, multiple resonant states are contributed to the current and consequently resonant tunnelling is smoothed out.     

Schottky barrier MOSFET structure with silicide source/drain on buried metal

In this paper, we propose a novel Schottky barrier MOSFET structure, in which the silicide source/drain is designed on the buried metal (SSDOM). The source/drain region consists of two layers of silicide materials. Two Schottky barriers are formed between the silicide layers and the silicon channel. In the device design, the top barrier is lower and the bottom is higher. The lower top contact barrier is to provide higher {on-state} current, and the higher bottom contact barrier to reduce the off-state current. To achieve this, ErSi is proposed for the top silicide and CoSi₂ for the bottom in the n-channel case. The 50~nm n-channel SSDOM is thus simulated to analyse the performance of the SSDOM device. In the simulations, the top contact barrier is 0.2e~V (for ErSi) and the bottom barrier is 0.6eV (for CoSi₂. Compared with the corresponding conventional Schottky barrier MOSFET structures (CSB), the high on-state current of the SSDOM is maintained, and the off-state current is efficiently reduced. Thus, the high drive ability (1.2mA/μm at V_ds=1V, V_gs=2V) and the high I_on/I_min ratio (10⁶) are both achieved by applying the SSDOM structure.     

Novel carbon nanotube field effect transistor with graded double halo channel

A novel carbon nanotube field effect transistor with symmetric graded double halo channel (GDH–CNTFET) is presented for suppressing band to band tunneling and improving the device performance. GDH structure includes two symmetric graded haloes which are broadened throughout the channel. The doping concentration of GDH channel is at maximum level at drain/source side and is reduced gradually toward zero at the middle of channel. The doping distribution at source side of channel reduces the drain induced barrier lowering (DIBL) and the drain side suppresses the band to band tunneling effect. In addition, broadening the doping throughout the channel increases the recombination of electrons and holes and acts as an additional factor for improving the band to band tunneling. Simulation results show that applying this structure on CNTFET enhances the device performance. In comparison with double halo structure with equal saturation current, the proposed GDH structure shows better characteristics and short channel parameters. Furthermore, the delay and power delay product (PDP) analysis versus on/off current ratio shows the efficiency of the proposed GDH structure.