22节NiCd/NiMH电池充电控制器

由22节NiCd／NiMH电池构成的电池包在实际应用中比较常见，这种电池包要求低价位、小尺寸、简单易用的充电器。本文介绍的充电方案是在一款标准的16节NiCd／NiMH电池充电器的基础上稍作改动的一种低成本充电控制器，如图1所示。     

标准NiMH电池充电控制器DS2714及其应用

DS2714是Dallas Semiconductor推出的一款标准NiMH电池充电控制器,可用于为1至4节NiMH或NiCd电池充电,并可显示充电状态和故障情况。文中介绍了DS2714工作原理和工作过程．给出了基于DS2714的充电器控制电路。     

浅谈高能量NiMH电池

为了解NiMH电池的工作特性，评价其在电动车辆上的使用性能，对NiMH电池进行了充电试验测试。基于实验结果，给出了NiMH电池的工作电压、工作电压下降率和温升等特性曲，并对这些特性进行了详细的研究和分析，同时也对NiMH电池单体在充放电过程中的一致性行了分析评价。摘．放线进     

凌特电池充电控制器

凌特公司(Linear Technology)推出高效独立开关模式电池充电控制器LTC4002—8．4。该控制器可在不增加热耗散线路板空间的前提下对两节8．4V锂离子电池进行高速充电。为实现安全和自动充电控制，LTC4002—8．4具有自动关机、电池预调节、电池温度检测充电结束指示器以及3小时充电终     

电池充电变得容易

便携式设备的增长使得人们对更加经济有效的电池技术重新产生兴趣,因此,电池充电可使这些电池长期投入使用。很多参量必须控制,以便提供安全的工作,保证最大的电池寿命和最短的电池充电时间。从前,为灵巧的电池设计过从简单到很复杂的充电电路。然而,大部分价廉的方法往往不是很精确。现在设计出一种充电控制电路,以简化镍镉和镍-金属-氢化物电池的电池充电器设计,以满足精度要求且不需要高费用。该电路为电池充电器设计人员提供很多的选择。     

从电池和充电说开去

便携式产品销量的迅猛增长,使得人们对较高性能电池系统的需求非常突出.能满足这种需求的产品将在市场取得竞争优势.构成电池系统的要素是电池本身、充电器和负载.必须密切注意各类电池的充电方法.本文将对传统的充电方法与比较灵活的高性能充电方法作一比较.     

使用双极晶体管进行锂离子电池充电

序言 随着便携式手持设备(如手机、PDA等)的功能不断增加,加上对较小体积与更长电池寿命的要求,使得锂电池成为许多此类设备的首选供电能源.本文将讨论线性充电技术与相关的离散调节元件,并重点讨论主要离散参数与选择标准.     

Intelligent control battery equalization for series connected lithium-ion battery strings

An intelligent battery equalization scheme based on fuzzy logic control is presented to adaptively control the equalizing process of series-connected lithium-ion batteries. The proposed battery equalization scheme is a bidirectional dc-dc converter with energy transferring capacitor that can be used to design the bidirectional nondissipative equalizer for a battery balancing system. Furthermore, it can be designed as a ripple-free converter for improving the input current distortion of the battery charge supply power system. A fuzzy-logic-controlled strategy is constructed with a set of membership functions to prescribe the cells equalizing behavior within a safe equalizing region for rapid cell voltage balancing. The simulation and experimental results show the advantage of the predicted equalizing performance of the lithium-ion battery stacks. The proposed fuzzy logic control battery equalization controller can abridge the equalization time about 32%. The proposed method maintains safe operation during the charge/discharge state in each lithium-ion cell of the battery strings.     

采用SPI的高速ADC双线控制电路

多数现行微处理器、DSP、现场可编程门阵列都集成了硬件和软件资源,它们支持两种常见接口标准——SPI(串行外设接口)和I~2C/SMBus——中的一种或两种。两种双线接口标准都有几个关键缺点。例如,I~2C在标准模式,快速模式,高速模式中的吞吐速率分别是     

Flow control in high-speed communication networks

Flow control within a virtual circuit on a high-speed network is modeled using fluid-flow queues with a fixed propagation delay for each channel. Data from other virtual circuits are modeled as disturbances of the available service capacities. The resulting dynamics are shown to form a linear hybrid system. This model allows the design of flow control mechanisms on a mathematical basis. Simulation results show a marked improvement over window flow control for a single channel, and a marginal improvement over window flow control for a virtual circuit of three tandem channels     

Innovative localized lifetime control in high-speed IGBTs

An innovative method to control carrier lifetime locally and efficiently in Insulated Gate Bipolar Transistors (IGBTs) is presented. It is based on the formation of void layers by low-energy and high-dose He implants and annealing. Voids introduce two well-defined midgap trap levels in silicon. HFIELDS simulations demonstrate the increase of surface hole concentration when a well localized recombination region is introduced in the buffer layer. High-speed IGBTs were fabricated both with voids in the buffer layer or with unlocalized recombination centres. Devices with localized bandgap centres show a lower on-resistance with a fast turn-off behavior     

Microprocessor control for a high-speed serial printer

A high-speed serial matrix printer is used as the framework for presenting an approach to the use of microprocessors in place of complex sequential logic networks. This approach consists of viewing the microprocessor as a logic element that with a program can replace a significant amount of sequential logic circuitry. Instead of translating a logic flow diagram into a circuit schematic, one simply translates the logic flow diagram into the computer program. The resulting product, consisting of fewer packages, is much less expensive and more reliable than its equivalent implemented with random logic. In fact, within the restriction of cost, the design of a printer using random logic with all of the resulting features would not have been attempted. The development was implemented by the use of a generalpropose microprocessor development system.     

A distributed control architecture of high-speed networks

A control architecture for a high-speed packet-switched network is described. The architecture was designed and implemented as part of the PARIS (subsequently plaNET and BBNS) networking project at IBM. This high bandwidth network for integrated communication (data, voice, video) is currently operational as a laboratory prototype. It will also be deployed within the AURORA Testbed that is part of the NSF/DARPA gigabit networking program. The high bandwidth dictates the need for specialized hardware to support faster packet handling for both point-to-point and multicast connections. A faster and more efficient network control is also required in order to support the increased number of connections and their changing requirements with time. The new network control architecture presented exploits specialized hardware, thereby enabling tasks to be performed faster and with less computation overhead. In particular, since control information can be distributed quickly using hardware packet handling mechanisms, decisions can be made based upon more complete and accurate information. In some respects, this has the effect of having the benefits of centralized control (e.g., easier bandwidth resource allocation to connections), while retaining the fault tolerance and scalability of a distributed architecture     

Bidimensional lifetime control for high-speed low-loss p-i-nrectifiers

In the paper a lifetime control technique able to control device carrier lifetime not only in the axial direction, but also in the longitudinal direction (two-dimensional (2-D) lifetime control), is analyzed. Static and dynamic losses of p-i-n diode using 2-D lifetime control are studied through mixed mode circuit-device simulations. It is shown that the 2-D technique gives a better tradeoff between static and dynamic behavior with respect to electron irradiation technique. The comparison with axial lifetime control shows that, notwithstanding similar performances achieved using the two techniques, 2-D lifetime control provides greater design flexibility     

In-cell adaptive touch technology for a flexible e-paper display

In-cell adaptive touch technology for use in an electrophoretic display (EPD) has been developed and implemented in 11.5 in. UXGA flexible electronic paper display. Here, two types of a-Si:H photo-sensor arrays fabricated on a stainless steel substrate at the process temperature of 250 °C have been used along with an overall capacitive sensor formed on top of the flexible panel. Thus, we can resolve the sensing issue of normal photo-sensor array as well as maintain the feature of low power consumption in the EPD. Moreover, new touch algorithm adapted depending upon the amount of light intensity has been applied to enhance touch sensitivity regardless of environmental light conditions.     

Congestion control in asynchronous, high-speed wormhole routingnetworks

High-speed networks use lightweight protocols and a simple switch architecture for achieving higher speeds. A lightweight switching technique for local area and campus environments is wormhole routing, in which the head of a packet (worm), upon arriving at an intermediate switch, is immediately forwarded to the next switch on the path. Thus, the packet, like a worm, may stretch across several intermediate switches and links. Wormhole routing networks provide low latency. However, they are particularly prone to congestion, thus requiring careful flow control. The authors consider high-speed, asynchronous, unslotted wormhole routing networks. For such networks, two different flow control mechanisms are compared and contrasted, namely, backpressure flow control and deflection routing (with local input rate control). With backpressure, in order to maintain deadlock-free routing, either up/down routing or shortest path routing with virtual channels is assumed. With deflection routing, to avoid livelocks, worm alignment (delayed deflection) is performed at the switches. It is shown via simulation that the throughput performance of the two schemes is comparable (except for up/down routing). The authors also discuss the tradeoffs with respect to the complexity of hardware, routing protocols and buffer requirements. The authors further examine the role of input rate control at the hosts to overcome unbounded delays typical of deflection routing, and show it is possible to achieve lower average number of hops and transit delays by employing suitable input rate control policies     

Adaptive predictive congestion control of high-speed ATM networks

This paper proposes an auto regressive moving average (ARMAX)-based adaptive control methodology to prevent congestion in high-speed asynchronous transfer mode (ATM) networks. An adaptive controller is developed to control traffic where sources adjust their transmission rates in response to the feedback information from the network switches. Specifically, the buffer dynamics at a given switch is modeled as a nonlinear discrete-time system and an ARMAX controller is designed so as to predict the explicit values of the transmission rates of the sources so as to prevent congestion. Tuning methods are provided for the unknown coefficients of the ARMAX model to estimate the unpredictable and statistically fluctuating network traffic. Mathematical analysis is given to demonstrate the stability of the closed-loop system so that a desired quality of service (QoS) can be guaranteed. The QoS is defined in terms of cell loss ratio (CLR), transmission delay and buffer utilization. We derive design rules mathematically for selecting the parameters of the ARMAX algorithm such that the desired performance is guaranteed during congestion and potential tradeoffs are shown. Simulation results are provided to justify the theoretical conclusions for multiple source/single switch scenarios using both ON/OFF and MPEG data. The performance of the proposed congestion control scheme is also evaluated in the presence of feedback delays for robustness considerations.