Effect of diode size and series resistance on barrier height and ideality factor in nearly ideal Au/n type-GaAs micro Schottky contact diodes

Small high-quality Au/n type-GaAs Schottky barrier diodes (SBDs) with low reverse leakage current are produced using lithography. Their effective barrier heights (BHs) and ideality factors from current-voltage (I-V) characteristics are measured by a Pico ampere meter and home-built I-V instrument. In spite of the identical preparation of the diodes there is a diode-to-diode variation in ideality factor and barrier height parameters. Measurement of topology of a surface of a thin metal film with atomic force microscope (AFM) shows that Au-n type-GaAS SD consists of a set of parallel-connected micro and nanocontacts diodes with sizes approximately in a range of 100-200 nm. Between barrier height and ideality factor there is an inversely proportional dependency. With the diameter of contact increasing from 5 μm up to 200 μm, the barrier height increases from 0.833 up to 0.933 eV and its ideality factor decreases from 1.11 down to 1.006. These dependencies show the reduction of the contribution of the peripheral current with the diameter of contact increasing. We find the effect of series resistance on barrier height and ideality factor.     

Characterization of ion-implanted 4H-SiC Schottky barrier diodes

Ion-implantation layers are fabricated by multiple nitrogen ion-implantations (3 times for sample A and 4 times for sample B) into a p-type 4H-SiC epitaxial layer. The implantation depth profiles are calculated by using the Monte Carlo simulator TRIM. The fabrication process and the I--V and C--V characteristics of the lateral Ti/4H-SiC Schottky barrier diodes (SBDs) fabricated on these multiple box-like ion-implantation layers are presented in detail. Measurements of the reverse I--V characteristics demonstrate a low reverse current, which is good enough for many SiC-based devices such as SiC metal--semiconductor field-effect transistors (MESFETs), and SiC static induction transistors (SITs). The parameters of the diodes are extracted from the forward I--V and C--V characteristics. The values of ideality factor n of SBDs for samples A and B are 3.0 and 3.5 respectively, and the values of series resistance R_\rm s are 11.9 and 1.0~kΩ respectively. The values of barrier height φ _\rm B of Ti/4H-SiC are 0.95 and 0.72 eV obtained by the I--V method and 1.14 and 0.93 eV obtained by the C--V method for samples A and B respectively. The activation rates for the implanted nitrogen ions of samples A and B are 2\% and 4\% respectively extracted from C--V testing results.     

Fabrication and characteristics of lateral Ti/4H-SiC Schottky barrier diodes

This paper describes the fabrication and characteristics of the lateral Ti/4H-SiC Schottky barrier diodes (SBDs). SBDs are fabricated by nitrogen ion implantation into p-type 4H-SiC epitaxial layer. The implant depth profile is simulated using the Monte Carlo simulator TRIM. Measurements of the reverse I－V characteristics demonstrate a low reverse current, that is good enough for many SiC-based devices such as SiC metal-semiconductor field-effect transistors, and SiC static induction transistors. The parameters of the diodes are extracted from the forward I－V characteristics. The barrier height φ_b of Ti/4H-SiC is 0.95 eV.     

Effect of nanopatches on electrical behavior of Ni/n-type Si Schottky diode

Topological surface measurement of thin metal film using a conducting probe atomic force microscope (C-AFM) shows that thin metal film deposited on Ni/n-Si Schottky diode (SD) consists of patches. These patches are sets of parallel connected and electrically cooperating nano-contacts of size between 50 and 100nm. Every individual patch acts as an individual diode with different I-V curve, barrier height (BH) and ideality factor (n). Between these diodes or patches, there are spot field distributions; the patches with different local work functions are in direct electric contact with surrounding patches. As a result, a potential difference between surfaces of patches, the so-called electrostatic spot field E_f, is formed. It is shown that in real metal-semiconductor (MS) contacts, patches with quite different configurations, various geometrical sizes and local work functions are randomly distributed on the surface of metal; hence direction and intensity of spot field are non-uniformly distributed along the surface of metal. There is a linear dependence between barrier height and ideality factor, which is the consequence of reduction of distance of the maximum of BH from the interface. This dependency is the sign of reduction of contribution of a peripheral current.     

Thermal annealing behaviour of Al/Ni/Au multilayer on n-GaN Schottky contacts

Recently GaN-based high electron mobility transistors (HEMTs) have revealed the superior properties of a high breakdown field and high electron saturation velocity. Reduction of the gate leakage current is one of the key issues to be solved for their further improvement. This paper reports that an Al layer as thin as 3 nm was inserted between the conventional Ni/Au Schottky contact and n-GaN epilayers, and the Schottky behaviour of Al/Ni/Au contact was investigated under various annealing conditions by current--voltage (I--V) measurements. A non-linear fitting method was used to extract the contact parameters from the I--V characteristic curves. Experimental results indicate that reduction of the gate leakage current by as much as four orders of magnitude was successfully recorded by thermal annealing. And high quality Schottky contact with a barrier height of 0.875 eV and the lowest reverse-bias leakage current, respectively, can be obtained under 12 min annealing at 450°C in N₂ ambience.     

AlGaN/GaN肖特基结参数分析与电流运输机理研究

通过对AlGaN/GaN HEMT器件肖特基栅电流输运机理的研究,在变温下采用I-V法对AlGaN/GaN上的Ni/Au肖特基势垒高度和理想因子进行了计算. 通过对不同电流机理的分立研究,得到了更为准确的势垒高度值_b. 通过分析温度在300—550K之间肖特基反向泄漏电流的特性,得出结论：AlGaN材料的表面漏电不是HEMT器件反向泄漏电流的主要来源. 关键词： AlGaN/GaN异质结 肖特基结 理想因子     

Leakage current and sub-bandgap photo-response of oxygen-plasma treated GaN Schottky barrier diodes

The effect of oxygen plasma treatment on the performance of GaN Schottky barrier diodes is studied. The GaN surface is intentionally exposed to oxygen plasma generated in an inductively coupled plasma etching system before Schottky metal deposition. The reverse leakage current of the treated diodes is suppressed in low bias range with enhanced diode ideality factor and series resistance. However, in high bias range the treated diodes exhibit higher reverse leakage current and corresponding lower breakdown voltage. The X-ray photoelectron spectroscopy analysis reveals the growth of a thin GaO_x layer on GaN surface during oxygen plasma treatment. Under sub-bandgap light illumination, the plasma-treated diodes show larger photovoltaic response compared with that of untreated diodes, suggesting that additional defect states at GaN surface are induced by the oxygen plasma treatment.     

Studying of barrier height and ideality factor relation in the nano sized Au-n type Si Schottky diodes

The results of formation of the operating potential barrier height (Φ_в) of inhomogeneous Schottky diodes (SD) in view of an additional electric field in the near contact region of the semiconductor and features of its dependence on the external applied voltage are presented. A correlation, between SD heterogeneity and dependence between potential barrier height (Φ_в) and ideality factor (n), is presented. Using conducting probe atomic force microscope (CP-AFM) techniques, it is shown that Au/n-Si diodes consist of sets of parallel-connected and cooperating nano diodes with the contact surfaces sizes in the order of 100-200 nm. The effective Φ_в and ideality factors of the SD have been obtained from the current-voltage (I-V) characteristics, which were measured using a CP-AFM along a contact surface. It was experimentally shown that the forward and reverse part of I-V characteristics and their effective Φ_в and ideality factors of the identically fabricated nano-SD differ from diode to diode. The Φ_в for the nano-SD has ranged from 0.565 to 0.723 eV and ideality factor from 1.11 to 1.98. No correlation can be found between the Φ_в and ideality factor. The Φ_в distribution obtained from the I-V characteristics has been fitted by a Gaussian function but the ideality factor distribution could not be fitted by a Gaussian function.     

不同封装方式对肖特基二极管高频性能的影响

肖特基二极管是太赫兹接收机的关键器件,通过在高频下对不同封装形式的肖特基二极管进行建模仿真,研究不同封装方式对肖特基二极管性能的影响。首先通过建立肖特基二极管的仿真模型,在高频结构仿真软件HFSS中对肖特基二极管在0~120GHz频段进行仿真,得到该肖特基二极管的S参数,并对S参数仿真结果和实测结果进行对比,证明了该二极管模型的准确性。然后分别建立肖特基二极管的普通封装模型和肖特基二极管的倒装芯片(flip-chip)封装模型,并对这两种封装模型进行仿真,得到其在两种不同封装结构下的S参数,进而对两种不同封装方式的S参数的-3dB带宽以及相位一致性进行对比分析。最终,对应用于太赫兹波段的肖特基二极管由于封装不同而带来的带宽以及相位的区别及其成因进行分析,论证了flipchip封装更适合应用于太赫兹波段的肖特基二极管,与普通封装相比,该封装在高频下对肖特基二极管的电性能有比较大的改进。     

不同封装方式对肖特基二极管高频性能的影响

肖特基二极管是太赫兹接收机的关键器件,通过在高频下对不同封装形式的肖特基二极管进行建模仿真,研究不同封装方式对肖特基二极管性能的影响。首先通过建立肖特基二极管的仿真模型,在高频结构仿真软件HFSS中对肖特基二极管在0~120 GHz频段进行仿真,得到该肖特基二极管的S参数,并对S参数仿真结果和实测结果进行对比,证明了该二极管模型的准确性。然后分别建立肖特基二极管的普通封装模型和肖特基二极管的倒装芯片(flip-chip)封装模型,并对这两种封装模型进行仿真,得到其在两种不同封装结构下的S参数,进而对两种不同封装方式的S参数的-3 dB带宽以及相位一致性进行对比分析。最终,对应用于太赫兹波段的肖特基二极管由于封装不同而带来的带宽以及相位的区别及其成因进行分析,论证了flip-chip封装更适合应用于太赫兹波段的肖特基二极管,与普通封装相比,该封装在高频下对肖特基二极管的电性能有比较大的改进。     

Simulation studies of current transport in metal–insulator–semiconductor Schottky barrier diodes

The current–voltage characteristics of Schottky diodes with an interfacial insulator layer are analysed by numerical simulation. The current–voltage data of the metal–insulator–semiconductor Schottky diode are simulated using thermionic emission diffusion (TED) equation taking into account an interfacial layer parameter. The calculated current–voltage data are fitted into ideal TED equation to see the apparent effect of interfacial layer parameters on current transport. Results obtained from the simulation studies shows that with mere presence of an interfacial layer at the metal–semiconductor interface the Schottky contact behave as an ideal diode of apparently high barrier height (BH), but with same ideality factor and series resistance as considered for a pure Schottky contact without an interfacial layer. This apparent BH decreases linearly with decreasing temperature. The effects giving rise to high ideality factor in metal–insulator–semiconductor diode are analysed. Reasons for observed temperature dependence of ideality factor in experimentally fabricated metal–insulator–semiconductor diodes are analysed and possible mechanisms are discussed.     

The modulation of Schottky barrier height of NiSi/n-Si Schottky diodes by silicide as diffusion source technique

This paper reports that the Schottky barrier height modulation of NiSi/n-Si is experimentally investigated by adopting a novel silicide-as-diffusion-source technique, which avoids the damage to the NiSi/Si interface induced from the conventional dopant segregation method. In addition, the impact of post-BF₂ implantation after silicidation on the surface morphology of Ni silicides is also illustrated. The thermal stability of Ni silicides can be improved by silicide-as-diffusion-source technique. Besides, the electron Schottky barrier height is successfully modulated by 0.11~eV at a boron dose of 10¹⁵~cm^-2 in comparison with the non-implanted samples. The change of barrier height is not attributed to the phase change of silicide films but due to the boron pile-up at the interface of NiSi and Si substrate which causes the upward bending of conducting band. The results demonstrate the feasibility of novel silicide-as-diffusion-source technique for the fabrication of Schottky source/drain Si MOS devices.     

静电放电对功率肖特基二极管I-V及低频噪声特性的影响

本文基于人体放电模型分别对肖特基势垒二极管的阴极和阳极进行同一电压脉冲下的多次放电, 利用热电子发射理论、1/f噪声的迁移率涨落模型和白噪声理论, 分别深入研究静电放电损伤对器件I-V和低频噪声的影响. 结果表明, 静电放电作用于肖特基二极管阴极时损伤更严重, 噪声参量变化率更大. 随着放电次数的增加, 正向特性无变化, 反向电流总体增大, 偶有减小; 而正向和反向 1/f噪声均增大. 鉴于噪声与应力条件下器件内部产生的缺陷与损伤有关, 且更敏感, 故可将低频噪声特性用作肖特基二极管的静电放电损伤灵敏表征工具.     

Parameter extraction for a Ti/4H-SiC Schottky diode

Based on the MIS model, a simple method to extract parameters of SiC Schottky diodes is presented using the $I$-$V$ characteristics. The interface oxide capacitance $C_\i$ is extracted for the first time, as far as we know. Parameters of 4H-SiC Schottky diodes fabricated for testing in this paper are: the ideality factor $n$, the series resistance $R_{\rm s}$, the zero-field barrier height $\phi_{\rm B0}$, the interface state density $D_{\rm it}$, the interface oxide capacitance $C_\i$ and the neutral level of interface states $\phi_0$.     

On the reverse leakage current of Schottky contacts on free-standing GaN at high reverse biases

In this work, a dislocation-related tunneling leakage current model is developed to explain the temperature-dependent reverse current–voltage(I–V –T) characteristics of a Schottky barrier diode fabricated on free-standing GaN substrate for reverse-bias voltages up to-150 V. The model suggests that the reverse leakage current is dominated by the direct tunneling of electrons from Schottky contact metal into a continuum of states associated with conductive dislocations in GaN epilayer.A reverse leakage current ideality factor, which originates from the scattering effect at metal/GaN interface, is introduced into the model. Good agreement between the experimental data and the simulated I–V curves is obtained.     

Breakdown characteristics of AIGaN/GaN Schottky barrier diodes fabricated on a silicon substrate

In this work, the breakdown characteristics of AlGaN/GaN planar Schottky barrier diodes （SBDs） fabricated on the silicon substrate are investigated. The breakdown voltage （BV） of the SBDs first increases as a function of the anodeto-cathode distance and then tends to saturate at larger inter-electrode spacing. The saturation behavior of the BV is likely caused by the vertical breakdown through the intrinsic GaN buffer layer on silicon, which is supported by the post-breakdown primary leakage path analysis with the emission microscopy. Surface passivation and field plate termination are found effective to suppress the leakage current and enhance the BV of the SBDs. A high BV of 601 V is obtained with a low on-resistance of 3.15 mΩ·cm^2.     

Breakdown characteristics of AlGaN/GaN Schottky barrier diodes fabricated on a silicon substrate

In this work, the breakdown characteristics of AlGaN/GaN planar Schottky barrier diodes(SBDs) fabricated on the silicon substrate are investigated. The breakdown voltage(BV) of the SBDs first increases as a function of the anodeto-cathode distance and then tends to saturate at larger inter-electrode spacing. The saturation behavior of the BV is likely caused by the vertical breakdown through the intrinsic GaN buffer layer on silicon, which is supported by the postbreakdown primary leakage path analysis with the emission microscopy. Surface passivation and field plate termination are found effective to suppress the leakage current and enhance the BV of the SBDs. A high BV of 601 V is obtained with a low on-resistance of 3.15 mΩ·cm2.     

Design and simulation of AlN-based vertical Schottky barrier diodes

The key parameters of vertical AlN Schottky barrier diodes(SBDs) with variable drift layer thickness(DLT) and drift layer concentration(DLC) are investigated. The specific on-resistance(R_(on,sp)) decreased to 0.5 m? · cm~2 and the breakdown voltage(V_(BR)) decreased from 3.4 kV to 1.1 kV by changing the DLC from 10~(15) cm~(-3) to 3×10~(16) cm~(-3). The VBRincreases from 1.5 kV to 3.4 kV and the Ron,sp also increases to 12.64 m? · cm~2 by increasing DLT from 4-μm to 11-μm. The VBRenhancement results from the increase of depletion region extension. The Baliga's figure of merit(BFOM) of3.8 GW/cm~2 was obtained in the structure of 11-μm DLT and 10~(16) cm~(-3) DLC without FP. When DLT or DLC is variable,the consideration of the value of BFOM is essential. In this paper, we also present the vertical AlN SBD with a field plate(FP), which decreases the crowding of electric field in electrode edge. All the key parameters were optimized by simulating based on Silvaco-ATLAS.     

Comparison of electrical characteristic between AlN/GaN and AlGaN/GaN heterostructure Schottky diodes

Ni/Au Schottky contacts on AlN/GaN and AlGaN/GaN heterostructures are fabricated.Based on the measured current–voltage and capacitance–voltage curves,the electrical characteristics of AlN/GaN Schottky diode,such as Schottky barrier height,turn-on voltage,reverse breakdown voltage,ideal factor,and the current-transport mechanism,are analyzed and then compared with those of an AlGaN/GaN diode by self-consistently solving Schrdinger’s and Poisson’s equations.It is found that the dislocation-governed tunneling is dominant for both AlN/GaN and AlGaN/GaN Schottky diodes.However,more dislocation defects and a thinner barrier layer for AlN/GaN heterostructure results in a larger tunneling probability,and causes a larger leakage current and lower reverse breakdown voltage,even though the Schottky barrier height of AlN/GaN Schottky diode is calculated to be higher that of an AlGaN/GaN diode.     

Comparison of electrical characteristic between AIN/GaN and AIGaN/GaN heterostructure Schottky diodes

Ni/Au Schottky contacts on A1N/GaN and A1GaN/GaN heterostructures are fabricated. Based on the measured current-voltage and capacitance-voltage curves, the electrical characteristics of AlN/GaN Schottky diode, such as Schottky barrier height, turn-on voltage, reverse breakdown voltage, ideal factor, and the current-transport mechanism, are analyzed and then compared with those of an A1GaN/GaN diode by self-consistently solving Schrodinger＇s and Poisson＇s equations. It is found that the dislocation-governed tunneling is dominant for both AlN/GaN and AlGaN/GaN Schottky diodes. However, more dislocation defects and a thinner barrier layer for AlN/GaN heterostrncture results in a larger tunneling probability, and causes a larger leakage current and lower reverse breakdown voltage, even though the Schottky barrier height of AlN/GaN Schottky diode is calculated to be higher that of an A1GaN/GaN diode.