Impurity distribution and electrical characteristics of boron-doped Si1−x Ge x /Si p +/N heterojunction diodes produced using pulsed UV-laser-induced epitaxy and Gas-immersion laser doping

A two-step pulsed UV-laser process which independently controls the metallurgical and electrical junction depth of a Si_1–x Ge _x /Si heterojunction diode has been implemented. Pulsed Laser-Induced Epitaxy (PLIE) combined with Gas-immersion Laser Doping (GILD) are used to fabricate boron-doped heteroepitaxial p ⁺/N Si_1–x Ge _x /Si layers and diodes. Borontrifluoride is used as the gaseous dopant source in the GILD process step. Boron incorporation and activation are investigated as a function of laser energy fluence and the number of laser pulses using SIMS and Halleffect measurements. The dose of incorporated dopant is on the order of 10¹³ cm^–2 per pulse. The B profiles obtained are flat except for a peak at the interface resulting from segregation effects. The B and Ge distributions are compared with shifts in the turn-on voltage of p ⁺/N Si_1–x /Si heterojunction diodes produced by the process. The GILD/PLIE process is spatially selective with the resulting diodes fabricated being quasiplanar. Hole mobilities in the heavily doped Si_1–x Ge _x films are found to be slightly lower than in comparable Si films.Presently at the Oregon Graduate Institute, Beaverton, OR 97006, USA     

Majority carrier transistor based on voltage-controlled thermionic emission

A new type of transistor is proposed based on gate-controlled charge injection in unipolar semiconductor structures. Its design has some similarity with the recently fabricated triangular barrier diodes but contains an additional input circuit which allows an independent control of the barrier height for thermionic emission. This circuit is provided by a MOS gate on the semiconductor surface. In the proposed device the current flows perpendicular to the semiconductor surface over a planar potential barrier controlled by the gate. The static transconductance characteristics and dynamical response are analyzed. The characteristic response time is limited by the time of flight of electrons across the structure and can be in the picosecond range. The gate voltage required to switch the output current at room temperature is of order 0.2 V.     

Dependence of photoluminescence of ZnO/Zn0.85Mg0.15O multi-quantum wells on barrier width

Temperature-dependent photoluminescence (PL) from two multi-quantum well (MQW) structures with different barrier widths has been systematically investigated. The PL band in the well layers is dominated by localized excitons (LE), D⁰X, and D⁰X-1LO. As the temperature increases, luminescence from the excitons localized in the well layers shows an ‘S’-shaped shift in the thin barrier MQW whereas a monotonic redshift is observed from the thick barrier MQW. Quenching of well-related emission is associated with delocalization of the excitons in the potential minima induced by interface fluctuations or alloy disorder. The activation energies correlated with depths of the local potential are deduced to be 7 and 17 meV for the thick and thin barrier MQWs, respectively.     

The changes of capacitance-loss and current-voltage characteristics of LaMnO3 + δ/SrTiO3:Nb heterojunctions exposed to ambient air

Effects of moisture absorption on capacitance-loss and current-voltage characteristics of LaMnO_3 + δ/SrTiO₃:Nb heterojunction had been investigated after the heterojunctions were exposed to ambient air. The moisture-absorption-induced increases in loss tangent and breakdown voltage were observed, whereas no changes were found on capacitance and diffusion voltage. These results were discussed by the decrease of oxygen ions in LaMnO_3 + δ and the generation of hydroxide ions at grain boundaries. This work will favor both electronic transport analysis and future device applications.     

Low‐voltage,high‐gain,and high‐mobility organic complementary inverters based on N,N′‐ditridecyl‐3,4,9,10‐perylenetetracarboxylic diimide and pentacene

The authors describe an organic complementary inverter with N,N′‐ditridecyl‐3,4,9,10‐perylenetetracarboxylic diimide as an n‐type semiconductor and pentacene as a p‐type semiconductor. Each transistor of the inverter exhibited high carrier mobility: 1.62 cm²/Vs for an n‐type drive transistor and 0.57 cm²/Vs for a p‐type switch transistor. The gain of the inverter reached 125. Another inverter using Ta₂O₅ as a high κ gate dielectric performed well with a gain of 500 and an operation voltage of only 5 V.

     

A Physics-Based Compact Direct-Current and Alternating-Current Model for AlGaN/GaN High Electron Mobility Transistors

A set of analytical models for the dc and small signal characteristics of AIGaN/GaN high electron mobility transis- tors （HEMTs） are presented. A modified transferred-electron mobility model is adapted and a phenomenological low-field mobility model is developed. We calculate the channel charge considering the neutralization of donors and the contribution of free electrons in the AlGaN layer. The gate-to-source and gate-to-drain capacitances are obtained analytically, and the cut-off frequency is predicted. The models are implemented into the HSPICE simulator for the dc, ac and transient simulations and verified by experimental data for the first time. A high efficiency class-E GaN HEMT power amplifier is designed and simulated by the HSPICE to verify the applicability of our models.     

A High Performance Silicon-on-Insulator LDMOSTT Using Linearly Increasing Thickness Techniques

We present a new technique to achieve uniform lateral electric field and maximum breakdown voltage in lateral double-diffused metal-oxide-semiconductor transistors fabricated on silicon-on-insulator substrates. A linearly increasing drift-region thickness from the source to the drain is employed to improve the electric field distribution in the devices. Compared to the lateral linear doping technique and the reduced surface field technique, twodimensional numerical simulations show that the new device exhibits reduced specific on-resistance, maximum off- and on-state breakdown voltages, superior quasi-saturation characteristics and improved safe operating area.     

Effect of modifying a methyl siloxane-based dielectric by a polymer thin film for pentacene thin-film transistors

We report on the fabrication of pentacene thin-film transistors (TFTs) utilizing a spun methyl siloxane-based spin-on-glass (SOG) dielectric and show that these devices can give a similar electrical performance as achieved by using pentacene TFTs with a silicon dioxide (SiO₂) dielectric. To improve the electrical performance of pentacene TFTs with the SOG dielectric, we employed a hybrid dielectric of an SOG/cross-linked poly-4-vinylphenol (PVP) polymer. The PVP film was deposited onto the spun SOG dielectric prior to pentacene evaporation, resulting in an improvement of the saturation field effect mobility (μ_sat) from 0.01 cm²/(V s) to 0.76 cm²/(V s). The good surface morphology and the matching surface energy of the SOG dielectric that was modified with the polymer thin film allow the optimized growth of crystalline pentacene domains whose nuclei are embedded in an amorphous phase.     

Temperature dependence of the current-voltage characteristics of the Al/Rhodamine-101/p-Si(1 0 0) contacts

The current-voltage (I-V) characteristics of Al/Rhodamine-101/p-Si/Al contacts have been measured at temperatures ranging from 280 to 400 K at 20 K intervals. A barrier height (BH) value of 0.817 eV for the Al/Rh101/p-Si/Al contact was obtained at the room temperature that is significantly larger than the value of 0.58 eV of the conventional Al/p-Si Schottky diode. While the barrier height Φ_b0 decreases the ideality factors (n) become larger with lowering temperature. The high values of n depending on the sample temperature may be ascribed to decrease of the exponentially increase rate in current due to space-charge injection into Rh101 thin film at higher voltage. Therefore, at all temperatures, it has been seen that the I-V characteristics show three different regions, the ohmic behavior at low voltages, and the space charge limited current with an exponential distribution of traps at high voltages.     

Morphology of the Si-ZnO interface

For Si-ZnO heterostructures, prepared by magnetron sputtering, the interface morphology is studied by XPS and UPS. ZnO films on Si(1 1 1) surfaces (H-termination and 7 × 7) were prepared by magnetron sputtering and metal organic molecular beam epitaxy (MOMBE) and are investigated in well defined deposition steps and the interface properties were studied in situ. All samples were handled in situ under ultra high vacuum (UHV) conditions. Up to five different interface phases were detected depending on ZnO preparation. Beside a SiO_x film induced by the sputter process, ZnO and Zn₂SiO₄ phases are resolved. In addition hydrogen, appearing as ZnOH_x, is found in considerable concentrations in the films.     

Theoretical Analysis of Current Crowding Effect in Metal/AIGaN/GaN Schottky Diodes and Its Reduction by Using Polysilicon in Anode

There exists a current crowding effect in the anode of AIGaN/GaN heterojunction Schottky diodes, causing local overheating when working at high power density, and undermining their performance. The seriousness of this effect is illustrated by theoretical analysis. A method of reducing this effect is proposed by depositing a polysilicon layer on the Schottky barrier metal. The effectiveness of this method is provided through computer simulation. Power consumption of the polysilicon layer is also calculated and compared to that of the Schottky junction to ensure the applicability of this method.     

Hysteresis in current transport in a GaAs diode containing self-assembled InAs quantum dots

We have observed hysteresis loops in current transport in a GaAs metal–semiconductor–metal diode containing InAs quantum dots. The dots in our structure are directly embedded under the GaAs–metal interface. The charging and discharging of electrons in the dots modulate the current and produce hysteresis. These processes are controlled by the applied voltages. The dots are charged by forward current flowing through the structure. The discharging of the electrons is dominated by the tunneling process under high reverse bias. The modulated currents are well fitted with an electron-trapping model considering both the ground states and the excited states of the quantum dots. Received: 5 October 2000 / Accepted: 12 December 2000 / Published online: 23 May 2001     

Current topics of silicon germanium devices

Silicon germanium (SiGe) is lattice mismatched to silicon by up to 4% depending on its Ge content. Basic investigations on strained layer growth, interface properties and deviation from equilibrium are done with SiGe/Si heterostructures. Early results are discussed in context with our recent understanding. The main focus of this overview is devoted to the micro- and optoelectronic devices which could be fabricated after solving or understanding the basic interface problems. This includes devices already in production, and those in emerging fields for inclusion in the next generation of integrated circuits, and a selection of device concepts with high merits to be proven in experiment.     

Gadolinium oxide high-k gate dielectrics prepared by anodic oxidation

The growth and properties of gadolinium oxide (Gd₂O₃) films prepared by anodic oxidation were investigated. Uniform Gd₂O₃ thin film with good oxide quality was obtained. The X-ray diffraction (XRD) pattern of the Gd₂O₃ films showed that they had a poly-crystalline structure. The dielectric constants of Gd₂O₃ films oxidized at 30 and 60 V are 9.4 and 12.2, respectively. The equivalent oxide thickness (EOT) of the Gd₂O₃ stacked oxide is in the range of 5.8-9.4 nm. The MOS capacitor with Gd₂O₃ exhibits interesting electrical properties. Longer oxidation time reduced the leakage current density for 30 V anodic oxidation but increased the leakage current density for 60 V anodic oxidation. This work reveals that Gd₂O₃ could also be an alternative dielectric for Si substrate and therefore, might pave the way to fabricate CMOS devices in the future.     

Nonlinear properties and stability against DC accelerated aging stress of praseodymium oxide-based ZnO varistors by Er2O3 doping

The microstructure, nonlinear properties, and stability against DC accelerated aging stress of ZnO-Pr₆O₁₁-CoO-based varistors doped with Er₂O₃ was investigated at sintering temperatures of 1300 and 1350 °C. The addition of Er₂O₃ to ZnO-Pr₆O₁₁-CoO-based varistor greatly improved the nonlinear properties and the varistor sintered at 1300 °C exhibited good nonlinearity, with nonlinear exponent of 52.8 and leakage current of 9.8 μA The increase of sintering temperature deteriorated the nonlinear properties, whereas it greatly improved the stability.     

Modification of the surface state and doping of CdTe and CdZnTe crystals by pulsed laser irradiation

The photoelectric and electrical properties of high-resistivity p-like CdTe and Cd_0.96Zn_0.04Te single crystals and barrier structures on their base before and after laser irradiation in different conditions are studied. Irradiation of samples with nanosecond ruby laser pulses was carried out in two different ways. In the first case, the Cd(Zn)Te crystals were subjected to laser action directly from the surface and irradiation within a certain range of intensities resulted in a decrease in the surface recombination rate and increase in the photoconductivity signal. The surface region with a wider bandgap in CdZnTe crystals was formed. In the second case, the samples were irradiated from the side pre-coated with a relatively thick In dopant film and it caused rectification in the I-V characteristics as a result of laser-induced doping of the thin Cd(Zn)Te surface region and formation of a built-in p-n junction. The application of the fabricated M-p-n structured In/Cd(Zn)Te/Au diodes for X-ray and γ-ray detectors is discussed.     

Investigation of electrical properties of organic 4-tricyanovinyl-N,N-diethylaniline thin film

Thin films of 4-tricyanovinyl-N,N-diethylaniline (TCVA) with different thickness were prepared using thermal evaporation technique. A relative permittivity, ?_r, of 3.04 was estimated from the dependence of capacitance on film thickness. The current density-voltage (J-V) characteristics of TCVA thin films have been investigated at different temperatures. At low-voltage region, the current conduction in the Au/TCVA/Au sandwich structures obeys Ohm's law. At the higher-voltage regions, the charge transport phenomenon appears to be space-charge-limited current (SCLC) dominated by an exponential distribution of traps with total trap concentration of 1.21 × 10²² m⁻³. In addition, various electrical parameters were determined.     

Selectively dopedn-AlxGa1−xAs/GaAs heterostructures with high-mobility two-dimensional electron gas for field effect transistors

In selectively dopedn-Al_xGa_1–xAs/GaAs heterostructures with high-mobility two-dimensional electron gas (2 DEG) at the heterointerface a second conductive channel exists, if the Al_xGa_1–xAs layer is not totally depleted from free carries. The occurrence of parallel conductance has a deleterious effect on the performance of high-electron mobility transistors (HEMTs) fabricated from this material. Although in principle computable, parallel conductance depends on a large number of design parameters to be chosen for the heterostructure, which are additionally affected by the presence of deep electron traps inn-Al_xGa_1–xAs of composition 0.25n-Al_xGa_1–xAs/GaAs heterostructures is shown.     

The conductance and capacitance-frequency characteristics of Au/pyronine-B/p-type Si/Al contacts

The rectifying junction characteristics of the organic compound pyronine-B (PYR-B) film on a p-type Si substrate have been studied. The PYR-B has been evaporated onto the top of p-Si surface. The barrier height and ideality factor values of 0.67 ± 0.02 eV and 2.02 ± 0.03 for this structure have been obtained from the forward bias current-voltage (I-V) characteristics. The energy distribution of the interface states and their relaxation time have been determined from the forward bias capacitance-frequency and conductance-frequency characteristics in the energy range of ((0.42 ± 0.02) − E_v)-((0.66 ± 0.02) − E_v) eV. The interface state density values ranges from (4.21 ± 0.14) × 10¹³ to (3.82 ± 0.24) × 10¹³ cm⁻² eV⁻¹. Furthermore, the relaxation time ranges from (1.65 ± 0.23) × 10⁻⁵ to (8.12 ± 0.21) × 10⁻⁴ s and shows an exponential rise with bias from the top of the valance band towards the midgap.     

Leakage current and capacitance characteristics of Si/SiO2/Si single-barrier varactor

We investigate, both experimentally and theoretically, current and capacitance (I–V/C–V) characteristics and the device performance of Si/SiO₂/Si single-barrier varactor diodes (SBVs). Two diodes were fabricated with different SiO₂ layer thicknesses using the state-of-the-art wafer bonding technique. The devices have very low leakage currents (about 5×10^-2 and 1.8×10^-2 mA/mm²) and intrinsic capacitance levels of typically 1.5 and 50 nF/mm² for diodes with 5-nm and 20-nm oxide layers, respectively. With the present device physical parameters (25-mm² device area, 760-μm modulation layer thickness and ≈10¹⁵-cm^-3 doping level), the estimated cut-off frequency is about 5×10⁷ Hz. With the physical parameters of the present existing III–V triplers, the cut-off frequency of our Si-based SBV can be as high as 0.5 THz. Received: 9 February 2001 / Accepted: 9 February 2001 / Published online: 23 March 2001