Design and implementation of a switched capacitor-based embedded hybrid DC–DC converter

The binary coded form of minterms for both minterms and reduced minterms is used in a very simple method for searching for prime implicants of logic functions. It only requires XOR and comparison operations.     

Analysis of high voltage step-up nonisolated DC–DC boost converters

A high voltage step-up nonisolated DC–DC converter based on coupled inductors suitable to photovoltaic (PV) systems applications is proposed in this paper. Considering that numerous approaches exist to extend the voltage conversion ratio of DC–DC converters that do not use transformers, a detailed comparison is also presented among the proposed converter and other popular topologies such as the conventional boost converter and the quadratic boost converter. The qualitative analysis of the coupled-inductor-based topology is developed so that a design procedure can be obtained, from which an experimental prototype is implemented to validate the theoretical assumptions.     

Critical conditions of saddle-node bifurcations in switching DC–DC converters

Although existence of multiple periodic orbits in some DC–DC converters have been known for decades, linking the multiple periodic orbits with the saddle-node bifurcation (SNB) is rarely reported. The SNB occurs in popular DC–DC converters, but it is generally reported as a strange instability. Recently, design-oriented instability critical conditions are of great interest. In this article, average, sampled-data and harmonic balance analyses are applied and they lead to equivalent results. Many new critical conditions are derived. They facilitate future research on the instability associated with multiple periodic orbits, sudden voltage jumps or disappearances of periodic orbits observed in DC–DC converters. The effects of various converter parameters on the instability can be readily seen from the derived critical conditions. New Nyquist-like plots are also proposed to predict or prevent the occurrence of the instability.     

Design and implementation of adaptive slope compensation in current mode DC–DC onverter

To improve the compensation for the inherent instability in a current mode converter, the adaptive slope compensation, giving attention to the problems of the traditional compensation on compensation accuracy, loading capability and turning jitter, is presented. Based on the analysis of current loop, by detecting the input and output voltage, converting the adaptive slope compensation current, the compensation of the current loop is optimized successfully. It can not only improve the compensation accuracy but also eliminate the over compensation, the turning jitter and the poor loading capability in the reported slope compensation. A power supply chip with adaptive slope compensation has been fabricated in a 0.35 μm CMOS process. The measurement results show that the chip starts up and operates steadily with the constant current limit under conditions of 5 V input voltage, from 10% to 100% duty cycle.     

Cascade controller with sliding-mode-voltage and current-mode for monolithic high frequency DC–DC converters

Modern control theories such as fuzzy control, sliding-mode control, optimal control, neural network control have been widely used in discrete-switching DC–DC converters, While they are seldom used in monolithic integration. Under parameter variation, large supply and load disturbance, high slew-rate current transient, high nonlinearity in today and future power management integrated circuits, linear control theories used in traditional monolithic DC–DC converters cannot satisfy required performance, which make it stringent to use modern control theories in monolithic DC–DC converters. This paper proposes cascade controller which consists of PWM based sliding-mode-voltage control and current-mode control for high frequency DC–DC converters. As long as the dynamic responses of the inner current loop are much faster than the outer sliding-mode-voltage loop, inner and outer loops operate in cascade-mode functionally. This work leads to an easy-to-follow design procedure to design control coefficients. To illustrate the feasibility of the scheme, a monolithic 100 MHz boost DC–DC converter using cascade controller with sliding-mode-voltage and current-mode is designed in SMIC 0.18 μm CMOS process. Several simulations are performed to validate the functionalities of the controller.     

Design of a hiccup mode over-current protection circuit for DC–DC switching converters

In the paper an improvement hiccup mode over-current protection circuit is proposed and successfully applied in a typical current-mode DC–DC switching converter. It greatly reduces the circuit power consumption in prolonged overload conditions and can provide smooth self-recovery once the overload condition is removed. By reducing the switching frequency and over-current threshold value, it further improves the effect of over-current protection. The power consumption and implementation area are minimized by digital control. By simulation and verification with HSPICE, the output average current is only 16.8% of the conventional over-current mode in continuous over-current conditions. The presented circuits can automatically recover with the maximum load (5 A) when the overload is removed.     

A brief review of models of DC–DC power electronic converters for analysis of their stability

A brief review of models of DC–DC power electronic converters (PECs) is presented in this paper. It contains the most popular, continuous-time and discrete-time models used for PEC simulation, design, stability analysis and other applications. Both large-signal and small-signal models are considered. Special attention is paid to models that are used in practice for the analysis of the global and local stability of PECs.     

Large-area β-Ga2O3 Schottky barrier diode and its application in DC–DC converters

We demonstrate superb large-area vertical β-Ga₂O₃ SBDs with a Schottky contact area of 1 × 1 mm² and obtain a high-efficiency DC–DC converter based on the device. The β-Ga₂O₃ SBD can obtain a forward current of 8 A with a forward voltage of 5 V, and has a reverse breakdown voltage of 612 V. The forward turn-on voltage(VF) and the on-resistance(Ron) are 1.17 V and 0.46 Ω, respectively. The conversion efficiency of the β-Ga₂O_3<...     

Limitation of soft-switching technique in AC/DC power converter’s efficiency improvement

Soft-switching techniques are attractive to unity-power-factor AC/DC converter in the view of the size reduction and EMI suppression. A soft-switched boost PFC converter has been studied based on its topology analysis, PSIM simulation and circuit experiment. A special limitation of soft-switching techniques has been found in their AC/DC applications. Sponsored by the Scientific Research Foundation for the Returned Overseas Chinese Scholars, Ministry of Education     

Efficient optimization of fully-integrated inductive DC–DC converters comprising tapered inductor layout synthesis and temperature effects

The evolution of computer-aided design tools has extended the capabilities of a designer by pushing the optimality of complex circuits beyond the ad hoc manual implementation. This work presents a framework to co-optimize the circuit and the layout parameters of fully integrated inductive DC–DC converters. The framework comprises expensive optimization that is speeded up by active learning sample selection and evolutionary techniques to acquire an optimal converter. A tapered inductor topology is used to increase the quality of the on-chip inductor and to improve the efficiency of the overall monolithic DC–DC converter. The optimization framework is validated by co-optimizing the design parameters and the tapered inductor layout for a fully-integrated DC–DC boost converter in a 0.13 μm CMOS technology. The power loss in the circuit is reduced with 27 % resulting in a 7 % efficiency improvement, compared to a fully-integrated DC–DC boost converter with a regular inductor topology.     

Analysis of quantum efficiency and optical enhancement in amorphous Si p–i–n solar cells

The effect of i-layer thickness, tin oxide texture, and back reflector (BR) on optical enhancement has been systematically studied in a series of 20 a-Si p–i–n solar cells. The internal quantum efficiency has been analyzed by a simple model based on the work of Schade and Smith. The enhancement of optical absorption is characterized by m, a wavelength-dependent fitting parameter representing the increase in optical pathlength relative to the i-layer thickness d. Solar cells with an Al BR have negligible optical enhancement, with m < 1.5, consistent with large parasitic absorption at the Al/Si interface as reported by others. Solar cells on highly textured SnO₂ with ZnO/Al or ZnO/Ag BR have peak values of m ∼ 3–4, with ZnO/Ag having slightly larger values than ZnO/Al. It was found that m has a strong dependence on the product αd, and that maximum values of m increase with reflectivity of the BR. It is shown that a major source of parasitic absorption loss at long wavelengths is light trapping in the textured SnO₂ front contact. Copyright © 2002 John Wiley & Sons, Ltd.     

Analysis and Experimental Study of Proportional-Integral Sliding Mode Control for DC／DC Converter

DC/DC converter using the proportional-integral (PI) sliding mode control (SMC)scheme is investigated, including the selection of the switching surface, the proof of the reaching condition and the existence condition of sliding motion. The sliding regime and the local stability are given. The implementation of the PI SMC is simpler than other SMC schemes and the steady-state error is eliminated. A prototype based on Buck converter is built up. The experimental results show that the dynamic performance and robustness to the parameter variations and external disturbances are improved.     

A Very Fast Method for the DC Analysis of Diode–Transistor Circuits

The paper offers a universal method for finding a unique or multiple DC operating points of nonlinear circuits. The developed method is based on the theory known as a linear complementarity problem (LCP) and the homotopy concept. It is a combination of Lemke’s method for solving LCP and some variant of the homotopy method. To express the problem of finding DC operating points in terms of LCP, an appropriate piecewise–linear approximation of diode characteristic is proposed. Although the method does not guarantee finding all the DC operating points, usually it finds them. The method is very fast and remarkably efficient. Numerical examples, including practical BJT and CMOS circuits having a unique or multiple DC operating points are given.     

A high efficiency transmitter and receiver for magnetic resonant wireless battery charging system in 0.35 μm BCD

This paper presents a transmitter and receiver for magnetic resonant wireless battery charging system. In the receiver, a wide-input range CMOS multi-mode active rectifier is proposed for a magnetic resonant wireless battery charging system. The configuration is automatically changed with respect to the magnitude of the input AC voltage. The output voltage of the multi-mode rectifier is sensed by a comparator. Furthermore, the configuration of the multi-mode rectifier is automatically selected by switches as original rectifier mode, 1-stage voltage multiplier or 2-stage voltage multiplier mode. As a result, a rectified DC voltage is output from 7.5 to 19 V for an input AC voltage of 5–20 V. In the transmitter, a class-E power amplifier (PA) with an automatic power control loop and load compensation circuit is proposed to improve the power efficiency. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This chip is implemented using 0.35 μm BCD technology with an active area of around 5,000 × 2,500 μm. When the magnitude of the input AC voltage is 10 V, the power conversion efficiency of the multi-mode active rectifier is about 94 %.The maximum power efficiency of the receiver is about 70 %. The transmitter provides an output power control range of 10–30.2 dBm. The maximum power efficiency of the PA is 71.5 %.     

Thermal analysis and design of a 75-W hybrid-type DC–DC converter for space applications

Hybrid DC–DC converters for space applications should be designed for operation at full rated power within the military specification for temperature range of −55 to +125 °C. Hence, the thermal design is a crucial step in the design process of converter, ensuring that no component of the converter exceeds its rated maximum operating temperature. One of the objectives of this work is to guarantee that all electronic components operate below their maximum allowable temperature. For this purpose, a three dimensional model of a converter based on the finite element method was developed. Results based on numerical simulation were validated by experimental data from infrared camera. The total amount of dissipated power in every component was determined experimentally based on a prototype converter. In the case of a component with high power consumption, such as the field effect transistor, the increase in temperature was minimized by applying designed heat sink with a high-thermal-conductivity material.     

Collaborative R&D between multicrystalline silicon ingots and battery efficiency improvement——effect of shadow area in multicrystalline silicon ingots on cell efficiency

We characterized strip-like shadows in cast multicrystalline silicon (mc-Si) ingots.Blocks and wafers were analyzed using scanning infrared microscopy,photoluminescence spectroscopy,laser scanning confocal microscopy,field-emission scanning electron microscopy,X-ray energy-dispersive spectrometry,and microwave photoconductivity decay technique.The effect on solar cell performance is discussed.The results show that the non-microcrystalline shadow region in Si ingots consists of precipitates of Fe,O,and C.The size of these Fe-O-C precipitates found at the shadow region is ～25μm.Fe-O-C impurities can slightly reduce the minority carrier lifetime of the wafers while severely decrease in shunt resistance,leading to the increase in reverse current of the solar cells and degradation in cell efficiency.     

Design of Novel Dual Input DC–DC Converter for Energy Harvesting System in IoT Sensor Nodes

A new DC–DC converter capable of working with more than one source for harvesting energy from clean energy sources is proposed. Key features of this proposed converter are single inductor and reduced total number of components. In addition the converter has reduced stresses and power losses. Dual input and output modes, with its operation and steady-state analysis are discussed. Comparative study of the topologies given in literature with a proposed topology for parameters considered like the number of components and voltage gain is presented. Compatibility of the proposed converter is proved with reduced losses using loss distribution analysis of the converter and it is more reliable for energy system in telecom applications, which is validated using reliability analysis, is also highlighted. Finally, to substantiate the working of the non isolated DC–DC converter considered the test results are presented.

     

Analysis of Phonon Modes and Electron–Phonon Interaction in Quantum-Cascade Laser Heterostructures

Semiconductors - The phonon modes of quantum-cascade heterostructures based on binary and ternary semiconductor compounds are simulated. The dependences of the frequencies of the structure...     

Collaborative R&amp;D between multicrystalline silicon ingots and battery efficiency improvement—effect of shadow area in multicrystalline silicon ingots on cell efficiency

We characterized strip-like shadows in cast multicrystalline silicon (mc-Si) ingots. Blocks and wafers were analyzed using scanning infrared microscopy, photoluminescence spectroscopy, laser scanning confocal microscopy, field-emission scanning electron microscopy, X-ray energy-dispersive spectrometry, and microwave photoconductivity decay technique. The effect on solar cell performance is discussed. The results show that the non-microcrystalline shadow region in Si ingots consists of precipitates of Fe, O, and C. The size of these Fe–O–C precipitates found at the shadow region is ~25 μm. Fe–O–C impurities can slightly reduce the minority carrier lifetime of the wafers while severely decrease in shunt resistance, leading to the increase in reverse current of the solar cells and degradation in cell efficiency.     

Performance Analysis of Combined mMCSK–mMFSK Modulation in AWGN and Rayleigh Fading Channel

As there are many use cases considered for robotics communications, the data rate variation may be very large. Some sensor applications may require very low data rate, telemetry data may require low-to-medium data rates and e.g. video application will require high data rates. On the other hand, robots may have to operate in very difficult radio propagation environments such as nuclear power plants or industrial facilities. To combat difficult propagation characteristics, an often used and well known mechanism is to use spread spectrum signal structures. Thus in this paper a novel modulation method is considered which offers the inherent signal structure and processing opportunities of spread spectrum signal and at the same time offers an easy mechanism to adapt the data rate from low to high depending on the requirement at hand thus addressing two important communication requirements for robotics. The introduction of $m$ MFSK generated the idea of applying the given approach to other modulation methods. To further enlarge the modulation alphabet sizes (with the price of larger spectrum usage) it was realized that combining the $m$ MFSK and $m$ MCSK would be an interesting choice. The $m$ MCSK– $m$ MFSK modulation is hence considered. A method to analyze this two-component modulation is developed and the performance analyses give results for $m$ MCSK– $m$ MFSK modulation in AWGN and flat Rayleigh fading channels for both coherent and non-coherent receivers. The performance was also assessed with orthogonal and non-orthogonal code constructs for coherent receiver.