功率RMOS器件的优化设计

从ＲＭＯＳ器件的导通电阻模型出发，通过分析导通电阻与栅氧化层厚度和槽深间的定量关系，得出：减薄栅氧化层厚度或增加槽的深度，可以降低器件的导通电阻和器件的反向耐压；反之，器件的导通电阻和反向耐压增加。同时，浅槽结构比深槽结构更理想。文中还讨论了器件的版图布局。结果表明，条形结构优于元胞结构。     

节能化：功率器件的永恒主题

针对各类设备的小型化、低功耗化、高效化和高速化的要求,人们加紧了相应的功率器件的研制开发。另外,功率器件的基本构造正在从双极型MOS型过渡,作为MOS器件的功率MOSFET、IGBT(Insulated Gage Bipolar Transistor)和IPD(Intelligent Power Device智能型功率器件)都在努力扩大自己的应用领域。 目前,随着人们环保意识的增强,市场对节能型电气设备的需求量逐渐上升,空调、冰箱等家用电器大量采用变频技术便是一个很好的例证,而作     

MOSFET功率开关器件的散热计算

文中介绍了以MOSFET为代表的功率开关器件功率损耗的组成及其计算方法，给出了功率器件散热器的热阻计算方法和步骤．简要说明了在采用风冷散热时应遵循的一般准则。     

功率MOSFET参数测试仪的设计

功率MOSFET参数测试仪是用来测试功率MOSFET电特性参数的仪器设备（如阈值电压、跨导等）。以单片机为核心,介绍功率MOSFET参数测试仪的原理、设计及实现,设计了电特性参数测试的具体电路,编写了测试控制程序,通过对设计出的测试仪系统进行实验和调试,可以准确测量功率MOSFET的阈值电压、跨导、栅源漏电流、零栅压漏极电流及耐压。     

VMOS场效应管音频功率放大器设计

介绍了VMOS功率场效应管的特性和普通双极性晶体管的设计差异,讨论了VMOS功率放大电路的设计理念,并分别说明了各级放大器设计的思想。     

中国功率器件市场发展现状

功率器件包括功率IC和功率分立器件,功率分立器件则主要包括功率MOSFET、大功率晶体管和IGBT等半导体器件,功率器件几乎用于所有的电子     

实际应用条件下Power MOSFET开关特性研究(上)

针对实际应用中Power MOSFET开关工作状况与现有文献的描述有很大不同,使用不当易造成器件的损坏和设备的崩溃这一现象,在应用条件下对Power MOSFET开关特性进行了研究,深入分析了Power MOSFET的开关过程,提出了关于开关过程四阶段的新观点,并采用对开关过程的等效输入电容进行分段线性化的新方法对不同阶段的开关参数进行了计算,搭建了开关特性实验电路,实验结果表明,提出的Power MOSFET开关过程四阶段的新观点是正确的,等效输入电容分段线性化的新方法是合理的。     

MOSFET器件回顾与展望(下)

介绍了新颖的MOS器件结构及鳍状FET器件研究最新进展, 比较了几种主要新颖半导体器件的特性,指出了MOSFET尺寸缩小所面临的巨大挑战及解决办法,展望了器件未来发展趋势.     

A novel trench gate floating islands power MOSFET (TG-FLIMOSFET): Two-dimensional simulation study

Novel trench gate floating islands MOSFET (TG-FLIMOSFET) designed using the concept of “Opposite Doped Buried Regions” (ODBR) and floating islands (FLI) along with trench gate technology is proposed and verified using two-dimensional simulations. The conventional FLIMOSFET experimentally demonstrated recently, although offers lowest on-resistance in the low voltage range, however, suffers from quasi-saturation effect like any other power MOSFETs. The proposed TG-FLIMOSFET demonstrated to obtain about 30% reduction in peak electric field in drift region of the proposed device. TG-FLIMOSFET also demonstrates quasi-saturation free forward and transconductance characteristics, improved synchronous rectifying characteristics, identical breakdown voltage, reduced on-resistance and increased transconductance ‘gm’ when compared with the conventional FLIMOSFET for various trench geometries. The proposed device breaks the limit set by the conventional FLIMOSFET approximately by a factor of 10. A possible process flow sequence to fabricate the proposed device commercially by integrating multi-epitaxial process with trench gate technology is also presented.     

低温下功率MOSFET的特性分析

文章完成了对功率MOSFET（Metal Oxide Semiconductor Field Effect Transistor）闽值电压和通态阻抗在77K-300K范围内的实验测试，并结合上述两个参数宽温区的数学模型进行了相应的分析．从实验结果中．我们发现阀值电压随温度的降低略有升高；而通态阻抗随温度的降低则下降得非常明显。通态阻抗是影响功率MOSFET开关损耗的重要参数，所以在低温下功率MOSFET的开关损耗将大幅度下降。     

一种用于无刷直流电机控制系统的MOSFET栅极驱动电路

介绍了一种用于无刷直流电动机控制系统的MOSFET栅极驱动电路,该电路完全利用分立元件.具有结构简单、安全可靠和实用性强等特点,该电路采用自举法驱动高压侧开关MOSFET,设置了死区时间以避免桥臂导通.并利用缓冲电阻减小振荡,通过设置合适的门极驱动电压减少了损耗,使电路效率得到了提高.     

Self-aligned vertical double-gate MOSFET (VDGM) with the oblique rotating ion implantation (ORI) method

A process of making a symmetrical self-aligned n-type vertical double-gate MOSFET (n-VDGM) over a silicon pillar is revealed. This process utilizes the technique of oblique rotating ion implantation (ORI). The self-aligned region forms a sharp vertical channel profile and decreases the channel length L_g. A tremendous improvement in the drive-on current is noted. The electron concentration profile obtained demonstrates an increased number of electrons in the channel injected from the source end as the drain voltage increases. The enhanced carrier concentration results in significant reduction in the off-state leakage current and improves the drain-induced barrier-lowering (DIBL) effect. These simulated characteristics when compared to those in a fabricated device without the ORI method show the distinct advantage of the technique reported for suppression of short-channel effects (SCE) in nanoscale vertical MOSFET.     

一种精确测量MOSFET晶圆导通电阻的方法

导通电阻的准确测量是低导通电阻MOSFET晶圆测试中的一个难点。要实现毫欧级导通电阻的测试,必须用开尔文测试法;但实际的MOSFET晶圆表面只有两个电极(G、S),另外一个电极(D)在圆片的背面,通常只能将开尔文的短接点接在承载圆片的吸盘边缘,无法做到真正的开尔文连接,由于吸盘接触电阻无法补偿而且变化没有规律,导致导通电阻无法精确测量。介绍了一种借用临近管芯实现真正开尔文测试的方法,可以实现MOSFET晶圆毫欧级导通电阻准确稳定的测量。     

基于变压器隔离的功率MOSFET驱动电路参数设计

介绍了基于单电容变压器隔离及双电容变压器隔离的功率MOSFET驱动电路,并对驱动电路中各元器件的参数设计进行了详细的论述。进一步对所提出的设计方法进行了实验验证,实验结果表明该设计方法是合理有效的,驱动波形平滑无振荡,并且有较快的上升时间。     

GeSiMOSFET的纵向结构对器件性能的影响

为了研究器件参数对GeSi MOSFET器件性能的影响,本文在建立一个简单的GeSi MOSFET的器件模型的基础上,对GeSi MOSFET的纵向结构进行了系统的理论分析.确定了纵向结构的CAP层厚度、沟道层载流子面密度、DELTA掺杂浓度以及量子阱阱深之间的关系,得出了阈值电压与DELTA掺杂浓度、栅氧化层厚度及CAP层厚度之间的关系,还得出了栅压与沟道载流子面密度、栅氧化层厚度及CAP层厚度之间的关系.并且在此基础上得出了一些有意义的结果.为了更细致、精确地进行分析,我们分别对GeSi PMOSFET和GeSi NMOSFET在MEDICI上做了模拟.     

Laterally amalgamated DUal Material GAte Concave (L-DUMGAC) MOSFET for ULSI

In this paper, a novel structure: Laterally amalgamated DUal Material GAte Concave (L-DUMGAC) MOSFET is proposed. The effectiveness of L-DUMGAC MOSFET design was examined by comparing Single Material Gate (SMG) Concave devices with L-DUMGAC devices of various gate length ratios, Negative Junction Depths (NJDs) and metal gate work functions, and it was found that L-DUMGAC exhibits significant enhancement in device characteristics in terms of device efficiency, intrinsic gain, early voltage and the switching characteristics. With the enhancement in device integration technology, the structure offers new opportunities for realizing high performance in the future ULSI production.