SoC设计语言：SystemC

应用的需求和集成电路工艺的发展促进了复杂的片上系统(SoC)的实现，同时也要求新的设计方法以支持复杂SoC的设计。高效率的软硬件联合设计需要对整个SoC进行更高层次(例如Transaction Level)的抽象以提供更快的仿真速度及更高效率的SoC设计验证方法。本文介绍了一种重要的SoC设计语言：SystemC，以及基于SystemC的Transaction Level模型和使用Transaction Level模型进行SoC的软硬件联合设计的方法。     

扫描单元及其在ASIC可测性设计中的应用

本文首先论述ＡＳＩＣ可测性的必要性，然后介绍了几种常见的扫描单元，最后给出了多种选择触发器方法、时钟扫描方法、电平敏感扫描方法等几种内部扫描方法。     

Vista在SystemC模型中的调试分析方法

ESL建模的主要语言是SystemC。虽然SystemC是C＋＋的一个类库,但其许多硬件特性在常用的C＋＋IDE中无法全部体现,这为调试分析ESL模型带来了很大的困难。而MentorVista针对SystemC的硬件特性,带有很多硬件特性的调试功能,从硬件的角度去调度分析SystemC模型,明显的减少程序的调试时间,并且能直观的观测分析仿真结果,从而带来效率上的提升,为ESL模型正确性提供了有力保障。     

基于SystemC的UART设计

随着集成电路设计规模的不断扩大,SOC设计的时代已经到来。SystemC作为一种新兴的SOC设计语言,它本质上是在C++的基础上添加的硬件扩展库和仿真核,这使得SystemC可以建模不同抽象级别的包括软件和硬件的复杂电子系统。在C++环境中,它支持软件、硬件和接口描述。利用SystemC的这些特性实现了对UART的建模,并用波形图验证了仿真结果。     

ASIC电路在雷达信号处理中的应用

介绍了对消求模电路,ＣＦＡＲ电路,ＡＣＡ校正电路,复数乘法累加器,ＦＩＲ滤波器等ＡＳＩＣ电路的基本原理和功能,以及各种ＡＳＩＣ电路在雷达信号处理中的应用。     

嵌入式存储器的通用 SystemC模型设计

本文提出了一个基于SystemC的通用存储器模型,可以作为构造SoC的通用IP模型。该模型采用统一的事务级接口,内部控制逻辑和存储器构成采用时钟精准的模型,并且提供了一系列配置参数用来反映影响性能的带宽、延时、以及仲裁机制。该模型成功预测了一个视频解码器中共享SRAM 所采用bank数量对性能的影响。     

点数可配置FFT处理器ASIC设计

本文提出了一种利用Radix-2² FFT算法实现的可配置点数的FFT处理器硬件实现结构。Radix-2² FFT算法最后一级碟形运算单元可以选择碟形1或者碟形1/碟形2,从而可以完成任意2n点FFT运算。据此提出可配置点数的FFT硬件结构,采用串行流水线单路延时置换结构,完成2048～256序列点数的可配置FFT处理器ASIC设计。芯片测试结果验证了基于Radix-2²算法的可配置点数FFT硬件结构可以完成4096～256点数频谱分析,4096点FFT计算时间少于90.02us,运算精度SQNR可以达到50.65dB,满足运用需求。     

CAD tools for ASIC design

Computer aids have been used for both the design and verification of electronic systems for many years. The recent explosion in the complexity of electronic systems that the advent of Very Large Scale Integration (VLSI) has allowed, has made the use of sophisticated computer-aided design tools indispensable. Computer aids will soon also provide key proprietary advantages as semiconductor and system design houses vie for the promising Application-Specific IC (ASIC) market of the next decade. This paper focusses on the techniques critical to both custom and ASIC design, the directions of present research and development for these areas, and future trends. In particular, recent developments in tools for the automated design of combinational logic are reviewed. These techniques include both algorithmic and rule-based approaches.     

Service assurance in modern telecommunications networks

Modern telecommunications network design and examples of possible causes of service interruption are examined, using AT&T 800 Service for illustration. Different methods of assuring service technically are presented. It is shown how end-to-end service reliability can be improved by using the techniques described, applying them to 800 Service as an example. Techniques used to restore generic switched services or private line services after a failure within a network are also presented     

A conceptual framework for ASIC design

An attempt is made to gain a better understanding of the nature of ASIC (application-specific integrated circuit) design. This is done from a decision-making perspective, in terms of three knowledge frames: the design process, the design hyperspace, and the design repertoire. The design process frame emphasizes the hierarchical design approach and presents the methodology as a formalization of the design process. The design hyperspace concept relates to the recognition of design alternatives. Analysis techniques for evaluating algorithmic and architectural alternatives are collected and classified to form the design repertoire. This conceptual framework is an effective instrument for bridging the widening gap between system designers and VLSI technology. It also provides a conceptual platform for the development of tools for high-level architectural designs     

红外焦平面非均匀性校正ASIC芯片设计

提出了一个基于ASIC的红外焦平面非均匀校正解决方案。首先介绍了改进的定标及校正算法,并对校正效果进行了验证。改进后的算法对存储单元的需求与原先相比大大减小,因此十分适合ASIC实现。然后介绍了芯片的架构和控制结构,最后介绍了芯片的实现。该芯片采用0.25 μm工艺,对减小探测器系统体积,提高探测器系统的稳定性和可靠性有很大的帮助。     

适用于功率ASIC的BiCMOS技术

本文论述了一种适用于功率ASIC应用、以双极功率IC工艺为基础的BiCMOS技术,着重讨论了工艺对器件性能的影响,指出影响兼容的关键是栅氧的制作和降低高压大电流工作下晶体管的饱和压降。采用该技术获得了良好的高压大电流性能。     

Applications '90: telecommunications

Significant and ongoing developments during 1989 are summarized. Satellites are moving into an era of multiple beams and high-gain spot beams, supplementing global communications coverage and permitting the use of very small antennas. Commercial ISDN services have begun. Cellular radio systems around the world are testing digital systems to replace their analog FM equipment. Cordless telephones are moving outside the home and may merge with cellular systems, enabling users to carry their phones with them. In the US, the seven Bell regional operating companies, created when AT&T Co. was dismantled six years ago, are still fighting to be freed from court-mandated restrictions against entering long-distance, manufacturing, or information services markets     

Analog/digital ASIC design for testability

The author addresses three issues in design for testability (DFT) for mixed analog/digital application-specific integrated circuit (ASIC) chips: controllability, observability, and completeness in testing. These are examined for commonly used analog functions, and the results culminate in an architecture for testable mixed analog and digital circuits. The architecture is designed to solve the problems associated with testing basic circuit configurations for different types of commonly used analog macros. Using the recommended architecture to gain access to control and observation test points in the analog portions of the mixed analog/digital ASIC, a series of analog test tables for several different analog functions have been derived. The analog test procedures are independent of any digital design for testability that might be used in the digital portions of the ASIC. General testing procedures for current analog/digital ASICs are described along with desirable characteristics for testers for this type of circuit     

Efficient synthesis algorithm for low-power ASIC design

The authors propose an efficient synthesis algorithm for the synthesis of RT-level hardware with low power consumption. The proposed algorithm minimises the overall power consumption of generated datapath by reducing spurious operations. Experimental results for several benchmark circuits under various synthesis constraints show the efficiency of the proposed algorithm     

Applications of voice processing to telecommunications

The ways in which people communicate are changing rapidly. The options are many and diverse, ranging from voice calls over wireless networks, to video calls over the conventional wired network, ISDN video, FAX, e-mail, voice mail, beeper services, data services, audio teleconferencing, video teleconferencing, and so-called scribble phone service (transmission of arbitrary handwritten input). This revolution in communications is being fueled by several sources, including the availability of low-cost, low-power, computation in both DSP and RISC chips, larger and cheaper memory chips, improved algorithms for communications (e.g., modems, signaling) and signal processing, and finally the creation of world-wide standards for transmission, signal compression, and communication protocols. The broad goal of the communications revolution is to provide seamless and high-quality communications between people (or groups of people), anywhere, anytime, and at a reasonable price. Although there are many technologies that form the bases for the communications environment of the twenty-first century, one of the key technologies for making the vision a reality is voice processing. In this paper we attempt to show, by example, how voice processing has been applied to specific problems in telecommunications, and how it will grow to become an even more essential component of the communications systems of the twenty-first century     

基于SystemC和Cocentric System Studio设计平台的SoC设计

SystemC是一种基于C 的新型的描述语言.基于SystemC的软硬件协同设计比传统设计方法更加灵活.Cocentric System Studio(CCSS)是Synopsys公司推出的基于SystemC的系统开发和模拟工具.本文讨论了利用CCSS平台和SystemC语言进行设计、仿真和调试的方法.