Laser singulation of thin wafer: Die strength and surface roughness analysis of 80 μm silicon dice

In this paper, we have studied the characteristics of silicon dice, singulated using a high-power-high-repetition-rate femtosecond laser. The die strength and surface roughness, of the die side walls, are evaluated for different laser parameters such as pulsewidth and repetition rate. Since, the 80-μm-thick wafers used in this study were polished on both sides, die-edge roughness plays a decisive factor in determining the die strength when compared to backside roughness and wafer thickness as is the case in other studies. Excellent side wall average surface roughness of 0.35 μm is obtained at pulsewidth of 214 fs and repetition rate of 4.33 MHz using an average laser power of 15.5 W. Die strength is measured via the 3-point bending test. Strength reduction, due to die side wall surface defects that are induced through the wafer dicing process, is evaluated through die strength and surface roughness analysis. Die strength of a silicon dice is characterized as the first step in prediction and prevention of die failure during the package assembly, reliability test and working life. Improvement in the die side wall surface roughness is observed with the usage of nitrogen gas assist as compared to that obtained in air.     

High-density-plasma (HDP)-CVD oxide to thermal oxide wafer bonding for strained silicon layer transfer applications

Direct wafer bonding between high-density-plasma chemical vapour deposited (HDP-CVD) oxide and thermal oxide (TO) has been investigated. HDP-CVD oxides, about 230 nm in thickness, were deposited on Si(0 0 1) control wafers and the wafers of interest that contain a thin strained silicon (sSi) layer on a so-called virtual substrate that is composed of relaxed SiGe (∼4 μm thick) on Si(0 0 1) wafers. The surfaces of the as-deposited HDP-CVD oxides on the Si control wafers were smooth with a root-mean-square (RMS) roughness of <1 nm, which is sufficiently smooth for direct wafer bonding. The surfaces of the sSi/SiGe/Si(0 0 1) substrates show an RMS roughness of >2 nm. After HDP-CVD oxide deposition on the sSi/SiGe/Si substrates, the RMS roughness of the oxide surfaces was also found to be the same, i.e., >2 nm. To use these wafers for direct bonding the RMS roughness had to be reduced below 1 nm, which was carried out using a chemo-mechanical polishing (CMP) step. After bonding the HDP-CVD oxides to thermally oxidized handle wafers, the bonded interfaces were mostly bubble- and void-free for the silicon control and the sSi/SiGe/Si(0 0 1) wafers. The bonded wafer pairs were then annealed at higher temperatures up to 800 °C and the bonded interfaces were still found to be almost bubble- and void-free. Thus, HDP-CVD oxide is quite suitable for direct wafer bonding and layer transfer of ultrathin sSi layers on oxidized Si wafers for the fabrication of novel sSOI substrates.     

Optical inspection system with tunable exposure unit for micro-crack detection in solar wafers

Micro-cracks are a major cause of wafer breakage in the solar wafer manufacturing process. Furthermore, the existence of micro-cracks may lead to electrical failure in the post-fabrication inspection of solar cells and solar modules. Thus, the reliable detection of micro-cracks is an important concern in the photovoltaic industry. Accordingly, the present study proposes a novel micro-crack inspection system comprising a near infrared light source, a CCD camera and a tunable exposure unit. In the proposed system, the intensity of the light transmitted through the wafer is sensed by a photodetector and the exposure time of the CCD camera is tuned accordingly in order to maximize the contrast of the CCD image; thereby improving the performance of the crack detection process. The experimental results show that the proposed system enables the reliable detection of micro-cracks in solar wafers with a thickness of up to 240 μm within 1 s. In other words, the system provides an ideal solution for on-line micro-crack inspection applications in the photovoltaic industry.     

Ultrasound-assisted handling force reduction during the solar silicon wafers production

Surface adhesion between wet wafers poses great challenges for silicon wafer handling. It has been shown that both the shear and normal handling forces of the solar silicon wafers can be dramatically reduced by using the ultrasound energy. Approximately 20 and 5 times reduction in horizontal and vertical forces were achieved by as low power as 10 W, and a good agreement was found between the measured values and the predictions of a simple model for the effect of longitudinal vibration we developed.     

超薄LiTaO3晶片的键合减薄技术

在制造红外热释电探测器阵列过程中，需要利用超薄钽酸锂(LiTaO₃)晶片作为红外热释电探测器件的敏感层。通常LiTaO₃晶片的厚度远厚于红外热释电探测器件要求的厚度，所以需要采用键合减薄技术对LiTaO₃晶片进行加工处理。键合减薄技术主要包括：苯并环丁烯（BCB）键合、铣磨、抛光、加热剥离、刻蚀BCB。加工后得到面积为10mm×10mm、厚度为25μm的超薄单晶LiTaO₃薄膜，晶片厚度、表面粗糙度和面形精度比较理想。测得了LT晶片减薄后的热释电系数为1.6×10^-4Cm^-2K^-1。得到的单晶LiTaO₃薄膜满足红外热释电探测器敏感层的要求。     

调制激光致硅晶圆载流子辐射扫描成像试验研究

建立了调制激光诱发硅晶圆少数载流子密度波一维模型, 仿真分析了少数载流子输运参数对调制激光诱发载流子辐射信号频域响应的影响. 利用调制激光诱发载流子辐射扫描成像系统对含有表面划痕的硅晶圆进行了扫描成像试验研究. 通过少数载流子密度波模型与多参数拟合方法反求得到了扫描区域的输运参数二维分布图. 该方法得到的少数载流子寿命与利用传统光电导方法测量的少数载流子寿命结果相符; 分析了划痕对载流子输运参数造成的影响, 与光电导方法比较, 该方法可以测量不同位置的全部载流子输运参数且分辨率高.     

半导体特性的调制自由载流子吸收变距频率扫描方法研究

根据调制自由载流子吸收（modulated free carrier absorption,MFCA）检测技术的三维理论模型,采用变间距频率扫描方式测量单晶硅样品的电子输运参数,进行了仿真与实验,对结果进行了分析;通过多参数拟合,获取了测试样品的载流子扩散系数、少数载流子寿命和前表面复合速度.仿真与实验都表明,变间距频率扫描结合多参数拟合,可以提高输运参数的测量精度. 关键词： 调制自由载流子吸收 电子输运参数 变间距频率扫描 多参数拟合     

Analytical prediction for depth of subsurface damage in silicon wafer due to self-rotating grinding process

Subsurface damage (SSD) induced by silicon wafer grinding process is an unavoidable problem in semiconductor manufacturing. Although experimental attempts have been made on investigation of the influential factors on the SSD depth, however, few theoretical studies have been conducted to obtain SSD depth through grinding parameters. To fill the gap, an analytical model is developed to predict the SSD depth in silicon wafer due to self-rotating grinding process, which can reveal the relationship among SSD depth and the grinding parameters, the size of the abrasive grains and the radial distance from the wafer center. The establishment of the proposed model is based on scratch theory and fracture mechanics of isotropic brittle materials, and we further consider the effects of elastic recovery, cleavage plane and crystalline orientation on SSD formation. To validate the applicability of the proposed predictive model, grinding experiments with varied grinding parameters are performed and the depths of SSD along the <110> and <100> crystal directions are also measured and analyzed. The results given by the proposed model present reasonable accuracy of less than 20% deviation with experimental results. Effects of grinding parameters, wafer radial distance, crystalline orientation, and abrasive grain size on SSD depth are discussed in detail.     

The evolution of polarization inside ultrathin PbTiO3 films: a theoretical study

How to control the material properties by manipulating the unitcell thickness is crucial for applications of ferroelectric ultrathin films. To understand the polarization behaviour of ultrathin PbTiO₃ (PTO) films grown on SrTiO₃ (STO) substrate, we have systematically explored the strength and direction of polarization in each unitcell layer, using density functional theory combined with Born effective charge method. Strikingly, we find that the polar state of ultrathin PTO films is a composite result depending not only on thickness but also on boundary condition, initial polarization direction, etc. Besides, we also studied the surface effect on the polarization in the thicker PTO films for comparison with the ultrathin ones, which suggests that the surface effect is basically confined in a small range (3–5 unitcells thick at surface region) no matter what kinds of surface terminations and polarization directions.     

单晶硅片中的位错在快速热处理过程中的滑移

研究了单晶硅片中维氏压痕诱生的位错在不同气氛下高温快速热处理中的滑移行为.研究表明: 在快速热处理时, 位错在压痕残余应力的弛豫过程中能发生快速滑移; 当快速热处理温度高于1100℃时, 在氮气氛下处理的硅片比在氩气氛下处理的硅片有更小的位错滑移距离. 我们认为这是由于氮气氛下的高温快速热处理在压痕处注入的氮原子钉扎了位错, 增加了位错的临界滑移应力, 从而在相当程度上抑制了位错的滑移. 可以推断氮气氛下的高温快速热处理注入的氮原子增强了硅片的机械强度. 关键词： 快速热处理 位错滑移 机械性能 单晶硅     

垂直磁各向异性L10-Mn1.67Ga超薄膜分子束外延生长与磁性研究

具有超强垂直磁各向异性的L1₀-Mn_xGa薄膜由于其与半导体材料结构及工艺的高度兼容性而受到广泛关注, 其超高垂直磁各向异性能和极低的磁阻尼因子预示着L1₀-Mn_xGa薄膜在高热稳定性自旋电子学器件中将发挥重要作用. 而L1₀-Mn_xGa超薄膜对于降低L1₀-Mn_xGa基垂直磁各向异性隧道结中的磁矩翻转临界电流密度有着重要的意义. 本文采用分子束外延的方法, 在半导体GaAs衬底上成功制备出了一系列不同厚度的L1₀-Mn_1.67Ga薄膜, 厚度范围为1-5 nm. 生长过程中反射式高能电子衍射原位检测以及X射线衍射结果均表明了其良好的单晶相. 磁性测量结果表明, 厚度在1 nm以上的L1₀-Mn_1.67Ga薄膜均可以保持垂直磁各向异性特征, 厚度为5 nm的L1₀-Mn_1.67Ga薄膜的垂直磁各向异性能可达到14.7 Merg/cm³. 这些结果为基于L1₀-Mn_1.67Ga的垂直磁各向异性隧道结在自旋转移扭矩驱动的磁随机存储器等低功耗器件的集成及应用提供了重要的实验支持.     

调制自由载流子吸收测量半导体载流子输运参数的三维理论

推导出用于测量半导体载流子输运特性(载流子寿命、载流子扩散系数和前表面复合速度)的调制自由载流子吸收(modulated free carrier absorption, MFCA)检测技术的三维理论模型,给出了调制自由载流子吸收检测信号与调制频率和抽运-探测光相对距离的关系.定性分析了在不同调制频率时各个载流子输运参数对径向位置扫描曲线(信号与两束光相对距离的关系)的影响,结果表明调制自由载流子吸收检测信号对各个参数的灵敏度随抽运-探测光相对距离的增加而增加.仿真和实验结果表明,通过拟合不同调制频率时调 关键词： 调制自由载流子吸收 载流子输运特性 径向位置扫描     

Laser cutting silicon-glass double layer wafer with laser induced thermal-crack propagation

This study was aimed at introducing the laser induced thermal-crack propagation (LITP) technology to solve the silicon-glass double layer wafer dicing problems in the packaging procedure of silicon-glass device packaged by WLCSP technology, investigating the feasibility of this idea, and studying the crack propagation process of LITP cutting double layer wafer. In this paper, the physical process of the 1064 nm laser beam interact with the double layer wafer during the cutting process was studied theoretically. A mathematical model consists the volumetric heating source and the surface heating source has been established. The temperature and stress distribution was simulated by using finite element method (FEM) analysis software ABAQUS. The extended finite element method (XFEM) was added to the simulation as the supplementary features to simulate the crack propagation process and the crack propagation profile. The silicon-glass double layer wafer cutting verification experiment under typical parameters was conducted by using the 1064 nm semiconductor laser. The crack propagation profile on the fracture surface was examined by optical microscope and explained from the stress distribution and XFEM status. It was concluded that the quality of the finished fracture surface has been greatly improved, and the experiment results were well supported by the numerical simulation results.     

超薄镜破坏阈值的研究

新一代空间相机的非球面主镜由一些超轻超薄的分块镜组成，由于目前通用的空间光学反射镜材料非常有限且大部分均为脆性材料，在力的作用下产生强制性的变形将引起镜体大的应力甚至破碎，所以必须研究超薄镜的破坏阈值。首先将弹性力学中应力强度因子的概念引入主动光学中，证明了应力强度因子即传统意义的材料破坏阈值。提出材料表面的微裂纹是材料脆性断裂的根本原因。介绍了一种计算材料应力强度因子的方法。最后针对超薄平面镜模型进行了实例计算，得到了超薄镜的破坏阈值与其尺寸、厚度、支承条件、表面粗糙度之间的关系。     

Optical study of D–D neutron irradiation-induced defects in Co- and Cu-doped ZnO wafers

Room-temperature photoluminescence and optical transmittance spectroscopy of Co-doped (1×10¹⁴,5×10¹⁶, and 1×10¹⁷ cm^-2) and Cu-doped (5×10¹⁶ cm^-2) ZnO wafers irradiated by D-D neutrons (fluence of 2.9×10¹⁰ cm^-2) have been investigated. After irradiation, the Co or Cu metal and oxide clusters in doped ZnO wafers are dissolved, and the würtzite structure of ZnO substrate for each sample remains unchanged and keeps in high c-axis preferential orientation. The degree of irradiation-induced crystal disorder reflected from absorption band tail parameter (E₀) is far greater for doped ZnO than undoped one. Under the same doping concentration, the Cu-doped ZnO wafer has much higher irradiation-induced disorder than the Co-doped one. Photoluminescence measurements indicate that the introduction rate of both zinc vacancy and zinc interstitial is much higher for the doped ZnO wafer with high doping level than the undoped one. In addition, both crystal lattice distortion and defect complexes are suggested to be formed in doped ZnO wafers. Consequently, the Co- or Cu-doped ZnO wafer (especially with high doping level) exhibits very low radiation hardness compared with the undoped one, and the Cu-doped ZnO wafer is much less radiation-hard than the Co-doped one.     

Whereabouts of missing atoms in a laser-injected Si: Part 1

In a stealth dicing of Si wafers, voids are formed in laser-induced modified volumes (LIMVs). Most of the voids are free from apparent defects such as dislocations and cracks. Needless to say, in what will become a void (pre-void) upon laser injection, Si atoms are present prior to the laser injection. The critical issue is where these missing atoms are after the laser injection. Two obvious possibilities are that (1) they remain inside the Si wafer as interstitials (I’s) or (2) these I’s reach the surface of the wafer to disappear. If (1) is the case, I’s are to coagulate to form dislocation loops of I-type upon post laser-injection annealing. However, it has been shown that this is not the case. In order to see whether (2) is the case, surfaces of a laser-injected Si wafer were studied by a scanning electron microscope in detail. No evidence of I’s having reached the surfaces was obtained.     

Low-order modeling and dynamic characterization of rapid thermal processing

A low-order model of rapid thermal processing (RTP) of semiconductor wafers is derived. The first-principles nonlinear model describes the static and dynamic thermal behavior of a wafer with approximate spatial temperature uniformity undergoing rapid heating and cooling in a multilamp RTP chamber. The model is verified experimentally for a range of operating temperatures from 400° C to 900° C and pressures of 1 Torr and 1 atmosphere in an inert N₂ environment. Theoretical predictions suggest model validity over a still wider range of operating conditions. One advantage of the low-order model over previous high-order and statistical models is that the proposed model contains a small number of fundamental parameters and functions that, if necessary, are easily identifiable. Furthermore, because of reduced computational complexity, the low-order model can be used in real-time predictive applications including signal processing and process control design. In studying and verifying the model, the dynamic behavior of a semiconductor wafer undergoing rapid temperature changes is characterized. Close comparison between theory and experiment in terms of the wafer eigenvalue and dc gain is demonstrated; the strong nonlinear effects of temperature are shown. Convective heat transfer losses are also examined and are shown to increase with radial position on the wafer.     

Electrochemical investigations of stable cavitation from bubbles generated during reduction of water

Megasonic cleaning is traditionally used for removal of particles from wafer surfaces in semiconductor industry. With the advancement of technology node, the major challenge associated with megasonic cleaning is to be able to achieve high cleaning efficiency without causing damage to fragile features. In this paper, a method based on electrochemistry has been developed that allows controlled formation and growth of a hydrogen bubbles close to a solid surface immersed in an aqueous solution irradiated with ∼1 MHz sound field. It has been shown that significant microstreaming from resonating size bubble can be induced by proper choice of transducer duty cycle. This method has the potential to significantly improve the performance of megasonic cleaning technology through generation of local microstreaming, interfacial and pressure gradient forces in close vicinity of conductive surfaces on wafers without affecting the transient cavitation responsible for feature damage.     

Low‐Temperature Saw Damage Gettering to Improve Minority Carrier Lifetime in Multicrystalline Silicon

The minority carrier lifetime in multicrystalline silicon ? a material used in the majority of today's manufactured solar cells ? is limited by defects within the material, including metallic impurities which are relatively mobile at low temperatures (≤700 °C). Addition of an optimised thermal process which can facilitate impurity diffusion to the saw damage at the wafer surfaces can result in permanent removal of the impurities when the saw damage is etched away. We demonstrate that this saw damage gettering is effective at 500 to 700 °C and, when combined with subsequent low‐temperature processing, lifetimes are improved by a factor of more than four relative to the as‐grown state. The simple method has the potential to be a low thermal budget process for the improvement of low‐lifetime “red zone” wafers.

     

Buried contact solar cell using tri-crystalline CZ silicon wafers

Tri-crystalline silicon wafers have been used for fabrication of buried contact solar cells. Optical properties and microstructures after texturing in KOH solution have been studied and compared with those of multi-crystalline silicon wafers. The textured surface of tri-crystalline wafer has a shape of V-groove with an angle of 109.48°. The efficiency of buried contact solar cell fabricated on tri-crystalline wafer measured to be 14.27% without optimization of cell process for tri-crystalline CZ wafer. Ray tracing computer simulations showed that V-groove composed of (1 1 1) after texturing can decrease reflectance significantly when cells are encapsulated. The reflectance can be reduced to about 4%, averaged over the 400–1100 nm wavelength range. The life time of tri-grain wafer was longer than that of multi-crystalline silicon wafer because it has only three twin boundaries in a wafer.