Design optimization of tunneling field-effect transistor based on silicon nanowire PNPN structure and its radio frequency characteristics

Recently, a number of semiconductor devices have been widely researched in order to make breakthroughs from the short-channel effects (SCEs) and high standby power dissipation of the conventional metal-oxide-semiconductor field-effect transistors (MOSFETs). In this paper, a design optimization for the silicon nanowire tunneling field-effect transistor (SNW TFET) based on PNPN multi-junction structure and its radio frequency (RF) performances are presented by using technology computer-aided design (TCAD) simulations. The design optimization was carried out in terms of primary direct-current (DC) parameters such as on-current (I_on), off-current (I_off), current ratio (I_on/I_off), and subthreshold swing (SS). Based on the parameters from optimized DC characteristics, basic radio frequency (RF) performances such as cut-off frequency (f_T) and maximum oscillation frequency (f_max) were analyzed. The simulated device had a channel length of 60 nm and a SNW radius of 10 nm. The design variable was width of the n-doped layer. For an optimally designed PNPN SNW TFET, SS of 34 mV/dec and I_on of 35 μA/μm were obtained. For this device, f_T and f_max were 80 GHz and 800 GHz, respectively.     

Design and analysis of Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET)

In this work, a Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET) has been designed and analyzed. Various studies on III–V compound semiconductor materials for applications in TFET devices have been made and we adopt one of them to perform a physical design for boosting the tunneling probability. The GAA structure has a partially open region for extending the tunneling area and the channel is under the GAA region, which makes it an arch-shaped GAA structure. We have performed the design optimization with variables of epitaxy channel thickness (t_epi) and height of source region (H_source) in the Si-based TFET. The designed arch-shaped GAA TFET based on Si platform demonstrates excellent performances for low-power (LP) applications including on-state current (I_on) of 694 μA/μm, subthreshold swing (S) of 7.8 mV/dec, threshold voltage (V_t) of 0.1 V, current gain cut-off frequency (f_T) of 12 GHz, and maximum oscillation frequency (f_max) of 283 GHz.     

The effect of post-metal annealing on the electrical performance and stability of two-step-annealed solution-processed In2O3 thin film transistors

In this work, solution-processed indium oxide (In₂O₃) thin film transistors (TFTs) were fabricated by a two-step annealing method. The influence of post-metal annealing (PMA) temperatures on the electrical performance and stability is studied. With the increase of PMA temperatures, the on-state current and off-state current (I_on/I_off) ratio is improved and the sub-threshold swing (SS) decreased. Moreover, the stability of In₂O₃ TFTs is also improved. In all, In₂O₃ TFT with post-metal annealing temperature of 350°С exhibits the best performance (a threshold voltage of 4.75 V, a mobility of 13.8 cm²/V, an I_on/I_off ratio of 1.8 × 10⁶, and a SS of 0.76 V/decade). Meanwhile, the stability under temperature stress (TBS) and positive bias stress (PBS) also show a good improvement. It shows that the PMA treatment can effectively suppress the interface trap and bulk trap and result in an obviously improvement of the In₂O₃ TFTs performance.     

Chemical bath deposition of CdS channel layer for fabrication of low temperature-processed thin-film-transistors

～66 nm thick CdS film with a hexagonal structure was uniformly generated via a low temperature-processed chemical bath deposition at 80 °C using a complexing agent of ethylenediaminetetraacetic acid and its crystal structure, surface morphology, optical transmittance, and Raman scattering property were measured. Grown CdS film was used as a channel layer for the fabrication of bottom-gate, top-contact thin-film-transistor (TFT). The TFT device with 60 °C-dried channel layer exhibited a poor electrical performance of on-to-off drain current ratio (I_on/I_off) of 5.1 × 10³ and saturated channel mobility (μ_sat) of 0.10 cm²/Vs. However, upon annealing at 350 °C, substantially improved electrical characteristics resulted, showing I_on/I_off of 5.9 × 10⁷ and μ_sat of 5.07 cm²/Vs. Furthermore, CdS channel layer was chemically deposited in an identical way on a transparent substrate of SiN_x/ITO/glass as part of transparent TFT fabrication, resulting in I_on/I_off of 5.8 × 10⁷ and μ_sat of 2.50 cm²/Vs.     

Impact of work function variation for enhanced electrostatic control with suppressed ambipolar behavior for dual gate L-TFET

The favorable electrostatic potential and tunneling underneath the overall gate region, which prevents legitimate source to drain tunneling, controllability over the gate is assisted in vertical TFET configurations. An L-TFET (L-shaped Tunneling Field-Effect Transistor) has a larger tunneling length than a veritable TFET. As a consequence, the current in the on-state (I_on) has gotten better. The increased ambipolar current and low I_on/I_off ratio of L-TFET will need to be tuned for low-power and high-frequency functionality. On the other hand, significantly worse switching performance and distortions may lead to a weak robust device. By establishing a high-k gate oxide-based drain underlap region with dual gate, this study is dedicated to ameliorating the I_on/I_off by subverting ambipolar behavior. To investigate the impact of height of second gate (H_gate2) and work-function of this (WF_gate2), EBD (Energy Band Diagram), electric field distribution in X and Y direction, potential and recombination rate are examined under various conditions. Which leads to enhanced DC/RF and linearity performance. Along with this, Current-Voltage characteristics, DC/RF, and linearity performance Figure of Merits (FOMs) also investigated the assessment of variation of H_gate2 and WF_gate2, and it is optimized for the better suppression of I_ambi (ambipolar current) with a steep slope in transfer characteristics. In addition to that, Current-voltage statistics (I_ds − V_gs), DC/RF, and linearity efficiency FOMs were being used to assess the influence of changing the H_gate2 and WF_gate2, which was modulated for greater I_ambi suppression (ambipolar current) with improved SS and V_th for the proposed device.     

Simulation study on effect of drain underlap in gate-all-around tunneling field-effect transistors

In this work, the effects of underlapping drain junction on the performances of gate-all-around (GAA) tunneling field-effect transistors (TFETs) have been studied in terms of direct-current (DC) characteristics including on-current (I_on), off-current (I_off), subthreshold swing (S), and I_on/I_off ratio. In addition, the dependences of intrinsic delay time (τ) and radio-frequency (RF) performances including cut-off frequency (f_T) and maximum oscillation frequency (f_max) on gate–drain capacitance (C_gd) with the underlapping were investigated as the gate length (L_gate) is scaled. A GAA TFET with asymmetric junctions, with an underlap at the drain side, demonstrated DC and RF performances superior to those of a device with symmetric junctions.     

Manganese-related luminescence in GaInAs/AlInAs multiple quantum wells grown on InP by molecular beam epitaxy

Two Mn-related luminescence peaks have been observed in a series of nominally undoped Ga_0.47In_0.53As/Al_0.48In_0.52As multiple quantum wells (MQW) grown lattice-matched on InP substrates by molecular beam epitaxy. These two peaks correspond to on-center and on-edge impurity states, respectively. The origin of the Mn impurities is outdiffusion from the Fe-doped semiinsulating InP substrate into the epitaxial layer. The binding energy of Mn acceptors, determined to be 53±3 meV in bulk-like Ga_0.47In_0.53As, increases to 80±5 meV for the on-center Mn state in a 58 Å MQW. The strong well-width dependence of the binding energy is explained in terms of the unique behavior of the Mn impurity in III–V semiconductors. The Mn in Ga_0.47In_0.53As and Ga_0.47In_0.53As/Al_0.48In_0.52As MQWs behaves predominantly as a deep impurity.On leave from: A. F. Ioffe Physicotechnical Institute, Leningrad, USSR     

Investigation of the electrical properties and stability of HfInZnO thin-film transistors

In this study, amorphous HfInZnO (a-HIZO) thin films and related thin-film transistors (TFTs) were fabricated using the RF-sputtering method. The effects of the sputtering power (50–200 W) on the structural, surface, electrical, and optical properties of the a-HIZO films and the performance and NBIS stability of the a-HIZO TFTs were investigated. The films’ N_e increased and resistivity decreased as the sputtering power increased. The 100 W deposited a-HIZO film exhibited good optical and electrical properties compared with other sputtering powers. Optimization of the 100 W deposited a-HIZO TFT demonstrated good device performance, including a desirable μ_FE of 19.5 cm²/Vs, low SS of 0.32 V/decade, low V_th of 0.8 V, and high I_on/I_off of 10⁷, respectively. The 100 W deposited a-HIZO TFT with Al₂O₃ PVL also exhibited the best stability, with small V_th shifts of -2.2 V during NBIS testing. These high-performance a-HIZO thin films and TFTs with Al₂O₃ PVL have practical applications in thin-film electronics.     

Fabrication of thin-film transistor based on self-assembled single-walled carbon nanotube network

Thin-film transistor based on controllable electrostatic self-assembled monolayer single-wall carbon nanotubes (SWNTs) network has been fabricated by varying the density of nanotubes on the silicon substrate. The densities of SWNTs network have been investigated as a function of concentration and assembly time. It has been observed that the density of SWNTs network increases from 0.6 µm⁻² to 2.1 µm⁻², as the average on-state current (I_on) increases from 0.5 mA to 1.47 mA. The device has a current on/off ratio (I_on/I_off) of 1.3×10⁴ when I_on reaches to 1.34 mA.     

Structural and electronic properties of group III Rich In0.53Ga0.47As(001)

The structural and electronic properties of group III rich In_0.53Ga_0.47As(001) have been studied using scanning tunneling microscopy/spectroscopy (STM/STS). At room temperature (300 K), STM images show that the In_0.53Ga_0.47As(001)–(4 × 2) reconstruction is comprised of undimerized In/Ga atoms in the top layer. Quantitative comparison of the In_0.53Ga_0.47As(001)–(4 × 2) and InAs(001)–(4 × 2) shows the reconstructions are almost identical, but In_0.53Ga_0.47As(001)–(4 × 2) has at least a 4× higher surface defect density even on the best samples. At low temperature (77 K), STM images show that the most probable In_0.53Ga_0.47As(001) reconstruction is comprised of one In/Ga dimer and two undimerized In/Ga atoms in the top layer in a double (4 × 2) unit cell. Density functional theory (DFT) simulations at elevated temperature are consistent with the experimentally observed 300 K structure being a thermal superposition of three structures. DFT molecular dynamics (MD) show the row dimer formation and breaking is facilitated by the very large motions of tricoodinated row edge As atoms and z motion of In/Ga row atoms induced changes in As–In/Ga–As bond angles at elevated temperature. STS results show there is a surface dipole or the pinning states near the valence band (VB) for 300 K In_0.53Ga_0.47As(001)–(4 × 2) surface consistent with DFT calculations. DFT calculations of the band-decomposed charge density indicate that the strained unbuckled trough dimers being responsible for the surface pinning.     

InGaAsP/InGaAs tandem cells for a solar cell configuration with more than three junctions

Currently, triple‐junction solar cells realized from III–V semiconductor compounds hold the solar energy conversion efficiency world record. To improve the efficiency significantly, it is necessary to increase the number of junctions and to involve a sub‐cell with an absorber layer in the band gap range of 1 eV. For the realization of a stacked four‐junction device with optimised band gaps, we have grown InGaAsP/InGaAs tandem cells lattice matched to InP substrates, and investigated properties of the absorber bulk material. Time‐resolved photoluminescence of the low band gap In_0.53Ga_0.47As absorber embedded between InP barriers was measured. The InGaAs/GaAsSb tunnel diode structure used in the tandem has been processed into a separate device and I –V curves were measured. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Ion-irradiated In0.53Ga0.47As photoconductive antennas for THz generation and detection at 1.55 μm wavelength

We present a detailed study of the photoconductive antennas made from heavy-ion-irradiated In_0.53Ga_0.47As material. The optical and transport properties of ion-irradiated In_0.53Ga_0.47As material are characterized. The terahertz waveforms emitted and detected by ion-irradiated In_0.53Ga_0.47As photoconductive antennas excited by 1.55 μm wavelength femtosecond laser pulses are reported and the effect of the carrier lifetime on the terahertz signal characteristics emitted by such devices is analysed. The performances of ion-irradiated In_0.53Ga_0.47As photoconductive antennas excited by 1.55 μm and also by 0.8 μm wavelength femtosecond laser pulses are compared to those of similar low-temperature-grown GaAs photoconductive antennas. To cite this article: J. Mangeney, P. Crozat, C. R. Physique 9 (2008).     

Magnetotransport in modulation-doped In0.53Ga0.47As/In0.52Al0.48As heterojunctions: in-plane effective mass,quantum and transport mobilities of 2D electrons

Shubnikov–de Haas (SdH) and Hall effect measurements, performed in the temperature range between 3.3 and 20 K and at magnetic fields up to 2.3 T, have been used to investigate the electronic transport properties of lattice-matched In_0.53Ga_0.47As/In_0.52Al_0.48As heterojunctions. The spacer layer thickness (t_S) in modulation-doped samples was in the range between 0 and 400 Å. SdH oscillations indicate that two subbands are already occupied for all samples except for that witht_S =  400 Å. The carrier density in each subband, Fermi energy and subband separation have been determined from the periods of the SdH oscillations. The in-plane effective mass (m ^* ) and the quantum lifetime (τ_q) of 2D electrons in each subband have been obtained from the temperature and magnetic field dependences of the amplitude of SdH oscillations, respectively. The 2D carrier density (N₁) in the first subband decreases rapidly with increasing spacer thickness, while that (N₂) in the second subband, which is much smaller thanN₁ , decreases slightly with increasing spacer thickness from 0 to 200 Å. The in-plane effective mass of 2D electrons is similar to that of electrons in bulk In_0.53Ga_0.47As and show no dependence on spacer thickness. The quantum mobility of 2D electrons is essentially independent of the thickness of the spacer layer in the range between 0 and 200 Å. It is, however, markedly higher for the samples with a 400 Å thick spacer layer. The quantum mobility of 2D electrons is substantially smaller than the transport mobility which is obtained from the Hall effect measurements at low magnetic fields. The transport mobility of 2D electrons in the first subband is substantially higher than that of electrons in the second subband for all samples with double subband occupancy. The results obtained for transport-to-quantum lifetime ratios suggest that the scattering of electrons in the first subband is, on average, forward displaced in momentum space, while the electrons in the second subband undergo mainly large-angle scattering.     

The fabrication and characterization of 4H SiC power UMOSFETs

The fabrication of 4H-SiC vertical trench-gate metal-oxide-semiconductor field-effect transistors(UMOSFETs) is reported in this paper.The device has a 15-μm thick drift layer with 3×1015 cm-3 N-type doping concentration and a 3.1μm channel length.The measured on-state source-drain current density is 65.4 A/cm2 at Vg = 40 V and VDS = 15 V.The measured threshold voltage(Vth) is 5.5 V by linear extrapolation from the transfer characteristics.A specific on-resistance(Rsp-on) is 181 mΩ·cm2 at Vg = 40 V and a blocking voltage(BV) is 880 V(IDS = 100 μA@880V) at Vg = 0 V.     

低栅极电压控制下带有phenyltrimethoxysilane单分子自组装层的有机薄膜晶体管场效应特性研究

制作了底栅极顶接触有机薄膜晶体管器件,60 nm的pentacene被用作有源层,120 nm热生长的SiO₂作为栅极绝缘层.通过采用不同自组装修饰材料对器件的有源层与栅极绝缘层之间的界面进行修饰,如octadecyltrichlorosilane （OTS）,phenyltrimethoxysilane （PhTMS）,来比较界面修饰层对器件性能的影响.同时对带有PhTMS修饰层的OTFTs器件低栅极电压调制下的场效应行为及其载流子的传输机理进行研究.结果得到,当|V 关键词： 有机薄膜晶体管 自组装单分子层 场效应迁移率 低栅极调制电压     

Organic/inorganic interfaced field-effect transistor properties with a novel organic semiconducting material

A novel 1,3,4-oxadiazole-substituted benzo[b]triphenylene was synthesized by three-step synthetic procedure and OFET device design was successfully designed after theoretical calculations made using Gaussian software. For investigating the field-effect properties of designed organic electronic device, a SiO₂ (300 nm) was thermally grown on p-Si wafer at 1000 °C as a dielectric layer and gate, source and drain contacts have been deposited using Au metal with physical vapour deposition. 1,3,4-Oxadiazole-substituted benzo[b]triphenylene was spin coated on the source and drain electrodes of our device, forming organic/inorganic interfaced field-effect transistors. Surface morphology and thin film properties were investigated using AFM. All electrical measurements were done in air ambient. The device showed a typical p-type channel behaviour with increasing negative gate bias voltage values. Our results have surprisingly shown that the saturation regime of this device has high mobility (μ_FET), excellent on/off ratio (I_on/I_off), high transconductance (g_m) and a small threshold voltage (V_Th). The values of μ_FET, I_on/I_off, g_m and V_Th were found as 5.02 cm²/Vs, 0.7 × 10³, 5.64 μS/mm and 1.37 V, respectively. These values show that our novel organic material could be a potential candidate for organic electronic device applications in the future.     

Investigation of enhancement mode HfO2 insulated N-polarity GaN/InN/GaN/In0.9Al0.1N heterostructure MISHEMT for high-frequency applications

In this paper, we examined normally-OFF N-polar InN-channel Metal insulated semiconductor high-electron mobility transistors (MISHEMTs) device with a relaxed In_0.9Al_0.1N buffer layer. In addition, the enhancement-mode operation of the N-polar structure was investigated. The effect of scaling in N-polar MISHEMT, such as the dielectric and the channel thickness, alter the electrical behavior of the device. We have achieved a maximum drain current of 1.17 A/mm, threshold voltage (V_T) =0.728 V, transconductance (g_m) of 2.9 S mm⁻¹, high I_ON/I_OFF current ratio of 3.23×10³, lowest ON-state resistance (R_ON) of 0.41 Ω mm and an intrinsic delay time (τ) of 1.456 Fs along with high-frequency performance with f_t/ f_max of 90 GHz/109 GHz and 180 GHz/260 GHz for T_CH =0.5 nm at V_ds =0.5 V and 1.0 V. The numerically simulated results of highly confined GaN/InN/GaN/In_0.9Al_0.1N heterostructure MISHEMT exhibits outstanding potential as one of the possibility to replace presently used N-polar MISHEMTs for delivering high power density and frequency at RF/power amplifier applications.     

Electromodulation spectroscopy of In0.53Ga0.47As/In0.53Ga0.23Al0.24As quantum wells

In_0.53Ga_0.47As/In_0.53Ga_0.23Al_0.24As quantum wells (QWs) of various widths have been grown by molecular beam epitaxy on the InP substrate and investigated by electromodulation spectroscopy, i.e. photoreflectance (PR) and contactless electroreflectance (CER). The optical transitions related to the QW barrier and the QW ground and excited states have been clearly observed in PR and CER spectra. The experimental QW transition energies have been compared with theoretical predictions based on an effective mass formalism model. A good agreement between experimental data and theoretical calculations has been observed when the conduction band offset for the In_0.53Ga_0.47As/In_0.53Ga_0.23Al_0.24As interface equals 60%. In addition, it has been concluded that the conduction band offset for the In_0.53Ga_0.23Al_0.24As/InP interface is close to zero. The obtained results show that InGa(Al)As alloys are very promising materials in the band gap engineering for structures grown on InP substrate.     

A study of electrical enhancement of polycrystalline MgZnO/ZnO bi-layer thin film transistors dependence on the thickness of ZnO layer

A polycrystalline MgZnO/ZnO bi-layer was deposited by using a RF co-magnetron sputtering method and the MgZnO/ZnO bi-layer TFTs were fabricated on the thermally oxidized silicon substrate. The performances with varying the thickness of ZnO layer were investigated. In this result, the MgZnO/ZnO bi-layer TFTs which the content of Mg is about 2.5 at % have shown the enhancement characteristics of high mobility (6.77–7.56 cm² V⁻¹ s⁻¹) and low sub-threshold swing (0.57–0.69 V decade⁻¹) compare of the ZnO single layer TFT (μ_FE = 5.38 cm² V⁻¹ s⁻¹; S.S. = 0.86 V decade⁻¹). Moreover, in the results of the positive bias stress, the ΔV_on shift (4.8 V) of MgZnO/ZnO bi-layer is the 2 V lower than ZnO single layer TFT (ΔV_on = 6.1 V). It reveals that the stability of the MgZnO/ZnO bi-layer TFT enhanced compared to that of the ZnO single layer TFT.     

Characteristics of pentacene organic thin film transistor with top gate and bottom contact

High performance pentacene organic thin film transistors (OTFT) were designed and fabricated using SiO₂ deposited by electron beam evaporation as gate dielectric material. Pentacene thin films were prepared on glass substrate with S--D electrode pattern made from ITO by means of thermal evaporation through self-organized process. The threshold voltage V_TH was --2.75± 0.1V in 0---50V range, and that subthreshold slopes were 0.42± 0.05V/dec. The field-effect mobility (μ_EF) of OTFT device increased with the increase of V_DS, but the μ_EF of OTFT device increased and then decreased with increased V_GS when V_DS was kept constant. When V_DS was --50V, on/off current ratio was 0.48× 10⁵ and subthreshold slope was 0.44V/dec. The μ_EF was 1.10cm²/(V.s), threshold voltage was --2.71V for the OTFT device.