Photo-curable epoxy functionalized cyclotetrasiloxane as a gate dielectric for organic thin film transistors

We synthesized a new photo-curable organic/inorganic hybrid material, cyclotetrasiloxane (CTS) derivative containing cyclohexene-1,2-epoxide functional groups (CTS-EPOXY), and its characteristics are compared with a prototypical organic gate insulator of poly(4-vinylphenol) (PVP) in the organic thin film transistors (OTFTs) using pentacene as an active p-type organic semiconductor. Compared with PVP, CTS-EPOXY shows better insulating characteristics and surface smoothness. A metal/insulator/metal (MIM) device with the 300-nm-thick CTS-EPOXY film shows more than two orders of magnitude lower current (less than 40 nA/cm² over the voltage range up to 60 V) compared with PVP. In addition, the pentacene TFT with CTS-EPOXY as a gate dielectric layer shows slightly higher field-effect mobility of μ_FET = 0.20 cm²/V s compared to that with PVP.     

A high mobility C60 field-effect transistor with an ultrathin pentacene passivation layer and bathophenanthroline/metal bilayer electrodes

C₆₀ field-effect transistor (OFET) with a mobility as high as 5.17 cm²/V·s is fabricated. In our experiment, an ultrathin pentacene passivation layer on poly-(methyl methacrylate) (PMMA) insulator and a bathophenanthroline (Bphen)/Ag bilayer electrode are prepared. The OFET shows a significant enhancement of electron mobility compared with the corresponding device with a single PMMA insultor and an Ag electrode. By analysing the C₆₀ film with atomic force microscopy and X-ray diffraction techniques, it is shown that the pentacene passivation layer can contribute to C₆₀ film growth with the large grain size and significantly improve crystallinity. Moreover, the Bphen buffer layer can reduce the electron contact barrier from Ag electrodes to C₆₀ film efficiently.     

Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Low-voltage-drive ZnO thin-film transistors (TFTs) with room-temperature radio frequency magnetron sputtering SiO₂ as the gate insulator were fabricated successfully on the glass substrate. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 4.2 V, a field effect mobility of 11.2 cm²/V s, an on/off ratio of 3.1 × 10⁶ and a subthreshold swing of 0.61 V/dec. The drain current can reach to 1 mA while the gate voltage is only of 12 V and drain voltage of 8 V. The C–V characteristics of a MOS capacitor with the structure of ITO/SiO₂/ZnO/Al was investigated. The carrier concentration N_D in the ZnO active layer was determined, the calculated N_D is 1.81 × 10¹⁶ cm⁻³, which is the typical value of undoped ZnO film used as the channel layer for ZnO-TFT devices. The experiment results show that SiO₂ film is a promising insulator for the low voltage and high drive capability oxide TFTs.     

Organic insulator layer influence on the electrical properties of N,N’-di (2-ethylhexyl) - 3, 4, 9, 10-perylene diimide organic thin-film transistors: Experiment and modeling

In this work, n- type organic thin film transistors (OTFTs) based on different kinds of organic dielectrics were fabricated, characterized and theoretically investigated. Three kinds of organic insulators were applied as dielectric gate which are: divinyl tetramethyl disiloxane-bis (benzo-cyclobutene) (BCB), poly(vinylalcohol) (PVA) and poly (4-vinyl phenol) (PVP). Analytical model was applied to describe the electrical behavior of the fabricated OTFTs and to explain the absence of saturation of the drain current for the device based on PVA dielectric. In addition, Meyer–Neldel rule-grain boundary model was applied for the calculation of total resistance of OTFTs based on different dielectrics materials. The theoretical results of output characteristics and total resistance showed an excellent agreement with the experimental measurements. The experimental and theoretical calculations revealed that the n-channel OTFTs based on BCB as an insulator layer exhibited superior electrical characteristics in terms of threshold voltage, mobility and drain current compared with the devices based on PVA and PVP as a gate insulator layer. The device based on BCB organic insulator layer has the largest mobility of 4?×?10^?3 cm² V^?1 s^?1, the smallest leakage current relative to the devices based on PVA and PVP. While, the device fabricated with PVP organic insulator gate has a large trap density on the PVP-EHPDI interface which causes a pronounced decrease in field effect mobility and consequently drain current.     

Top-gate amorphous IGZO thin-film transistors with a SiO buffer layer inserted between active channel layer and gate insulator

In this paper, top-gate thin-film transistors (TFTs) using amorphous In-Ga-Zn-O as the n-channel active layer and SiO₂ as gate insulator were fabricated by radio frequency magnetron sputtering at room temperature. In this device, a SiO layer was used to be a buffer layer between active layer and gate insulator for preventing the damage of the InGaZnO surface by the process of sputtering SiO₂ with relatively high sputtering power. The thickness of buffer layers was studied and optimized for enhancing the TFTs performances. Contrasting to the TFTs without buffer layer, the optimized thickness of 10 nm SiO buffer layer improved the top-gate TFTs performances greatly: mobility increases 30%, reached 1.29 cm²/V s, the I_on/I_off ratio increases 3 orders, and the trap density at the interface of channel/insulator decreases about 1 order, indicated that the improvement of semiconductor/dielectric interface by buffering the sputtering power.     

Preparation and characterisation of crystalline tris(acetylacetonato)Fe(III) films grown on p-Si substrate for dielectric applications

Thin tris(acetylacetonato)iron(III) films were prepared by sublimation in vacuum on glass and p-Si substrates. Then comprehensive studies of X-ray fluorescence (XRF), X-ray diffraction (XRD), optical absorption spectroscopy, AC-conductivity, and dielectric permittivity as a function of frequency and temperature have been performed. The prepared films show a polycrystalline of orthorhombic structure. The optical absorption spectrum of the film was identical with that of the bulk powder layer. For electrical measurements of the complex as insulator, sample in form of metal-insulator-semiconductor (MIS) structure was prepared and characterised by the measurement of the capacitance and AC-conductance as a function of gate voltage. From those measurements, the state density D_it at insulator/semiconductor interface and the density of the fixed charges in the complex film were determined. It was found that D_it was of order 10¹⁰ eV⁻¹/cm² and the surface charge density in the insulator film was of order 10¹⁰ cm⁻². The frequency dependence of the electrical conductivity and dielectric properties of MIS structures were studied at room temperature. It was observed that the experimental data follow the correlated barrier-hopping (CBH) model, from which the fundamental absorption edge, the cut off hopping distance, and other parameters of the model were determined. It was found that the capacitance of the complex increases as temperature increases. Generally, the present study shows that the tris(acetylacetonato)iron(III) films grown on p-Si is a promising candidate for low-k dielectric applications, it displays low-k value around 2.0.     

Surface properties of silicon oxide films deposited using low-pressure dielectric barrier discharge

The deposition of SiO_X films from low-pressure dielectric barrier discharge plasmas has been investigated using tetraethoxysilane (TEOS)/O₂ as the feed gas. Films were analyzed using X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), AFM-based nanoindentation/nanowear techniques, and conductive AFM. Film deposition rates and hydrocarbon incorporation in the SiO_X film decrease with addition of O₂. High-quality SiO_X films with extremely low surface roughness are deposited at high oxidant concertrations. Addition of oxidant to the feed gas leads to a change in the SiO_X film structure from precursor-like to a dense SiO_X structure. The SiO_X films deposited with TEOS/O₂ plasmas were found to have soft surface layers, 0.5-1.5 nm thick, which contribute to an improvement of their field emission properties. The effect of gas phase compositions on the surface properties of the conductive surface layer was discussed.     

Numerical study on surface acoustic wave method for determining Young's modulus of low-k films involved in multi-layered structures

The surface acoustic waves (SAWs) technique is becoming an attractive tool for accurately and nondestructively characterizing the mechanical property of the brittle low dielectric constant (low-k) thin film. The theoretical equations for describing SAWs propagating on the multi-layered structure are derived in this study. The dispersion features of SAWs propagating on different structures of low-k/SiO₂/Si substrate, SiO₂/low-k/Si substrate, low-k/Si substrate, and low-k/Cu/Si substrate are investigated to instruct an accurate and facile fitting process for determining Young's modulus of low-k films. The dependence of dispersion relation on the film thickness, elastic modulus of low-k materials as well as frequency are provided and discussed in detail. The study shows an obvious influence of layered structure on the dispersion relation of SAWs. For a fixed structure, the dispersion curvature increases with the decrease of Young's modulus of low-k films.     

Surface morphology characterization of pentacene thin film and its substrate with under-layers by power spectral density using fast Fourier transform algorithms

Surface morphology of pentacene thin films and their substrates with under-layers is characterized by using atomic force microscopy (AFM). The power values of power spectral density (PSD) for the AFM digital data were determined by the fast Fourier transform (FFT) algorithms instead of the root-mean-square (rms) and peak-to-valley value. The PSD plots of pentacene films on glass substrate are successfully approximated by the k-correlation model. The pentacene film growth is interpreted the intermediation of the bulk and surface diffusion by parameter C of k-correlation model. The PSD plots of pentacene film on Au under-layer is approximated by using the linear continuum model (LCM) instead of the combination model of the k-correlation model and Gaussian function. The PSD plots of SiO₂ layer on Au under-layer as a gate insulator on a gate electrode of organic thin film transistors (OTFTs) have three power values of PSD. It is interpreted that the specific three PSD power values are caused by the planarization of the smooth SiO₂ layer to rough Au under-layer.     

SiOx interlayer to enhance the performance of InGaZnO-TFT with AlOx gate insulator

We have fabricated indium–gallium–zinc (IGZO) thin film transistor (TFT) using SiO_x interlayer modified aluminum oxide (AlO_x) film as the gate insulator and investigated their electrical characteristics and bias voltage stress. Compared with IGZO-TFT with AlO_x insulator, IGZO-TFT with AlO_x/SiO_x insulator shows superior performance and better bias stability. The saturation mobility increases from 5.6 cm²/V s to 7.8 cm²/V s, the threshold voltage downshifts from 9.5 V to 3.3 V, and the contact resistance reduces from 132 Ωcm to 91 Ωcm. The performance improvement is attributed to the following reasons: (1) the introduction of SiO_x interlayer improves the insulator surface properties and leads to the high quality IGZO film and low trap density of IGZO/insulator interface. (2) The better interface between the channel and S/D electrodes is favorable to reduce the contact resistance of IGZO-TFT.     

Surface and electrical properties of organic-inorganic hybrid structure as gate insulator to organic thin film transistor

Carbon-based OTFT devices were fabricated using a plasma process for the gate electrode and gate insulators. A nanocrystalline carbon (nc-C) film was used as the gate electrode, and three different layers, cyclohexene, diamond-like carbon (DLC), and cyclohexene/DLC (hybrid insulator), were used as the gate insulator. The surface and electrical properties of the three different gate insulators on the nc-C gate electrode were investigated using the SPM method, and the leakage current density and dielectric constant of the metal-insulator-metal (MIM) structures with three different insulator layers were evaluated. The hybrid insulator layer had a very smooth surface, approximately 0.2 nm, a uniform surface without defects, and good adhesion between the layers. Overall, it is believed that the hybrid insulator lead to a decrease in the electrical leakage current and an improvement in the device performance.     

Improving the dielectric constant of Al2O3 by cerium substitution for high-k MIM applications

Process compatible high-k dielectric thin films are one of the key solutions to develop high performance metal–insulator–metal (MIM) structures for future microelectronic devices. Engineered cerium–aluminate (Ce_xAl_2–xO₃) thin films were deposited on titanium nitride metal electrodes by electron-beam co-evaporation of ceria and alumina in a molecular beam deposition chamber. X-ray photoelectron spectroscopy clearly reveals that Ce cations can be stabilized in the 3+ valence state in Ce_xAl_2–xO₃ up to x = 0.7 by accommodation in the alumina host matrix. Higher Ce content was observed to result in cerium dioxide segregation in cerium aluminate matrix, probably due to the chemical tendency of Ce cations to exist rather in the 4+ than in the 3+ state. Electrical characterization of the X-ray amorphous Ce_0.7Al_1.3O₃ films reveals a dielectric constant value of about 11 and leakage current lower than 10^?4 A/cm². No parasitic low-k interface formation between the high-k Ce_0.7Al_1.3O₃ film and the TiN metal electrode is detected.     

Enhancement of Faraday effect in one-dimensional magneto-optical photonic crystal including a magnetic layer with wavelength dependent off-diagonal elements of dielectric constant tensor

Optical and magneto-optical properties of one-dimensional magneto-optical photonic crystal (1-D MPC) prepared by the sol–gel dip-coating method, including a magnetic defect layer composed of mixture of CoFe₂O₄ and SiO₂, are investigated from both the experimental and theoretical standpoints. The resonant transmission of light was observed around 570 nm in the photonic band gap. The Faraday rotation angle θ_F showed two maxima at 490 and 640 nm, and the wavelength dependence of θ_F above 760 nm was similar to that of the CoFe₂O₄+SiO₂ single-layer film. The two maxima of θ_F are attributed to the enhanced Faraday rotation of nonmagnetic TiO₂ layers in the cavity structure and that in magnetic CoFe₂O₄+SiO₂ layer through the light localization in MPC. The maximum value of θ_F due to the magnetic CoFe₂O₄+SiO₂ layer in the MPC was 22-times larger than that in the single-layer film. The simulation study of MPC with CoFe₂O₄+SiO₂ magnetic defect layer, based on the matrix approach method, showed that the resonant light transmission was accompanied by the localization of electric field, and large enhancement of θ_F appeared at different wavelengths so as to agree with the experimental features. This can be explained in terms of the wavelength dependent off-diagonal components of the dielectric constant tensor in addition to the large extinction coefficient in the CoFe₂O₄+SiO₂ magnetic defect layer.     

Effect of modifying a methyl siloxane-based dielectric by a polymer thin film for pentacene thin-film transistors

We report on the fabrication of pentacene thin-film transistors (TFTs) utilizing a spun methyl siloxane-based spin-on-glass (SOG) dielectric and show that these devices can give a similar electrical performance as achieved by using pentacene TFTs with a silicon dioxide (SiO₂) dielectric. To improve the electrical performance of pentacene TFTs with the SOG dielectric, we employed a hybrid dielectric of an SOG/cross-linked poly-4-vinylphenol (PVP) polymer. The PVP film was deposited onto the spun SOG dielectric prior to pentacene evaporation, resulting in an improvement of the saturation field effect mobility (μ_sat) from 0.01 cm²/(V s) to 0.76 cm²/(V s). The good surface morphology and the matching surface energy of the SOG dielectric that was modified with the polymer thin film allow the optimized growth of crystalline pentacene domains whose nuclei are embedded in an amorphous phase.     

Ta2Si short time thermal oxidized layers in N2O and O2 to form high-k gate dielectric on SiC

In this work, we report on two properties of the oxidation of tantalum silicide (Ta₂Si) on SiC substrates making this material of interest as insulator for many wide bandgap or compound semiconductors. The relatively high oxidation rate of tantalum silicide to form high-k insulator layers and its ability for being oxidized in diluted N₂O ambient in a manner similar to the oxidation in O₂ are investigated. Metal-insulator-semiconductor capacitors have been used to establish the actual applicability and constrain of the high-k insulator depending on the oxidation conditions. At 1050 °C, the reduction of the oxidation time from 1 h to 5 min affects primordially the SiO_x interfacial layer formed between the bulk insulator and the substrate. This interfacial layer strongly influences the metal-insulator-semiconductor performances of the oxidized Ta₂Si layer. The bulk insulator basically remains unaffected although some structural differences arise when the oxidation is performed in N₂O.     

Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure

In this study, we report a resistive random access memory (RRAM) using trilayer SiO_x/a-Si/TiO_y film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 10⁶ cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiO_x tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.     

Surface modified polymeric gate insulators for pentacene organic thin-film transistors

This paper demonstrates effects of a surface modification of polymeric gate insulators on a performance of organic thin-film transistor (OTFT). Pentacene OTFTs were fabricated with three types of polymer gate insulators—poly(4-vinylphenol) (PVP, G1) with comparably high dielectric constant, polyimide (PI, G2) with n-octadecyl (C₁₈) side chain, which resulted in hydrophobicity and low dielectric constant, and surface modified PVP(G3). The G3 was prepared by a spin-coating the solution of G2 onto the G1 film. We found that the n-octadecyl group of the G3 protruded from the surface and made the PVP surface more hydrophobic. The less polar surface strongly improved the device performance. Subthreshold slope (s.s.) of the OTFT with G3 as the gate insulator decreased significantly to 2.7 V/dec, which was much smaller than that of OTFTs fabricated with G1 (4.0 V/dec). That is, thin layer with fewer C₁₈ group in contact with pentacene induced a good electrical property like lower s.s. Further the higher dielectric constant of the underlying layer resulted in higher mobility of the device. The mobility (0.50 cm² V⁻¹ s⁻¹) of the OTFT with G3 as the gate insulator showed a higher value compared to that (0.25 cm² V⁻¹ s⁻¹) of the OTFT with G2.     

Room temperature ferroelectric effect and enhanced dielectric permittivity in Rochelle salt/PVA percolative composite films

Rochelle salt (RS) filled polyvinyl alcohol (PVA) composite films have been prepared via a simple solution casting technique. The transport, dielectric and ferroelectric properties of the samples have been studied. The dielectric permittivity decreases slowly with increasing frequency and rise gradually with increasing temperature and RS contents in the composites. As the volume fraction of the RS reaches to percolation threshold (f_c ～0.0538), an abrupt increase in the dielectric permittivity (～403 almost 80 times higher compared to pure PVA with low loss ～0.18 at 1 kHz and room temperature) occurs in the RS/PVA composite film, which is attributed to the formation of the conductive network in the matrix. Ferroelectric loops up to room temperature (300 K) and the slight increase in Curie temperature from 297 to 300 K have also been observed for percolative composite film. The developed composite material with low loss high dielectric permittivity and room temperature ferroelectric behaviors might be applied in the technological fields.     

不同绝缘层上生长的并五苯薄膜及其OTFT器件性能的研究

分别以SiO₂和PMMA为绝缘层材料制备了底栅顶接触结构的OTFT器件,得到以PMMA为绝缘层的器件具有更好的性能,其场效应迁移率为0.207 cm2·Vs-1,开关电流比为4.93×103,阈值电压为-4.3 V;而以SiO₂为绝缘层的器件,其场效应迁移率仅为0.039 cm2·Vs-1,开关电流比为5.98×102,阈值电压为-5.4 V。为分析器件性能差异的原因,测得了SiO₂和PMMA薄膜表面的AFM图谱及其上沉积并五苯薄膜后的AFM和XRD图谱。通过AFM图谱发现PMMA表面较SiO₂表面粗糙度小,其表面粗糙度的均方根值为0.216 nm,而二氧化硅薄膜表面粗糙度的均方根值为1.579 nm;且发现在PMMA上生长的并五苯薄膜的成膜质量优于在SiO₂,具有较大的晶粒尺寸和较少的晶粒间界。通过XRD图谱发现在PMMA上生长的并五苯薄膜具有明显的衍射峰,进一步证明了在PMMA上生长的并五苯薄膜具有更好的结晶状况,将更有利于载流子的传输。     

The use of angle resolved XPS to measure the fractional coverage of high-k dielectric materials on silicon and silicon dioxide surfaces

Angle resolved XPS (ARXPS) is a powerful tool for the determination of the thickness of ultra-thin films. In the case of high-k dielectric layers, the technique is capable of measuring the thickness of both the high-k layer and intermediate layers of silicon dioxide or metal silicate. The values for layer thickness are in close agreement with those generated by a variety of other techniques. As well as knowing the thickness of these layers, it is important to determine whether the layers are continuous or whether the coverage of the high-k layer is only partial. Using ARXPS, a method has been developed to determine whether the coverage of the high-k material is continuous and, if not, to calculate the fraction of the surface that is covered. The method is described with reference to the layers of Al₂O₃ grown on SiO₂ using atomic layer deposition (ALD). The method is then applied to HfO₂ layers produced using ALD on silicon wafers whose surfaces had received three different types of surface treatment. The way in which the layers grow and the nature of the resulting layer were found to depend upon the pre-treatment method. For example, growth on a thermal silicon dioxide surface resulted in complete coverage of HfO₂ after fewer ALD cycles than layers grown on an H-terminated surface. The results from ARXPS are compared with those obtained from ToF SIMS that have been shown earlier to be a valuable alternative to the LEIS analysis [1].