Nonvolatile unipolar resistive switching in ultrathin films of graphene and carbon nanotubes

We report unipolar resistive switching in ultrathin films of chemically produced graphene (reduced graphene oxide) and multiwalled carbon nanotubes. The two-terminal devices with yield >99% are made at room temperature by forming continuous films of graphene of thickness ∼20 nm on indium tin oxide coated glass electrode, followed by metal (Au or Al) deposition on the film. These memory devices are nonvolatile, rewritable with ON/OFF ratios up to ∼ 10⁵ and switching times up to 10 μs. The devices made of MWNT films are rewritable with ON/OFF ratios up to ∼400. The resistive switching mechanism is proposed to be nanogap formation and filamentary conduction paths.     

Cost-effective fabrication of memristive devices with ZnO thin film using printed electronics technologies

A prototype memristive device has been presented in this paper, for which the top and bottom electrodes have been fabricated through a simple and cost-effective technique, i.e. electrohydrodynamic printing. For deposition of the bottom electrode pattern, a silver ink containing 60 wt% silver by content was subjected to controlled flow through a metal capillary exposed to an electric field at the ambient temperature to generate an electrohydrodynamic jet, thereby depositing uniform patterns of silver on glass substrate at a constant substrate speed. The top electrode has been deposited in a similar fashion. In between the top and bottom electrodes, a uniform layer of ZnO is fabricated using spin-coating technique. The nanoscale ZnO memristor stack has a channel length of 370 μm and channel width of 82 μm. A memristor thus fabricated was characterized and its current voltage curves were analyzed. The device showed a typical nonvolatile resistive switching behavior present in memristor devices thus highlighting the EHD printed patterning as a reliable method for the fabrication of memory devices.     

Flexible NiO nanocrystal-based resistive memory device fabricated by low-temperature solution-process

In this study, a nickel oxide (NiO) nanocrystal (NC) based flexible resistive memory device is demonstrated at temperature as low as 180 °C by ligand exchange process. The fabricated device for flexible application with structure Ni/NiO/Ni on PI substrate exhibits excellent switching characteristics with low set/reset voltages and stable resistance values in both ON and OFF states for over 100 switching cycles of memory operation. Also, this flexible memory device shows stable resistive switching properties under compressive stress with bending radius to 10 mm and consecutive bending cycles. The ReRAM fabricated by a low-temperature solution-process shows potential for next generation flexible electronics.     

Controllable switching ratio in quantum dot/metal–metal oxide nanostructure based non-volatile memory device

In this paper, we report a facile quantum dot/In?CInOx(nanostructure)/quantum dot/In based non-volatile resistive memory device. The solution processed tri-layer structure exhibited bipolar resistive switching with a ratio of 100 between the high-resistance state and low-resistance state. The memory device was stable and functional even after 100,000 cycles of operation and it exhibited good retention characteristics. The ON/OFF switching ratio could be controlled by choosing appropriate metal in the structure. Memory operating mechanism is discussed based on charge trapping in quantum dots with InOx acting as barrier. A comparative study of memory devices consisting of aluminum and titanium in place of indium is presented. The possible reason for the variation in ON/OFF ratio is discussed on the size of the nano-sized grains of the middle metal layer.     

Reproducible resistive switching effect for memory applications in heterocontacts based on strongly correlated electron systems

The transitional processes in heterocontacts based on strongly correlated electron systems (SCES) are studied for analyzing of the effect of resistive switching (ERS). It has been shown that the process is asymmetric with respect to switching into “on” and “off” states, the switching time is controlled by a voltage level, this time can be less than microseconds, on the other hand, relaxation processes can reach tens seconds. The switching is controlled by two processes: a change in the resistance state of the normal metal/SCES interface under effect of electric current field and by electrodiffusion of oxygen to vacancies, at that the doping level of the contact area and resistive properties of the heterocontact change. In particular, electrodiffusion of mobile oxygen induced by the electric field makes it possible to use a device with ERS as a memristor. On the other hand, a possibility to control the switching time and ON and OFF parameters show the possibilities to use these devices as memory elements “RAM”.     

High-speed multibit operation of a dual vacancy-type oxide device with extended bi-polar resistive switching behaviors

We investigated the resistive switching behaviors of the metal–copper oxide–metal devices with the enhanced capability in terms of high speed and multi-bit operation. From the analysis of the normal and extended resistive switching behaviors, the voltage-induced resistive changes were modeled and the resistive switching polarity was explained. Also, we proposed and fabricated a dual vacancy-type device structure with an extended resistive switching behavior and demonstrated a high-speed implemental 2-bit multi-bit operation by controlling specifically switch-on voltage pulses.     

基于蒙特卡洛方法的钛氧化物忆阻器辐射损伤研究

纳米钛氧化物忆阻器有望成为新一代阻性存储器基本单元并应用于辐射环境中的航天器控制及数据存储系统. 辐射能量, 强度, 方向, 持续时间等要素发生改变均可能对钛氧化物忆阻器受到的辐射损伤构成影响, 然而, 目前尚无相关具体研究. 基于以蒙特卡洛方法为核心的SRIM仿真, 本文针对宇宙射线主体组成部分——质子及 α射线定量研究了各个辐射要素与钛氧化物忆阻器辐射损伤的关联, 依据器件实测数据研究了辐射要素与导通阻抗, 截止阻抗及氧空缺迁移率等忆阻器主要参数的关系, 进一步利用SPICE仿真讨论了辐射对杂质漂移与隧道势垒共存特性的影响, 从而为评估及降低钛氧化物忆阻器辐射损伤, 提高器件应用于辐射环境的可靠性提供依据.     

Electrical properties and switching mechanisms of flexible organic-inorganic bistable devices

The electrical properties of flexible organic-inorganic bistable devices fabricated with aluminum (Al) sandwiched between tris-(8-hydroxyquinoline) aluminum (Alq₃) and zinc selenide (ZnSe) layers were investigated. Current–voltage (I–V) measurements were conducted under conditions before, during, and after bending while changing the bending distance of the base plastic polyethylene terephthalate (PET) systematically. The maximum ON/OFF current ratios of the flexible bistable devices at flat and bent conditions were approximately 2.7×10⁴ and 1.9×10⁴, respectively. The conduction mechanisms in both ON and OFF states were analyzed by a theoretical model.     

Electrical bistability of tris-(8-hydroxyquinoline) aluminum (Alq3)/ZnSe organic-inorganic bistable device

We present that the electrical bistability in organic-inorganic bistable devices based on tris-(8-hydroxyquinoline) aluminum (Alq₃) and zinc selenide (ZnSe) with the tri-layer structure of Alq₃/aluminum (Al)/ZnSe. The current-voltage characteristics of the bistable device exhibit two electrical states as low (OFF state) and high (ON state) conductivity with ON/OFF ratio about four orders of magnitude. The conduction mechanisms in both ON and OFF states were analyzed by theoretical model. In the OFF state, the conduction mechanisms can be explained by thermionic emission model, which the ON state can be described by ohmic conduction model. The retention times of both states are more than 8000 s, and the device can reproduce continuous write-read-erase-read switching cycles. Moreover, for the organic-inorganic bistable device was kept at one year in ambient condition without encapsulation. The device still exhibited the electrical bistable behavior. Consequently, the ZnSe layer may be led to improve the lifetime property of the bistable device which acted as a self-encapsulating layer.     

Control of electrical properties and gate bias stress stability in solution-processed a-IZO TFTs by Zr doping

Zr-doped indium zinc oxide (IZO) thin film transistors (TFTs) are fabricated via a solution process with different Zr doping ratios. The addition of Zr suppressed the carrier concentration in the IZO films, which was confirmed by Hall Effect measurements. As the amount of Zr was increased in the oxide active layer of TFTs, the subthreshold swing (S.S) reduced, the ON/OFF ratio improved, and the threshold voltage (V_th) shifted positively. Moreover, the starting points of the ON state for TFTs near the point zero gate voltage could be controlled by the addition of Zr. The 0.3% Zr-doped IZO TFT exhibited a high saturation mobility of 7.0 cm² V⁻¹ s⁻¹, ON/OFF ratio of 2.6 × 10⁶ and S.S of 0.57 V/decade compared the IZO TFT with 10.1 cm² V⁻¹ s⁻¹, 1.7 × 10⁶ and 0.75 V/decade. The Zr effect of the gate bias stability was examined. Zr-doped IZO TFTs were relatively unstable under a positive bias stress (PBS), whereas they showed good stability at a negative bias stress (NBS). The gate bias stability of the oxide TFTs were compared with the extracted parameters through a stretched-exponential equation. The characteristic trapping time under NBS of 0.3% Zr-doped IZO TFTs was improved from 8.3 × 10⁴ s for the IZO TFT to 3.1 × 10⁵ s.     

Pentacene thin film transistors using La2O3 as gate insulator

A study of Pentacene OTFTs using La₂O₃ as gate insulator is presented. The device characteristics were studied and analyzed. The OTFTs exhibit p-type conductivity with field effect mobility 6.5 × 10⁻⁸ m²/V.s, ON/OFF ratio 1.4 × 10², sub-threshold swing 2 mV/decade and hole concentration 4.5 × 10¹⁷ cm⁻³. The SEM and XRD analysis on the semiconductor film are also reported.     

Polarized (letter ‘8’) memory in CdSe point contact diodes

Polarized memory, i.e., the memory in which switching between ON and OFF states depends on the polarity of bias voltage has been found in point contact diodes on single crystals of CdSe, CdS, CdTe, GaAs and GaP. The detailed features of switching characteristics depend on the choice of metals for the point contact electrode, on the sharpness of the contact and also on the resistance of the current limiter in the circuit. Observation of the transients between ON and OFF has also been performed.     

Atomic layer deposited HfO2 based metal insulator semiconductor GaN ultraviolet photodetectors

A report on GaN based metal insulator semiconductor (MIS) ultraviolet (UV) photodetectors (PDs) with atomic layer deposited (ALD) 5-nm-thick HfO₂ insulating layer is presented. Very low dark current of 2.24 × 10⁻¹¹ A and increased photo to dark current contrast ratio was achieved at 10 V. It was found that the dark current was drastically reduced by seven orders of magnitude at 10 V compared to samples without HfO₂ insulating layer. The observed decrease in dark current is attributed to the large barrier height which is due to introduction of HfO₂ insulating layer and the calculated barrier height was obtained as 0.95 eV. The peak responsivity of HfO₂ inserted device was 0.44 mA/W at bias voltage of 15 V.     

Electro-optic metal–insulator–semiconductor–insulator–metal Mach-Zehnder plasmonic modulator

The performance of a CMOS-compatible electro-optic Mach-Zehnder plasmonic modulator is investigated using electromagnetic and carrier transport simulations. Each arm of the Mach-Zehnder device comprises a metal–insulator–semiconductor–insulator–metal (MISIM) structure on a buried oxide substrate. Quantum mechanical effects at the oxide/semiconductor interfaces were considered in the calculation of electron density profiles across the structure, in order to determine the refractive index distribution and its dependence on applied bias. This information was used in finite element simulations of the electromagnetic modes within the MISIM structure in order to determine the Mach-Zehnder arm lengths required to achieve destructive interference and the corresponding propagation loss incurred by the device. Both inversion and accumulation mode devices were investigated, and the layer thicknesses and height were adjusted to optimise the device performance. A device loss of <8 dB is predicted for a MISIM structure with a 25 nm thick silicon layer, for which the device length is <3 μm, and <5 dB loss is predicted for the limiting case of a 5 nm thick silicon layer in a 1.2 μm long device: in both cases, the maximum operating voltage is 7.5 V.     

Low power consumption bipolar resistive switching characteristics of ZnO-based memory devices

Ag/ZnO/Pt structure resistive switching devices are fabricated by radio frequency (RF) magnetron sputtering at room temperature. The memory devices exhibit stable and reversible resistive switching behavior. The ratio of high resistance state to low resistance state can reach as high as 10 2 . The retention measurement indicates that the memory property of these devices can be maintained for a long time (over 10 4 s under 0.1-V durable stress). Moreover, the operation voltages are very low, -0.4 V (OFF state) and 0.8 V (ON state). A high-voltage forming process is not required in the initial state, and multi-step reset process is demonstrated. Resistive switching device with the Ag/ZnO/ITO structure is constructed for comparison with the Ag/ZnO/Pt device.     

Performance improvement of amorphous indium–gallium–zinc oxide ReRAM with SiO2 inserting layer

In this study, the resistive switching performance of amorphous indium–gallium–zinc oxide (a-IGZO) resistive switching random-access memory (ReRAM) was improved by inserting a thin silicon oxide layer between silver (Ag) top electrode and a-IGZO resistive switching layer. Compared with the single a-IGZO layer structure, the SiO₂/a-IGZO bi-layer structure exhibits the higher On/Off resistance ratio larger than 10³, and the lower operation power using a smaller SET compliance current. In addition, good endurance and excellent retention characteristics were achieved. Furthermore, multilevel resistance states are obtained through adjusting SET compliance current and RESET stop voltage, which shows a promise for high-performance nonvolatile multilevel memory application.     

A hybrid photodiode with planar heterojunction structure consisting of ZnO nanoparticles and CuPc thin film

A photodiode with planar heterojunction was fabricated using copper (II) phthalocyanine (CuPc) organic semiconductor and zinc oxide (ZnO) inorganic nanoparticles (NPs, ～5 nm). The current–voltage (I–V) characteristics of ITO/ZnO NPs/CuPc/Ag device in dark and under illumination with a solar simulator were investigated in detail. The measurement results showed that the device exhibited good rectifying behavior in dark and under illumination. A rectification ratio (RR) of 15.44 at 1.95 V was achieved for the device under 100 mW/cm² illumination power. Also, the RR of the device as a function of light intensity was observed. The photoresponsive mechanism of the photodiode was illuminated in term of its energy band diagram.     

SiOx interlayer to enhance the performance of InGaZnO-TFT with AlOx gate insulator

We have fabricated indium–gallium–zinc (IGZO) thin film transistor (TFT) using SiO_x interlayer modified aluminum oxide (AlO_x) film as the gate insulator and investigated their electrical characteristics and bias voltage stress. Compared with IGZO-TFT with AlO_x insulator, IGZO-TFT with AlO_x/SiO_x insulator shows superior performance and better bias stability. The saturation mobility increases from 5.6 cm²/V s to 7.8 cm²/V s, the threshold voltage downshifts from 9.5 V to 3.3 V, and the contact resistance reduces from 132 Ωcm to 91 Ωcm. The performance improvement is attributed to the following reasons: (1) the introduction of SiO_x interlayer improves the insulator surface properties and leads to the high quality IGZO film and low trap density of IGZO/insulator interface. (2) The better interface between the channel and S/D electrodes is favorable to reduce the contact resistance of IGZO-TFT.     

Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Low-voltage-drive ZnO thin-film transistors (TFTs) with room-temperature radio frequency magnetron sputtering SiO₂ as the gate insulator were fabricated successfully on the glass substrate. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 4.2 V, a field effect mobility of 11.2 cm²/V s, an on/off ratio of 3.1 × 10⁶ and a subthreshold swing of 0.61 V/dec. The drain current can reach to 1 mA while the gate voltage is only of 12 V and drain voltage of 8 V. The C–V characteristics of a MOS capacitor with the structure of ITO/SiO₂/ZnO/Al was investigated. The carrier concentration N_D in the ZnO active layer was determined, the calculated N_D is 1.81 × 10¹⁶ cm⁻³, which is the typical value of undoped ZnO film used as the channel layer for ZnO-TFT devices. The experiment results show that SiO₂ film is a promising insulator for the low voltage and high drive capability oxide TFTs.     

Memory characteristics and tunneling mechanism of Pt nano-crystals embedded in HfAlOx films for nonvolatile flash memory devices

A non-volatile flash memory device based on metal oxide semiconductor (MOS) capacitor structure has been fabricated using platinum nano-crystals(Pt–NCs) as storage units embedded in HfAlO_x high-k tunneling layers. Its memory characteristics and tunneling mechanism are characterized by capacitance–voltage(C–V) and flat-band voltage-time(ΔV_FB-T) measurements. A 6.5 V flat-band voltage (memory window) corresponding to the stored charge density of 2.29 × 10¹³ cm⁻² and about 88% stored electron reserved after apply ±8 V program or erase voltage for 10⁵ s at high frequency of 1 MHz was demonstrated. Investigation of leakage current–voltage(J–V) indicated that defects-enhanced Pool-Frenkel tunneling plays an important role in the tunneling mechanism for the storage charges. Hence, the Pt–NCs and HfAlO_x based MOS structure has a promising application in non-volatile flash memory devices.