Edge effect and interface confinement modulated strain distribution and interface adhesion energy in graphene/Si system

In order to clarify the edge and interface effect on the adhesion energy between graphene(Gr)and its substrate,a theoretical model is proposed to study the interaction and strain distribution of Gr/Si system in terms of continuum medium mechanics and nanothermodynamics.We find that the interface separation and adhesion energy are determined by the thickness of Gr and substrate.The disturbed interaction and redistributed strain in the Gr/Si system induced by the effect of surface and interface can make the interface adhesion energy decrease with increasing thickness of Gr and diminishing thickness of Si.Moreover,our results show that the smaller area of Gr is more likely to adhere to the substrate since the edge effect improves the active energy and strain energy.Our predictions can be expected to be a guide for designing high performance of Grbased electronic devices.     

Reaction between amorphous Si and crystalline Al in Al/Si and Si/Al bilayers: microstructural and thermodynamic analysis of layer exchange

Aluminium-induced crystallization of amorphous silicon (a-Si) in Al/Si and Si/Al bilayers was studied upon annealing at 250 °C by X-ray diffraction and Auger electron spectroscopy. The Al/a-Si bilayers and a-Si/Al bilayers were prepared by sputter deposition on single-crystal silicon wafers with a silicon-oxide film on top. During the isothermal annealing a layer-exchange process occurred in both types of bilayers. A continuous polycrystalline silicon (poly-Si) film was formed within, and thereby gradually replacing, the initial Al metal layer. The sublayer sequence in the original bilayer influenced the speed of the poly-Si formation and the layer-exchange process. After annealing, the Al fiber texture in the as-deposited bilayers had become stronger, the Al crystallites had grown laterally, and the macrostress in the Al layer had been released. The amorphous Si layer had crystallized into an aggregate of nanocrystals with {111} planes parallel to the surface, with a crystallite size of about 15–25 nm. An extensive analysis of the Gibbs energy change due to annealing showed that the layer exchange may be promoted by the release of elastic energy and grain growth for the Al phase. PACS 05.70.Jk; 61.43.Dq; 68.35.Rh; 61.72.Cc; 68.55.Jk     

ZnO nanorods/plates on Si substrate grown by low-temperature hydrothermal reaction

The zinc oxide (ZnO) nanorods/plates are obtained via hydrothermal method assisted by etched porous Al film on Si substrate. The products consist of nanorods with average diameter of 100 nm and nanoplates with thickness of 200-300 nm, which are uniformly distributed widely and grown perpendicularly to the substrate. The ZnO nanoplates with thickness of 150-300 nm were grown on Si substrate coated with a thin continuous Al film (without etching) in the same aqueous solution. The growth mechanism and room temperature photoluminescence (PL) properties of ZnO nanorods/plates and nanoplates were investigated. It is found that the introduction of the etched Al film plays a key role in the formation of ZnO nanorods/plates. The annealing process is favorable to enhance the UV PL emissions of the ZnO nanorods/plates.     

New surface structure analysis of Ag-Si phase by quantitative auger electron spectroscopy method

Ag or Au was deposited on a clean Si substrate at room temperature. These systems, Ag/Si and Au/Si, were annealed at various temperatures or various heating times. Due to the annealing, Ag or Au diffused into Si and/or Si diffused into the metal. The changes of the surface composition are analyzed by a quantitative Auger Electron Spectroscopy (AES) method which is newly developed as a non-destructive method. In the case of Ag/Si, Ag migrated into the Si substrate and/or Si diffused into Ag. Then, Ag-Si solid solution was produced. After the annealing, the Ag/Si system is changed into Ag/(Ag-Si)/Si of the three-phase structure. In the case of Au/Si (Au film thickness < 15 Å), the Au film thickness became thinner by annealing. The Au/Si system always keeps the Au/Si phase after annealing, while there was no Au-Si solution area. The difference between the Ag/(Ag-Si)/Si and the Au/Si structure is attributed to the reason that Au diffuses more quickly than Ag into the Si substrate. AES results after annealing cannot be explained by the model of the formation of the three-dimensional island structure which is commonly referenced.     

Surface control of CdSe nanocrystals by UV-exposure in air and successive thermal treatment under ultra high vacuum

Colloidal CdSe nanocrystals were synthesized through a solution process. The CdSe nanocrystals coated on Si(1 0 0) wafers were UV-exposed in either an air or argon atmosphere to distinguish the effect of generated ozone from UV-radiation at 365 nm on the removal of surface capping pyridine molecules. The pyridine on the CdSe nanocrystal's surface could be effectively removed by the ozone generated during UV-exposure with an accompanying highly oxidized surface state of the CdSe nanocrystals. For the removal of surface oxides of CdSe nanocrystals, a successive thermal treatment under ultra high vacuum (UHV) was adopted. The optical energy bandgap measured by using UV-vis absorption spectroscopy showed a red shift with treatment with an increase of annealing temperature. The electronic energy structure of UHV-annealed CdSe nanocrystals film was analyzed in situ using X-ray absorption and photoelectron spectroscopy. A great resemblance was found between the values of the optical and electron energy bandgaps of effectively surface-treated CdSe nanocrystals film after UHV-annealing at 400 °C.     

Fabrication of contact electrodes in Si for nanoelectronic devices using ion implantation

We fabricated contact electrodes in Si for nanoelectronic device fabrication using 40 keV As ion implantation. Complete amorphization of the Si surface with contact electrodes using 400 eV Ar ion irradiation at room temperature followed by annealing at 700 °C produced Si surface with negligible SiC crystallites suitable for ultrahigh vacuum scanning tunneling microscope nanolithography. We could locate the implanted and unimplanted regions on Si and fabricate Si dangling bond wires between two contact electrodes, which is the first step for the fabrication of nanoelectronic devices in Si using UHV STM nanolithography.     

Growth of Ni2Si by rapid thermal annealing: Kinetics and moving species

The growth kinetics is characterized and the moving species is identified for the formation of Ni₂Si by Rapid Thermal Annealing (RTA) of sequentially deposited Si and Ni films on a 100 Si substrate. The interfacial Ni₂Si layer grows as the square root of time, indicating that the suicide growth process is diffusion-limited. The activation energy is 1.25±0.2 eV in the RTA temperature range of 350–450° C. The results extend those of conventional steady-state furnace annealing quite fittingly, and a common activation energy of 1.3±0.2 eV is deduced from 225° to 450° C. The marker experiment shows that Ni is the dominant moving species during Ni₂Si formation by RTA, as is the case for furnace annealing. It is concluded that the two annealing techniques induce the same growth mechanisms in Ni₂Si formation.     

Excess Si concentration dependence of the photoluminescence of Si nanoclusters in SiO2 fabricated by ion implantation

A method for the fabrication of luminescent Si nanoclusters in an amorphous SiO₂ matrix by ion implantation and annealing, and the detailed mechanisms for the photoluminescence are reported. We have measured the implanted ion dose, annealing time and excitation energy dependence of the photoluminescence from implanted layers. The samples were fabricated by Si ion implantation into SiO₂ and subsequent high-temperature annealing. After annealing, a photoluminescence band below 1.7 eV has been observed. The peak energy of the photoluminescence is found to be independent of annealing time and excitation energy, while the intensity of the luminescence increases as the annealing time and excitation energy increase. Moreover, we found that the peak energy of the luminescence is strongly affected by the dose of implanted Si ions especially in the high dose range. These results indicate that the photons are absorbed by Si nanoclusters, for which the band-gap energy is modified by the quantum confinement effects, and the emission is not simply due to direct electron–hole recombination inside Si nanoclusters, but is related to defects probably at the interface between Si nanoclusters and SiO₂, for which the energy state is affected by Si cluster–cluster interactions. It seems that Si nanoclusters react via a thin oxide interface and the local concentrations of Si nanoclusters play an important role in the peak energy of the photoluminescence.     

Formation of epitaxial SiC nanocrystals

Epitaxial 3C-SiC grains are formed at 1190 °C in the top region of silicon, when Si wafers coated by SiO₂ are annealed in CO atmosphere. The formed SiC grains are 40-50 nm high and 100 nm wide in cross-section and contain only few defects. Main advantage of the method is that the final structure is free of voids.The above method is further developed for the generation of SiC nanocrystals, embedded in SiO₂ on Si, and aligned parallel with the interface. The nanometer-sized SiC grains were grown into SiO₂ close to the Si/SiO₂ interface by a two-step annealing of oxide covered Si: first in a CO, than in a pure O₂ atmosphere. The first (carbonization) step created epitaxial SiC crystallites grown into the Si surface, while the second (oxidation) step moved the interface beyond them. Conventional and high resolution cross-sectional electron microscopy showed pyramidal Si protrusions at the Si/SiO₂ interface under the grains. The size of the grains, as well as their distance from the Si/SiO₂ interface (peak of pyramids) can be controlled by the annealing process parameters. The process can be repeated and SiC nanocrystals (oriented in the same way) can be produced in a multilevel structure.     

Electrical degradation of porous and dense LSM/YSZ interface

Electrochemical cells formed by the interface between dense and porous lanthanum strontium manganate (LSM) and yttria stabilized zirconia (YSZ) were submitted to annealing temperatures varying from 1373 K to 1673 K for 200 h and studied by Impedance Spectroscopy (IS) in order to investigate how the high annealing temperature can modify the contact between LSM/YSZ and to which extension these changes influence the electrical behavior of dense and porous LSM electrodes before and after the formation of insulating phases. Up to 1473 K the annealing process did not lead to substantial electrical behavior modifications at the LSM/YSZ interfaces for both porous and dense electrodes. IS measurements show two capacitive semicircles, the best fitting of impedance data brings to an equivalent circuit constituted by a serial combination of the electrolyte resistance and two parallel combinations of a resistance and a constant phase element, CPE. The higher frequency semicircles, HF, were attributed to the diffusion of oxide ions from the interface LSM/YSZ to the oxide ion vacancies located at the electrolyte surface. The semicircle at lower frequency, LF, will be ascribed to the oxygen species adsorption and diffusion in the LSM. At 1473 K the only changes recorded are related with the sinterization process of the porous electrodes. Over of 1473 K, the resistance contributions increased largely, especially for porous electrodes, and one additional semicircle was observed. This semicircle was associated to the oxygen diffusion process at the new insulating phases formed from YSZ and LSM solid state reactions. Porous and dense electrodes exhibited different rates for the degradation process. The porous electrode degraded faster than the dense one, probably because of the morphological effects as grain growth and their coalescence during annealing at higher temperatures.     

Studies on interdiffusion in Pd/Mg/Si films: Towards improved cyclic stability in hydrogen storage

The paper reports the diffusion coefficients of grain boundary diffusion and grain boundary assisted lattice diffusion of Pd in Mg in Pd/Mg/Si system, a useful material for hydrogen storage, at 473 K in vacuum. The grain boundary diffusivity is measured by Whipple model and grain boundary assisted lattice diffusivity by plateau rise method using Pd depth profiles constructed by Rutherford backscattering spectrometry. It is established that grain boundary diffusivities are about six orders of magnitude faster than lattice diffusivities. Fine grained microstructure of Pd film, high abundance of defects in Mg film and higher stability associated with Pd-Mg intermetallics are responsible for the diffusion of Pd into grain boundaries and subsequently in the interiors of Mg. Besides the indiffusion of Pd, annealing also brings about an outdiffusion of Mg into Pd film. Examination by nuclear reaction analysis involving ²⁴Mg(p,p′γ)²⁴Mg resonance reaction shows the occurrence of Mg outdiffusion. Minimization of surface energy is presumably the driving force of the process. In addition to Pd/Mg interface, diffusion occurs across Mg/Si (substrate) interface as well on increasing the annealing temperature above 473 K. These studies show that dehydrogenation of films accomplished by vacuum annealing should be limited to temperatures less than 473 K to minimize the loss of surface Pd, the catalyst of the hydrogen absorption-desorption process and Mg, the hydrogen storing element, by way of interfacial reactions.     

Failure behavior of ITO diffusion barrier between electroplating Cu and Si substrate annealed in a low vacuum

A structure of Cu/ITO(10 nm)/Si was first formed and then annealed at various temperatures for 5 min in a rapid thermal annealing furnace under 10⁻² Torr pressure. In Cu/ITO(10 nm)/Si structure, the ITO(10 nm) film was coated on Si substrate by sputtering process and the Cu film was deposited on ITO film by electroplating technique. The various Cu/ITO(10 nm)/Si samples were characterized by a four-point probe, a scanning electron microscope, an X-ray diffractometer, and a transmission electron microscope. The results showed that when the annealing temperature increases near 600 °C the interface between Cu and ITO becomes unstable, and the Cu₃Si particles begin to form; and when the annealing temperature increases to 650 °C, a good many of Cu₃Si particles about 1 μm in size form and the sheet resistance of Cu/ITO(10 nm)/Si structure largely increases.     

Energy levels in doped SiGe quantum well studied by admittance spectroscopy

SiGe/Si quantum wells (QWs) with different Boron doping concentrations were grown by molecular beam epitaxy (MBE) on p-type Si(1 0 0) substrate. The activation energies of the heavily holes in ground states of QWs, which correspond to the energy differences between the heavy hole ground states and Si valence band, were measured by admittance spectroscopy. It is found that the activation energy in a heavily doped QW increases with doping concentration, which can be understood by the band alignment changes due to the doping in the QWs. Also, it is found that the activation energy in a QW with a doping concentration of 2 × 10²⁰ cm⁻³ becomes larger after annealing at a temperature of 685 °C, which is attributed to more Boron atoms activation in the QW by annealing.     

Formation of palladium silicide by rapid thermal annealing

The formation of palladium silicide Pd₂Si by rapid thermal annealing of Pd layers on silicon has been studied as a function of annealing time (1–60s) in the temperature range 350–500 °C. It is shown that the results found for conventional furnace annealing (long duration, low temperature) can be extrapolated for rapid thermal annealing (shorter time, higher temperature) when taking into account the exact time dependence of the short temperature cycle. The growth rate is essentially diffusion limited and the activation energy is close to 1.1±0.1 eV. Silicide resistivity of about 30–40 cm was obtained for 200–400 nm thick Pd₂Si layers formed at 400 °C for a few seconds.     

导纳谱研究两类Si基量子阱基态子能级的性质

用导纳谱技术研究了两类Si基量子阱样品基态子能级的性质.基于量子阱中载流子的热激发模型，从导纳谱中得到的激发能值被认为是阱中重空穴基态位置到阱顶的距离.对于SiGe合金和Si形成的组分量子阱，主要研究了退火对重空穴基态子能级的影响.发现样品的退火温度为800℃时，随退火时间延长，激发能增加.对此现象的解释是，由于Si,Ge互扩散，导致界面展宽，量子限制效应降低，重空穴基态位置下降，从而激发能增加.900℃下退火，由于扩散系数增大和应变弛豫加强，激发能值单调下降，量子限制效应引起的变化被掩盖.对于B高浓度超 关键词：     

On ultra-thin oxide/Si and very-thin oxide/Si structures prepared by wet chemical process

The properties of ultra-thin oxide/Si and very-thin oxide/Si structures prepared by wet chemical oxidation in nitric acid aqueous solutions (NAOS) and passivated in HCN aqueous solutions were investigated by electrical, optical and structural methods. n- and p-doped (1 0 0) crystalline Si substrates were used. There were identified more types of interface defect states in dependence on both post-oxidation treatment and passivation procedure. On samples prepared on n-type Si, continuous spectrum of defect states of 0.05-0.2 eV range and discrete defect traps, ∼E_CB − 0.26 eV and ∼E_CB − 0.39 eV, were found. All mentioned defects are related with various types of Si dangling bonds and/or with SiO_x precipitates. Post-metallization annealing of investigated MOS structures reduced the interface defect density and suppressed the leakage currents. It did not change spectral profile of interface defect states in the Si band gap. In addition, there are presented following two optical phenomena: relation between amplitude of photoluminescence signal of NAOS samples and parameters of chemical oxidation process and quantum confinement effect observed on samples containing Si grains of size less as ∼2 nm.     

Formation of Ge islands from a Ge layer on Si substrate during post-growth annealing

We have deposited a 12 nm thick Ge layer on Si(1 0 0) held at 200 °C by thermal evaporation under high vacuum conditions. Upon subsequent thermal annealing in vacuum, self-assembled growth of nanostructural Ge islands on the Ge layer occurred. Atomic force microscopy (AFM) and grazing incidence small-angle X-ray scattering (GISAXS) were used to characterize such layers. GISAXS measurements evidenced the formation of cylinder shaped structures upon annealing at 700 °C, which was confirmed by AFM measurements with a very sharp tip. A Ge mass transport from the layer to the islands was inferred by X-ray reflectivity and an activation energy of 0.40 ± 0.10 eV for such a process was calculated.     

Two routes to polycrystalline CoSi2 thin films by co-sputtering Co and Si

Two processes for the fabrication of polycrystalline CoSi₂ thin films based on the codeposition of Co and Si by sputtering were studied and compared. The first process involved “annealing after deposition”, where Co and Si are codeposited at ambient temperature and then crystallized by annealing. This process yielded randomly oriented plate-like CoSi₂ grains with a grain size that is governed by the nanostructure of the as-deposited film. Polycrystalline CoSi₂ thin films were obtained at a process temperature of 170 °C, which was much lower than the annealing temperature of 500 °C needed for Co/Si bilayers. The second process involved “heating during deposition”, where Co and Si are codeposited on heated substrates. This process yielded CoSi₂ grains with a columnar structure, and the grain size and degree of (1 1 1) orientation are temperature dependent. The sheet resistance of the resulting films was determined by the preparation temperature regardless of the deposition process used, i.e. “annealing after deposition” or “heating during deposition”. Temperatures of 500 °C and higher were needed to achieve CoSi₂ resistivity of 40 μΩ cm or lower for both processes.     

Crystallization and surface morphology of Au/SiO2 thin films following furnace and flame annealing

A crystallization and surface evolution study of Au thin film on SiO₂ substrates following annealing at different temperatures above the eutectic point of the Au/Si system are reported. Samples were prepared by conventional evaporation of gold in a high vacuum (10⁻⁷ mbar) environment on substrates at room temperature. Thermal treatments were performed by both furnace and flame annealing techniques. Au thin films can be crystallized on SiO₂ substrates by both furnace and flame annealing. Annealing arranges the Au crystallites in the (1 1 1) plane direction and changes the morphology of the surface. Both, slow and rapid annealing result in a good background in the XRD spectra and hence clean and complete crystallization which depends more on the temperature than on the time of annealing. The epitaxial temperature for the Au/SiO₂ system decreases in the range of 350-400 °C. Furnace and flame annealing also form crystallized gold islands over the Au/SiO₂ surface. Relaxation at high temperatures of the strained Au layer, obtained after deposition, should be responsible for the initial stages of clusters formation. Gold nucleation sites may be formed at disordered points on the surface and they become islands when the temperature and time of annealing are increased. The growth rate of crystallites is highest around 360 °C. Above this temperature, the layer melts and gold diffuses from the substrate to the nucleation sites to increase the distance between islands and modify their shapes. Well above the eutectic temperature, the relaxed islands have hexagonally shaped borders. The mean crystallite diameters grow up to a maximum mean size of around 90 nm. The free activation energy for grain boundary migration above 360 °C is 0.2 eV. Therefore the type of the silicon substrate changes the mechanism of diffusion and growth of crystallites during annealing of the Au/Si system. Epitaxial Au(1 1 1) layers without formation of islands can be prepared by furnace annealing in the range of 300-310 °C and by flame annealing of a few seconds and up to 0.5 min.     

The effect of Si surface nitridation on the interfacial structure and electrical properties of (La2O3)0.5(SiO2)0.5 high-k gate dielectric films

Thermal stability, interfacial structures and electrical properties of amorphous (La₂O₃)_0.5(SiO₂)_0.5 (LSO) films deposited by using pulsed laser deposition (PLD) on Si (1 0 0) and NH₃ nitrided Si (1 0 0) substrates were comparatively investigated. The LSO films keep the amorphous state up to a high annealing temperature of 900 °C. HRTEM observations and XPS analyses showed that the surface nitridation of silicon wafer using NH₃ can result in the formation of the passivation layer, which effectively suppresses the excessive growth of the interfacial layer between LSO film and silicon wafer after high-temperature annealing process. The Pt/LSO/nitrided Si capacitors annealed at high temperature exhibit smaller CET and EOT, a less flatband voltage shift, a negligible hysteresis loop, a smaller equivalent dielectric charge density, and a much lower gate leakage current density as compared with that of the Pt/LSO/Si capacitors without Si surface nitridation.