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1.
设计了一种用于AC-DC电源芯片的低温漂、高精度、可降频振荡器。该电路利用系统中的LDO模块产生的基准电压,在MOS和BJT两种不同类型的跟随器上产生两路正负温度系数的电流。对电流进行正负温度补偿后,在逻辑控制下对电容充放电,经过双门限比较器和整形电路产生100 kHz的方波信号。该电路具备在系统启动中具有重要作用的自启动功能。采用0.5 μm BiCMOS工艺,利用Hspice和Cadence进行仿真,在芯片系统典型应用环境下,仿真得到振荡频率为100.2 kHz,当温度在-40 ℃~125 ℃之间变化时,振荡器的频率随温度的偏移在1%以内。该振荡器已被成功应用于一款AC-DC电源管理芯片的设计中。  相似文献   

2.
刘锡锋  居水荣  杨仕伟 《电子科技》2014,27(10):160-162
振荡器是数字集成电路中常用的单元电路之一,为兼顾振荡频率和CMOS工艺集成,文中从电路结构着手,设计了一种CMOS矩形波振荡器。该振荡器采用标准CMOS电路,能够提供稳定的矩形波信号,信号输出频率和脉宽均可调节。  相似文献   

3.
应用于手机等通信电子产品电源系统的DC-DC开关电源变换器芯片,要求具有高性能的振荡器。鉴于此要求,设计了一款具有充放电电容的高性能振荡器。该振荡器基于0.5μm BCD工艺库,利用Cadence和Hspice软件,在芯片系统典型应用环境下仿真,得到的内同步振荡频率为794 k Hz,外部EN同步振荡频率为1 MHz到2MHz;在VCC=5.5 V,0~125℃温度范围内振荡器的频率偏移在6%以内。仿真结果显示,该振荡器性能良好,适用于DC-DC开关电源。  相似文献   

4.
一种频率稳定的改进型CMOS环形振荡器   总被引:3,自引:2,他引:3  
汪东旭  孙艺 《微电子学》1999,29(5):370-373
在传统的环形振荡器基础上,提出了一种改进的CMOS环形振荡器。它克服了传统CMOS环形振荡器振荡频率随电源电压变化而严重不稳的缺点。通过仿真得到了电源电压与振荡频率的对应关系,取得了满意的结果。  相似文献   

5.
本文基于SMIC 65nm标准CMOS工艺提出了一种用于锁相环的环形压控振荡器的电路设计。包括了环形振荡器和缓冲整形电路。该环形压控振荡器有四级延时单元,并且延时单元采用了Maneatis对称负载。该电路在Cadence Spectre进行了仿真。结果表明,在电源电压1.8V时,频率调整范围为0.277GHz~1.33GHz,具有良好的线性度。频偏为1MHz时的相位噪声为-92.46dBc/Hz@1MHz,有良好的噪声性能。缓冲整形电路将压控振荡器的输出波形转换为轨到轨电压,使占空比等于50%,并提高了驱动能力。振荡器的稳定频率分别为400/500MHz。  相似文献   

6.
提出了一种基于CSMC 0.25μm CMOS工艺、输出高精度方波信号的低成本RC振荡器。采用正负温度系数电阻的线性叠加,产生不受温度影响的充电电流,消除了温度对精度的影响。增加修调电容,补偿工艺偏差对精度的影响,实现高精度的振荡输出。采用Spectre对电路进行温度扫描和电压变化仿真,结果表明在宽温度范围(-55~125℃)和宽电源电压范围(2.7~5.5 V)得到了非常稳定的振荡输出,受温度影响的频偏最大为1%,受电源电压变化的频偏仅为0.26%,适合电源管理芯片应用。  相似文献   

7.
一种基于内部迟滞比较器的新型RC振荡器   总被引:2,自引:0,他引:2       下载免费PDF全文
提出并设计了一种新型RC振荡器,采用3.3 V CMOS工艺实现.与传统的基于外部迟滞比较器的原理不同,该RC振荡器巧妙地基于内部正反馈的迟滞比较器设计而成.它具有电路结构简单,芯片面积小,成本低廉的优点,而且可以根据不同的控制信号,工作于高频2.5 MHz或低频135 kHz.仿真结果表明,该电路符合设计指标.  相似文献   

8.
提出了基于TSMC 0.18μm RF CMOS工艺带温度补偿高精度振荡器的设计方案。针对射频电子标签应用的设计要求,选用改进型的双电容张弛振荡器结构。通过温度补偿作用,参考电压与输出电流受电源影响较小,保证了振荡器输出频率的稳定性。使用SPECTRE工具对电路进行仿真,在1.8 V电源电压下,-25100℃范围内,中心频率为1.92 MHz时最大偏差小于±0.75%,达到使用的要求,并在此基础上完成电路的版图。  相似文献   

9.
本文介绍了一种改进LC振荡器设计方法,谐振回路采用非对称电容结构,与常见的振荡器结构相比,经改进的电路结构可以获得更好的相位噪声。本文基于CMOS工艺,设计了一种采用补偿Colpitts振荡器电路结构实现的差分LC压控振荡器,工作电压为2.5v。经仿真证明,通过调整非对称电容谐振回路中的电容值,可以获得最优的相位噪声  相似文献   

10.
一种频率可调CMOS环形振荡器的分析与设计   总被引:1,自引:0,他引:1       下载免费PDF全文
刘皓  景为平   《电子器件》2006,29(4):1023-1026
给出了一个采用0.6um CMOS工艺设计的改进结构环形振荡器,电路由RC充放电回路、施密特单元以及反相延时单元组成,结构简单,工作频率受集成电路工艺参数影响小。该电路带有使能控制端,并且通过调节少量的外部元件可以改变电路的振荡频率,适用作各类中/低频数字集成电路中的时钟产生电路。分析了改进结构环形振荡器的工作原理,给出了Hspice软件环境下电路仿真方法。电路流片封装后的实际测试结果表明,用该结构的环形振荡器作为时钟产生电路,工作稳定,满足了系统工作要求。  相似文献   

11.
马田华  蒋国平  王利 《电子器件》2005,28(1):154-157
以比较器为核心电路,并采用恒流源充放电技术,设计了一种基于1.2μmCMOS工艺的锯齿波振荡电路,并对其各单元组成电路的设计进行了阐述。同时利用Cadence SpectreS仿真工具对电路进行了仿真模拟,结果表明,锯齿波信号的线性度较好,同时在电源电压5.0V左右,信号振荡频率变化很小;在27℃到55℃的温度范围内,信号振荡频率变化也很小。可见在适当的电源电压和温度变化范围内,振荡电路的性能较好,可广泛应用在PWM等各种电子电路中。  相似文献   

12.
A low-voltage fully differential MOSEFT-C bandpass-based voltage-controlled oscillator for the purpose of frequency-tuning of filters is proposed. This oscillator is guaranteed to start oscillating and provide well-controlled amplitude. Experimental filters and the filter tuning circuit are designed to demonstrate its use. The performance of this circuit is shown by experimental results.  相似文献   

13.
A novel sinusoidal oscillator, constructed from only one CCII with variable current gain, is presented and analyzed. The oscillator provides electronically tunable frequency, with good stability and low sensitivities, while variation of current gain does not affect the condition of oscillations. By the proposed circuit topology, the parasitic elements which exist at current conveyor terminals are absorbed by the external components and their action is diminished. Moreover, the parasitic poles of the current conveyor are taken into account and compensation technique and design criteria are applied, so that the oscillator can operate above 35 MHz.  相似文献   

14.
This paper describes the implementation of a quadrature cross-coupled relaxation oscillator to be used in an OFDM RF front-end transceiver. A prototype of the oscillator was realized in a SiGe BiCMOS technology, and an oscillation frequency of 5.8 GHz was obtained which is 1/6 of the maximum f T of the bipolar transistors. The circuit performance is evaluated by simulation and by experiment.  相似文献   

15.
This letter presents a square root domain oscillator; which inherits the tunability, linearity, and frequency response of square root domain filters. The oscillator is based on an extreme case of a second order bandpass filter with quality factor set to infinity. The oscillator function is demonstrated analytically and by simulation.  相似文献   

16.
Unity-gain voltage followers and unity-gain current followers have attracted attention in the recent literature in the context of analog signal processing as well as signal generation because of the advantages of wider bandwidth and low power consumption of these active elements as compared to other more complex building blocks. Motivated by these advantages, followers have been used as alternatives to other more complex building blocks in the realisation of filters, oscillators and more recently, in impedance converters. Although some configurations for realizing sinusoidal oscillators using unity-gain voltage/current followers have been described in the earlier literature, only one of them is a second-order single-resistance-controlled oscillator but requires as many as eight followers. This paper derives, through a state-variable synthesis approach, a number of new follower-based single-resistance-controlled oscillators requiring a much smaller number (only two to four) of followers. The new circuits are shown to possess a number of other interesting features. The workability of the new structures has been confirmed by SPICE simulation results using CMOS-based followers. S.S. Gupta was born on July 2, 1962 at Kalinjer (Banda), UP, India. He obtained B.E. in 1982 (from Government Engineering College, Rewa, India) and M.E. (Honors) in 1988 (from Motilal Nehru National Institute of Technology, Allahabad, India)- both in Electrical Engineering. He worked as a Lecturer in Electrical Engineering Department of Motilal Nehru National Institute of Technology, Allahabad during 1984–85. He worked as Design Engineer at Bharat Heavy Electricals Limited, Jhansi during 1985–87 before joining Ministry of Industry, Govt. of India in 1988 where he worked as Assistant Development Officer till June 2000. Since June 2000, he is working as Assistant Professor in the Division of Electronics and Communication Engineering, Netaji Subhas Institute of Technology, New Delhi. His teaching and research interest are in the areas of Network Synthesis and Filter Design, Analog Integrated Circuits and Signal Processing, Bipolar and MOS current mode circuit design and chaotic nonlinear circuits and he has published thirteen papers in various international journals of repute. Raj Senani was born on March 14, 1950 at Budaun, UP, India. He received B.Sc. from Lucknow University, B.Sc. Engg. from Harcourt Butler Technological Institute, Kanpur, M.E. (Honors) from Motilal Nehru National Institute of Technology, Allahabad and Ph.D. in Electrical Engg. from the University of Allahabad. Dr. Senani held the positions of Lecturer (1975–1986) and Reader (1987–1988) at the Electrical Engineering Department of M.N.R. Engineering College, Allahabad. He joined the Electronics and Communication Engineering (ECE) Department of the Delhi Institute of Technology (DIT), Delhi in 1988 as an Assistant Professor. He became a Professor in 1990. Since then, he has served as Head, ECE Department (1990–1993, 1997–1998), Head Applied Sciences (1993–1996), Head, Manufacturing Processes and Automation Engineering (1996–1998), Dean Research (1993–1996), Dean Academic (1996–1997), Dean Administration (1997–1999), Dean Post Graduate Studies (1997–2001), Director, Netaji Subhas Institute of Technology (NSIT) during June 1996–September 1996, February 1997–June 1997 and May 2003–January 2004. He is currently functioning as Head, Division of ECE at NSIT (2000-till date). Professor Senani's teaching and research interests are in the areas of Circuits, Systems and Signal Processing, Bipolar and CMOS analog integrated circuits, Current-mode Signal processing, Electronic Instrumentation, Chaotic nonlinear circuits and Log-domain/Translinear circuits. He has authored or co-authored 100 research papers in the above areas which have been published in IEEE (USA), IEE (UK) and other international journals of repute. He served as an Honorary Editor of the Research Journal of the Institution of Electronics and Telecommunication Engineers (IETE, India) during 1990–1995, in the area of Circuits and Systems and has been a Member of the Editorial Board of the IETE Journal on Education since 1995. He has been functioning as Editorial reviewer for a number of IEEE (USA), IEE (UK) and other international journals of repute. He is currently serving as an Associate Editor for the Journal on Circuits, Systems and Signal Processing, Birkhauser Boston (USA). He is listed in several editions of Marquis' Who's Who in the World, Marquis' Who's Who in Science and Engineering, Marquis' Who' Who in Finance and Industry (all published from N.J., USA during 1998–2004); 2000 Outstanding Scholars of the 21st Century and Outstanding people of the 20th Century (both published by International Biographical Centre, Cambridge); Indo-American Who's Who (2001), Indo-Asian Who's Who (2003), Asia's Who's Who of Men & Women of Achievement (2003), Asia/Pacific Who's Who (2004) and a number of other international biographical directories.  相似文献   

17.
A multiphase active-R sinusoidal oscillator circuit is presented.The oscillator can produce M signals (M being even or odd) equally spaced inphase. The circuit has low component count, uses grounded resistors andenjoys low active and passive sensitivities. The feasibility of convertingthe circuit into a voltage controlled multiphase oscillator is studied.Simulation results are included.  相似文献   

18.
This paper proposes a new multi-stage CMOS voltage-controlled ring VCO called modified Park-Kim ring VCO for multi-Gbps serial links. An in-depth comparative study of pros and cons of Park-Kim VCO and the modified Park-Kim VCO with both single and dual delay paths is given. We show that the modified Park-Kim VCO offers an improved oscillation frequency, large output voltage swing, comparable frequency tuning range and phase noise as compared with Park-Kim VCO proposed in [1, 2]. We further show that although the modified Park-Kim VCO with single delay path and that with dual delay path offer comparable oscillation frequencies when the number of stages of the VCOs is high, the former provides a large frequency tuning range and reduced circuit complexity. To verify performance improvement, both Park-Kim VCOs and the modified Park-Kim VCOs are implemented in TSMC’s-0.18 μm, 1.8 V CMOS technology and analyzed using SpectreRF from Cadence Design Systems with BSIM3.3 device models. Simulation results are presented.  相似文献   

19.
一种CMOS锯齿波振荡电路的设计   总被引:2,自引:0,他引:2  
以比较器为核心电路,并采用恒流源充放电技术,设计了一种基于1.2 μmCMOS工艺的锯齿波振荡电路.并利用Cadence SpectreS仿真工具对电路进行了仿真模拟,结果表明,锯齿波信号的线性度较好,同时其信号振荡频率随电源电压的变化和温度的变化很小,性能良好,可广泛应用在PWM等各种电子电路中.  相似文献   

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