增强金属-氧化物-金属隧道结的光发射

本文报道通过改进制作工艺将A1-A12O3-Au隧道结的耐压增加到5.3V,发光外量子效率增加到8.2×10-4,均高过迄今见到的关于该类结的最高耐压和最高效率的报道。我们观测到了该发光结上的Au膜厚度对发射光谱形状的影响,并对此作出了解释;还对该光谱中的截止频率和峰值的存在给出了理论解释。     

串口型铁电存储器总剂量辐射损伤效应和退火特性

对一款商用串口I2C型铁电存储器进行了⁶⁰Coγ 辐射和退火实验, 研究了铁电存储器的总剂量效应和退火特性. 使用了超大规模集成电路测试系统测试了铁电存储器的DC, AC, 功能参数, 分析了辐射敏感参数在辐射和退火过程中的变化规律. 实验结果表明: 总剂量辐射在器件内产生大量氧化物陷阱电荷, 造成了铁电存储器外围控制电路MOS管阈值向负向漂移, 氧化物陷阱电荷引入附加电场使铁电薄膜受肖特基发射或空间电荷限制电流的作用, 产生辐射感生漏电流. 由于浅能级亚稳态的氧化物陷阱电荷数量上多于深能级氧化物陷阱电荷, 使得器件功能和辐射敏感参数在常温退火过程中快速恢复. 关键词： 铁电存储器 总剂量辐射 退火特性     

金属-氧化物-半导体器件γ辐照温度效应

研究了金属-氧化物-半导体(MOS)器件在γ射线辐照条件下的温度效应.采用加固的CC4007进 行辐照实验,在不同温度、不同偏压,以及不同退火条件下对MOS器件的辐照效应进行了比 较,发现温度对辐照效应的影响主要是决定界面态建立的快慢.高温下辐照的器件,界面态 建立的时间缩短.根据实验结果对器件阈值电压漂移的机理进行了探讨. 关键词： 金属-氧化物-半导体场效应 辐射效应 阈值电压漂移     

U型槽刻蚀工艺对GaN垂直沟槽型金属-氧化物-半导体场效应晶体管电学特性的影响

U型槽的干法刻蚀工艺是GaN垂直沟槽型金属-氧化物-半导体场效应晶体管(MOSFET)器件关键的工艺步骤,干法刻蚀后GaN的侧壁状况直接影响GaN MOS结构中的界面态特性和器件的沟道电子输运.本文通过改变感应耦合等离子体干法刻蚀工艺中的射频功率和刻蚀掩模,研究了GaN垂直沟槽型MOSFET电学特性的工艺依赖性.研究结果表明,适当降低射频功率,在保证侧壁陡直的前提下可以改善沟道电子迁移率,从35.7 cm^2/(V·s)提高到48.1 cm^2/(V·s),并提高器件的工作电流.沟道处的界面态密度可以通过亚阈值摆幅提取,射频功率在50 W时界面态密度降低到1.90×10^12 cm^-2·eV^-1,比135 W条件下降低了一半.采用SiO2硬刻蚀掩模代替光刻胶掩模可以提高沟槽底部的刻蚀均匀性.较薄的SiO2掩模具有更小的侧壁面积,高能离子的反射作用更弱,过刻蚀现象明显改善,制备出的GaN垂直沟槽型MOSFET沟道场效应迁移率更高,界面态密度更低.     

溅射气氛和退火方式对硅纳米晶的形成及发光特性的影响

利用磁控溅射技术溅射硅靶,通过调节溅射气氛在硅衬底上生长了SiO/SiO₂超晶格,热退火处理后超晶格中的SiO发生相分离得到硅纳米晶。通过比较不同退火方式对于硅纳米晶的形成的影响发现,管式炉退火处理的样品给出非常强的室温光致发光,其发光峰的峰位随着硅纳米晶尺寸的增大而红移,且管式炉退火比快速热退火更有利于硅纳米晶的形成。     

金属-氧化物-半导体场效应管辐射效应模型研究

基于氧化层陷阱电荷以及界面陷阱电荷的产生动力学以及辐射应力损伤的微观机理,推导出了金属-氧化物-半导体场效应管(MOSFET)中辐射应力引起的氧化层陷阱电荷、界面陷阱电荷导致的阈值电压漂移量与辐射剂量之间定量关系的模型. 根据模型可以得到:低剂量情况下,氧化层陷阱电荷与界面陷阱电荷导致的阈值电压漂移量与辐射剂量成正比;高剂量情况下,氧化层陷阱电荷导致的阈值电压漂移量发生饱和, 其峰值与辐射剂量无关,界面陷阱电荷导致的阈值电压漂移量与辐射剂量呈指数关系. 另外,模型还表明氧化层陷阱电荷与界面陷阱电荷在不同的辐射剂量点开始产生饱和现象, 其中界面陷阱电荷先于氧化层陷阱电荷产生饱和现象.最后,用实验验证了该模型的正确性. 该模型可以较为准确地预测辐射应力作用下MOSFET的退化情况.     

后退火处理对铟锡氧化物表面等离激元共振特性的影响

近年来,表面等离激元光子学发展迅速,并取得了众多新成果.重掺杂半导体材料的表面等离激元共振性质的研究,也得到了人们越来越多的关注.本文通过纳米球刻印技术制备准三维二氧化硅纳米球阵列,在阵列上沉积铟锡氧化物薄膜,通过不同条件下的后退火处理改变铟锡氧化物薄膜的载流子浓度和载流子迁移率,并研究随着材料性质的改变其相应表面等离激元共振特性的变化规律.结果表明：退火处理均使铟锡氧化物薄膜的晶粒长大,光学透过率增加;在空气中退火会导致铟锡氧化物薄膜的载流子浓度减少,其表面等离激元共振峰红移;而真空退火则使铟锡氧化物薄膜的载流子浓度增加,共振峰蓝移.这些研究结果可为后续铟锡氧化物表面等离激元材料及器件的研究提供科学依据和实际指导.     

退火温度对溶胶-凝胶法制备锌锡氧化物薄膜晶体管的影响

采用溶胶-凝胶法制备了非晶锌锡氧化物(ZTO)薄膜晶体管(TFT),通过热重-差热分析(TG-DTA)对ZTO胶体中的化学反应进行了分析,研究了不同退火温度对ZTO TFTs性能的影响。结果表明:当退火温度在300~500℃范围内时,薄膜为非晶态结构,薄膜表面致密、平整。当退火温度达到400℃时,薄膜在可见光范围内具有高透过率(>85%)。随着退火温度的升高,器件阈值电压明显降低,由15.85 V降至3.76 V,载流子迁移率由0.004 cm²·V^-1·s^-1提高到5.16 cm²·V^-1·s^-1,开关电流比达到10⁵。退火温度的升高明显改善了ZTO TFT的电学性能。     

ITO退火对GaN基LED电学特性的影响

近些年来,越来越多的发光二极管采用铟锡氧化物(ITO)作为电流扩展层,但是如果不对其进行任何处理,得到的发光二极管的电学特性很差,要得到好的电学特性需要对长有铟锡氧化物的发光二极管进行退火处理.针对不同的退火时间和退火温度对发光二极管的电学特性影响不同的问题,通过测量不同条件下退火得到的发光二极管的理想因子和串联电阻, 根据Shah等人提出的模型进行分析,推测出铟锡氧化物和P型氮化镓的接触特性.结果表明:发光二极管的电学特性开始随着退火温度的升高和时间的增加到达一个优值,如果继续增加温度或者时间都会导致发光二极管电学特性的下降.这样有利于优化退火温度和时间, 得到电学性能较好的器件.     

退火温度对富硅氮化硅薄膜发光特性和结构的影响

采用直流等离子体增强化学气相沉积(PECVD)法在(100)单晶硅片表面生长富硅氮化硅薄膜,研究了不同的退火温度对氮化硅薄膜发光性质和结构的影响。研究发现,随着退火温度的升高,氮化硅薄膜的发光强度逐渐减弱,发光是由缺陷能级引起的,在900 ℃时荧光基本消失。XPS测试表明,在N₂氛围900 ℃下退火,氮化硅薄膜中未有硅相析出,故未表现出硅量子点的发光。FTIR测试也为PL结论提供了一定的证据。     

LaON/SiO2和HfON/SiO2双隧穿层MONOS存储器存储特性的比较

本文对比研究了LaON/SiO₂和HfON/SiO₂双隧穿层MONOS存储器的存储特性. 实验结果表明,LaON/SiO₂双隧穿层MONOS存储器具有较大的存储窗口,快的编程/擦除速度及好的疲劳和保持特性. 其机理在于LaON较大的介电常数有效提高了编程/擦除过程中载流子的注入效率,较小的O 扩散系数减少了界面陷阱,从而减少了保持期间存储电荷通过陷阱辅助隧穿的泄漏. 而且N的结合在界面附近形成了强的La-N,Hf-N 和O-N键,可有效降低编程/擦除循环应力对界面的损伤,使器件具有好的疲劳特性. 此外,研究了退火温度对存储特性的影响,结果表明800 ℃退火样品的存储特性比700 ℃退火的好,这是因为800 ℃时NO退火可在LaON（HfON）中引入更多的N,且能更好释放应力,使介质中缺陷减少. 关键词： MONOS 双隧穿层 LaON HfON     

The charge storage of the nc—Si layer

Sandwiched structures (a-SiN_x/a-Si/a-SiN_x) have been fabricated by the plasma enhanced chemical vapour deposition technique. A Si nanocrystal (nc-Si) layer was formed by crystallization of an a-Si layer according to the constrained crystallization principle after quasi-static thermal annealing at 1100℃ for 30 min. Transmission electron microscopy (TEM) and Raman scattering spectroscopy clearly demonstrated that nc-Si grains were formed in the as-deposited a-Si layer after annealing. The density of nc-Si grains is about 10¹¹cm^-2 as shown by TEM photographs. Using capacitance－voltage (C－V) measurements we investigated the electrical characteristics of the sandwiched structures. The charge storage phenomenon of the nc-Si layer was observed from the shift of flat-band voltage (V_FB) in C－V curves at a high frequency (1 MHz). We estimated the density of nc-Si grains to be about 10¹¹cm^-2 from the shift value of V_FB, which is in agreement with the result of TEM photographs. At the same time, we found that the shift of V_FB increased with the increase of the applied constant dc voltage or the thickness of the nc-Si layer.     

Effect of NO annealing on charge traps in oxide insulator and transition layer for 4H-SiC metal–oxide–semiconductor devices

The effect of nitric oxide(NO) annealing on charge traps in the oxide insulator and transition layer in n-type4H–Si C metal–oxide–semiconductor(MOS) devices has been investigated using the time-dependent bias stress(TDBS),capacitance–voltage(C–V),and secondary ion mass spectroscopy(SIMS).It is revealed that two main categories of charge traps,near interface oxide traps(Nniot) and oxide traps(Not),have different responses to the TDBS and C–V characteristics in NO-annealed and Ar-annealed samples.The Nniotare mainly responsible for the hysteresis occurring in the bidirectional C–V characteristics,which are very close to the semiconductor interface and can readily exchange charges with the inner semiconductor.However,Not is mainly responsible for the TDBS induced C–V shifts.Electrons tunneling into the Not are hardly released quickly when suffering TDBS,resulting in the problem of the threshold voltage stability.Compared with the Ar-annealed sample,Nniotcan be significantly suppressed by the NO annealing,but there is little improvement of Not.SIMS results demonstrate that the Nniotare distributed within the transition layer,which correlated with the existence of the excess silicon.During the NO annealing process,the excess Si atoms incorporate into nitrogen in the transition layer,allowing better relaxation of the interface strain and effectively reducing the width of the transition layer and the density of Nniot.     

Improved characteristics for MOHOS memory with oxygen-rich GdO as charge storage layer annealed by NH3

Characteristics of metal–oxide–high-k–oxide–silicon (MOHOS) memories with oxygen-rich or oxygen-deficient GdO as charge storage layer annealed by NH₃ or N₂ are investigated. Transmission electron microscopy, X-ray photoelectron spectroscopy and X-ray diffraction are used to analyze the cross-sectional quality, composition and crystallinity, respectively, of the stacked gate dielectric with a structure of Al/Al₂O₃/GdO/SiO₂/Si. The MOHOS capacitor with oxygen-rich GdO annealed in NH₃ exhibits a good trade-off among its memory properties: large memory window (4.8 V at ±12 V, 1 s), high programming speed (2.6 V at ±12 V/100 μs), good endurance and retention properties (window degradation of 5 % after 10⁵ program/erase cycles and charge loss of 18.6 % at 85 °C after 10 years, respectively) due to passivation of oxygen vacancies, generation of deep-level traps in the grain boundaries of the GdO layer and suppression of the interlayer between GdO and SiO₂ by the NH₃ annealing.     

Fluorination of Al2O3 blocking layer for improving the performance of metal‐oxide‐nitride‐oxide‐silicon flash memory

The characteristics of Al₂O₃ film grown by atomic‐layer deposition as blocking layer with and without fluorine plasma treatment were investigated based on a capacitor structure of Al/Al₂O₃/TaON/SiO₂/Si. The physical structure was studied by transmission electron microscopy, and the chemical composition of the blocking layer was analyzed by X‐ray photoelectron spectroscopy and secondary ion mass spectroscopy. Moreover, the surface roughness of the blocking layer was investigated by atomic force microscopy. Compared with a capacitor with Al₂O₃ blocking layer, the one with fluorinated Al₂O₃ displayed higher programming/erasing speeds, better endurance property and better charge retention characteristic because the fluorination could reduce excess oxygen and traps in the blocking layer, thus forming a larger barrier height at the interface between the charge‐trapping layer and the blocking layer. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Charge storage characteristics of hydrogenated nanocrystalline silicon film prepared by rapid thermal annealing

The early stages of hydrogenated nanocrystalline silicon (nc-Si:H) films deposited by plasma-enhanced chemical vapour deposition were characterized by atomic force microscopy. To increase the density of nanocrystals in the nc-Si:H films, the films were annealed by rapid thermal annealing (RTA) at different temperatures and then analysed by Raman spectroscopy. It was found that the recrystallization process of the film was optimal at around 1000℃. The effects of different RTA conditions on charge storage were characterized by capacitance--voltage measurement. Experimental results show that nc-Si:H films obtained by RTA have good charge storage characteristics for nonvolatile memory.     

Effect of post annealing on the characteristics of In2S3 buffer layer grown by chemical bath deposition on a CIGS substrate

In₂S₃ as an alternative Cd-free buffer in Cu(In,Ga)Se₂ (CIGS) solar cells was deposited on CIGS substrate by a chemical bath deposition and characterized after post annealing to optimize film properties for CIGS solar cells. A uniform and pinhole-free In₂S₃ film was deposited on a CIGS substrate by H₂O₂ treatment prior to chemical bath deposition. The In₂S₃ layer was an amorphous state due to the co-existence of In–S, In–O, and In–OH bonds. Annealing at 200 °C induced copper diffusion from CIGS into In₂S₃ layer and lowered the band gap from 3.3 to 1.9 eV, leading to phase change from amorphous state to crystalline state. The conduction band alignment at the In₂S₃/CIGS interface can be controlled by the post annealing. The shunt current through In₂S₃ film was prevented down to the thickness of 30 nm and a 1.15 eV shallow defect was eliminated by the annealing. The results indicated that post annealing in air is a critical to fabricate CIGS solar cells with a sub-30 nm CBD-In₂S₃ buffer layer.     

利用等时退火法预估等温退火效应实验研究

对电离辐照损伤后的MOS器件的等温和等时退火特性进行了研究，结果发现，首先，100℃等 温退火是有效的，等时退火所需的全过程时间最短；其次，+5V栅偏压退火相对于0V和浮空 偏置条件，阈值电压恢复速度快、恢复程度大；最后，利用等时退火数据对等温效应进行了 理论预估，实验等温曲线和预估结果吻合得较好. 关键词： 等温退火 等时退火 MOS器件     

Effect of annealing atmosphere on the photoluminescence of ZnO nanospheres

ZnO nanospheres were synthesized by a wet-chemical method. X-ray diffraction and field-emission scanning electron microscopy confirmed the formation of wurtzite-structured ZnO with regular sphere shape. Two Raman modes located at 333 cm⁻¹ and 437 cm⁻¹ with two additional Raman humps centered at 577 cm⁻¹ and 1077 cm⁻¹ were observed. Photoluminescence spectra showed ultraviolet, green, orange and red emissions, which changed significantly after the samples were annealed in air, oxygen, argon and forming gas four different ambiences. All the evidence indicates that surface states are responsible to orange and red emissions in addition to excitonic recombination (3.18 eV) and oxygen vacancy (2.25 eV) emission.