Schottky barrier properties of various metal (Zr, Ti, Cr, Pt) contact on p-GaN revealed from I-V-T measurement

Schottky barrier contact using three different metal (Zr, Ti, Cr and Pt) and Ohmic contact using Ni were made on same epitaxial growth layer of p-GaN. Measurements were carried out using current-voltage-temperature (I-V-T) in the range of 27-100°C. Under forward bias and room-temperature (RT), the ideality factors (η) were determined to be 2.38, 1.82, 1.51 and 2.63, respectively, for Zr, Ti, Cr and Pt. The Schottky barrier height (SBH) and effective Richardson coefficient A^** were measured through modified Norde plot as one of the analysis tools. Barrier heights of 0.84, 0.82, 0.77 and 0.41 eV for Zr, Ti, Cr and Pt, respectively, were obtained from the modified Norde plot. Schottky barrier heights of Zr, Ti, or Cr/p-GaN were also measured through activation energy plot, and determined to be in the same range (∼0.87 eV) and Pt at 0.49 eV. These results indicate that the Fermi level seems to be pinned due to the value of slope parameter (S) was very low (S = −0.25).     

Fermi Level Unpinning and Schottky Barrier Modification by Ti, Sc and V Incorporation at NiSi2/Si Interface

A new method is proposed to modify the Schottky barrier height （SBH） for nickel silicide/Si contact. Chemical and electrical properties for NiSi2/Si interface with titanium, scandium and vanadium incorporation are investigated by first-principles calculations. The metal/semiconductor interface states within the gap region are greatly decreased, which is related to the diminutions of junction leakage when Ti-cap is experimentally used in nickel silicide/Si contact process. It leads to an unpinning metal/semiconductor interface. The SBH obeys the Schottky-Mort theory. Compared to Ti substitution, the SBH for electrons is reduced for scandium and increases for vanadium.     

High‐temperature stability of Au/p‐type diamond Schottky diode

Rectification properties of Au Schottky diodes were investigated in high‐temperature operation. These diodes were fabricated on a p‐type diamond single crystal using the vacuum‐ultraviolet light/ozone treatment. The ideality factor n of the Schottky diodes decreased monotonically with increasing measurement temperature whereas the Schottky barrier height ?_b increased, and ?_b reached 2.6 eV at 550 K with n of 1.1. Through high temperature heating at 870 K, the mean value of ?_b at 300 K changed permanently from 2.2 eV to 1.1 eV. Decrease of ?_b might originate from a dissolution of oxygen termination at the Au/diamond interface. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Inhomogeneities in 130 MeV Au ion irradiated Au/n-Si (1 0 0) Schottky structure

The electrical characteristics of Au/n-Si (1 0 0) Schottky rectifier have been studied in a wide irradiation fluence range using conventional current-voltage (I-V) and capacitance-voltage (C-V) measurements. The I-V characteristics showed an abnormal increase in forward current at low voltage. The device shows a bend in forward I-V and reverses bias C-V characteristics due to extra current, suggesting that there are two independent contributions to thermionic current, corresponding to two levels of the Schottky barrier. It is shown that the excess current at low voltage can be explained by taking into account the role of heavy ion irradiation induced defects at the metal semiconductor interface.     

Effects of chemical treatment on barrier height and ideality factors of Au/GaN Schottky diodes

We have studied Au/n-GaN Schottky barrier diodes. GaN surfaces have been prepared by cleaning in HCl and (NH₄)₂S prior to metal deposition. The zero-biased barrier heights and ideality factors obtained from the current-voltage characteristics differ from diode to diode, although all the samples were prepared identically. The statistical analysis for the reverse bias C-V data yielded mean value of (1.35±0.04) eV for Schottky barrier height of HCl treated sample and (1.20±0.03) eV for (NH₄)₂S sample, where 9 dots were considered from each cleaning method. It was found that the barrier height values obtained from the C⁻²-V (1.43 eV) and I-V characteristics (0.89 eV) are different from each other by 0.54 eV. The inhomogeneous barrier heights were found to be related to the effect of the high series resistance on diode parameters (Akkiliç et al., 2004) [1].     

Electronic structure of pristine CuPc: Experiment and calculations

The filled and unoccupied electronic states of the organic semiconductor copper-phthalocyanine (CuPc) have been determined by a combination of direct and resonant photoemission, near-edge X-ray absorption and first principles calculations. The experimentally obtained electronic states of CuPc are in very good agreement with results of ab initio density of states, allowing to derive detailed site specific information.     

Current-voltage characteristics of Au/GaN/GaAs structure

Au/GaN/n-GaAs structure has been fabricated by the electrochemically anodic nitridation method for providing an evidence of achievement of stable electronic passivation of n-doped GaAs surface. The change of the electronic properties of the GaAs surface induced by the nitridation process has been studied by means of current-voltage (I-V) characterizations on Schottky barrier diodes (SBDs) shaped on gallium nitride/gallium arsenide structure. Au/GaN/n-GaAs Schottky diode that showed rectifying behavior with an ideality factor value of 2.06 and barrier height value of 0.73 eV obeys a metal-interfacial layer-semiconductor (MIS) configuration rather than an ideal Schottky diode due to the existence of GaN at the Au/GaAs interfacial layer. The formation of the GaN interfacial layer for the stable passivation of gallium arsenide surface is investigated through calculation of the interface state density N_ss with and without taking into account the series resistance R_s. While the interface state density calculated without taking into account R_s has increased exponentially with bias from 2.2×10¹² cm⁻² eV⁻¹ in (E_c−0.48) eV to 3.85×10¹² cm⁻² eV⁻¹ in (E_c−0.32) eV of n-GaAs, the N_ss obtained taking into account the series resistance has remained constant with a value of 2.2×10¹² cm⁻² eV⁻¹ in the same interval. This has been attributed to the passivation of the n-doped GaAs surface with the formation of the GaN interfacial layer.     

Investigation of ruthenium Schottky contacts to n-GaAs

Ruthenium was evaporated on n-GaAs to form Schottky contacts. Initial electrical measurements revealed a near ideal Schottky behaviour with low leakage currents. The Schottky diodes exhibit good stability upon thermal aging at elevated temperatures up to 300° C. However, the diode parameters rapidly deteriorate after aging at temperatures in excess of 400° C. The room temperature (300 K) median life of the diodes, based on a failure criterion of a tenfold increase in the diode saturation current, J _riv ^s , from reverse bias current-voltage (I–V) data, was of the order of 10⁴ h.     

Schottky barrier and pn-junctionI/V plots — Small signal evaluation

This paper proposes and examines three different plots for the determination of the saturation current, the ideality factor, and the series resistance of Schottky diodes and solar cells from the measurement of a single current (I)/voltage(V) curve. All three plots utilize the small signal conductance and avoid the traditional Norde plot completely. A test reveals that the series resistance and the barrier height of a test diode can be determined with an accuracy of better than 1%. Finally it is shown that a numerical agreement between measured and fittedI/V curves is generally insufficient to prove the physical validity of current transport models.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.     

Anomalous current transport in Au/low-doped n-GaAs Schottky barrier diodes at low temperatures

0 effect, the zero-bias barrier height was found to exhibit two different trends in the temperature ranges of 77–160 K and 160–300 K. The variation in the flat-band barrier height with temperature was found to be -(4.7±0.2)×10⁴ eVK^-1, approximately equal to that of the energy band gap. The value of the Richardson constant, A^**, was found to be 0.27 A cm^-2K^-2 after considering the temperature dependence of the barrier height. The estimated value of this constant suggested the possibility of an interfacial oxide between the metal and the semiconductor. Investigations suggested the possibility of a thermionic field-emission-dominated current transport with a higher characteristic energy than that predicted by the theory. The observed variation in the zero-bias barrier height and the ideality factor could be explained in terms of barrier height inhomogenities in the Schottky diode. Received: 4 December 1997/Accepted: 28 July 1998     

Study of metal-semiconductor interface states using deep level transient spectroscopy

This paper describes the principle of the determination of interface-state parameters by deep level transient spectroscopy (DLTS) and presents a new, simple and exact method to discriminate the DLTS signal due to the emission from interface states from that from bulk traps. The n-type Au-GaAs and Cr-GaAs interfaces have been investigated by the technique. The results obtained in the investigation have revealed the dependences of the energy position, density and capture cross section for the interface states on the metal deposited onto the semiconductor surface, which is consistent with the theoretical prediction by Yndurain and the experimental results obtained by other authors.     

Intersecting behaviour of nanoscale Schottky diodes I-V curves

We describe a new feature connected with Schottky barriers with nanosize dimensions. We found out by theoretical analysis that the I-V curves of such small diodes measured at different temperatures should intersect and consecutively at higher voltages larger current flows through the diode at lower temperatures. This effect which is at first glance in contradiction with the thermionic theory is caused by the series resistance influence. We show that the presence of the series resistance is a necessary condition of its observation. However, the intersection voltage—minimum voltage at which the intersection may occur—increases with the value of the series resistance and the diode dimensions for which the effect could be observable in Si diodes and the common series resistance values must be in submicrometer range. Diodes with several hundreds nanometers dimension have the intersection voltage ∼1 V. Analytical expression for the intersection voltage values was also derived.     

Electrical Characteristics of Co/n-Si Schottky Barrier Diodes Using I-V and C-V Measurements

Electrical characteristics of Co/n-Si Schottky barrier diodes are analysed by current- voltage （I- V） and capacitancevoltage （C- V） techniques at room temperature. The electronic parameters such as ideality factor, barrier height and average series resistance are determined. The barrier height 0. 76 eV obtained from the C - V measurements is higher than that of the value 0. 70 eV obtained from the I - V measurements. The series resistance Rs and the ideality factor n are determined from the d ln（ I） /dV plot and are found to be 193.62 Ω and 1.34, respectively. The barrier height and the Rs value are calculated from the H（I） - I plot and are found to be 0.71 eV and 205.95Ω. Furthermore, the energy distribution of the interface state density is determined from the forward bias I - V characteristics by taking into account the bias dependence of the effective barrier height. The interface state density Nss ranges from 6.484×10^11 cm^-2eV^-1 in （Ec - 0.446） eV to 2.801×10^10 cm^-2eV^-1 in （Ec - 0.631） eV, of the Co/n-Si Schottky barrier diode. The results show the presence of a thin interracial layer between the metal and the semiconductor.     

Observation of strain relaxation in Si1-xGex layers by optical and electrical characterisation of a Schottky junction

We have studied the effect of the strain relaxation on the band-edge alignments in a Pt/p-Si_1-xGe_x Schottky junction with x=0.14 by internal photoemission spectroscopy and current–voltage measurements. We have shown that the variations in the band-edge alignments can be observed directly by measuring the optical and electrical properties of a simple Schottky junction. The strain in the Si_1-xGe_x layer has been partially relaxed by thermal treatments at two different temperatures. The degree of relaxation and other structural changes have been determined by a high-resolution X-ray diffractometer. Both optical and electrical techniques have shown that the barrier height of the Pt/Si_0.86Ge_0.14 junction increases with the amount of relaxation in the Si_1-xGe_x layer. This shows that the valence-band edge of the Si_1-xGe_x layer moves away from the Fermi level of the Pt/Si_1-xGe_x junction. The band-edge movement results from the increase in the band gap of the Si_1-xGe_x layer after the strain relaxation. This result agrees with the theoretical predictions for the strain-induced effects on the Si_1-xGe_x band structure. Received: 18 October 2000 / Accepted: 19 December 2000 / Published online: 23 March 2001     

Passivation of defect states in Si-based and GaAs structures

Formation of defect states on semiconductor surfaces, at its interfaces with thin films and in semiconductor volumes is usually predetermined by such parameters as semiconductor growth process, surface treatment procedures, passivation, thin film growth kinetics, etc. This paper presents relation between processes leading to formation of defect states and their passivation in Si and GaAs related semiconductors and structures. Special focus is on oxidation kinetics of yttrium stabilized zirconium/SiO₂/Si and Sm/GaAs structures. Plasma anodic oxidation of yttrium stabilized zirconium based structures reduced size of polycrystalline silicon blocks localised at thin film/Si interface. Samarium deposited before oxidation on GaAs surface led to elimination of EL2 and/or ELO defects in MOS structures. Consequently, results of successful passivation of deep traps of interface region by CN⁻ atomic group using HCN solutions on oxynitride/Si and double oxide layer/Si structures are presented and discussed. By our knowledge, we are presenting for the first time the utilization of X-ray reflectivity method for determination of both density of SiO₂ based multilayer structure and corresponding roughnesses (interfaces and surfaces), respectively.     

Study of Ni/Si(1 0 0) solid-state reaction with Al addition

The characteristics of Ni/Si(1 0 0) solid-state reaction with Al addition (Ni/Al/Si(1 0 0), Ni/Al/Ni/Si(1 0 0) and Al/Ni/Si(1 0 0)) is studied. Ni and Al films were deposited on Si(1 0 0) substrate by ion beam sputtering. The solid-state reaction between metal films and Si was performed by rapid thermal annealing. The sheet resistance of the formed silicide film was measured by four-point probe method. The X-ray diffraction (XRD) was employed to detect the phases in the silicide film. The Auger electron spectroscopy was applied to reveal the element profiles in depth. The influence of Al addition on the Schottky barrier heights of the formed silicide/Si diodes was investigated by current-voltage measurements. The experimental results show that NiSi forms even with the addition of Al, although the formation temperature correspondingly changes. It is revealed that Ni silicidation is accompanied with Al diffusion in Ni film toward the film top surface and Al is the dominant diffusion species in Ni/Al system. However, no Ni_xAl_y phase is detected in the films and no significant Schottky barrier height modulation by the addition of Al is observed.     

Barrier Enhancement Effect of Postannealing in Oxygen Ambient on Ni/AIGaN Schottky Contacts

Al0.2 Ga0.8N/GaN samples are grown by metalorganic chemical vapour deposition （MOCVD） method on （0001） sapphire substrates. A 10nm-thick Ni layer is deposited on AlGaN as the transparent Schottky contact. The effect of postannealing in oxygen ambient on the electrical properties of Ni/AlGaN is studied by current-voltage- temperature （I-V-T） measurement. The annealing at a relatively low temperature of 300℃ for 90 s results in a decrease of the ideality factor from 2.03 to 1.30 and an increase of the Schottky barrier height from 0.77eV to 0.954 e V. The I-V-T analysis confirms the improvement originated from the formation of NiO, a layer with higher resistance, which could passivate the surface states of AlGaN and suppress the tunnelling current. Furthermore, the annealing also leads to an increase of the transmittance of the contacts from 57.5% to 78.2%, which would be favourable for A1GaN-based photodetectors.     

Oxygen pressure dependent interfacial polarization of perovskite oxide multilayers on Si substrates

The SrTiO₃/La_0.9Sr_0.1MnO₃ (STO/LSMO) multilayers were fabricated on n-Si (1 0 0) substrates using a computer-controlled laser molecular-beam epitaxy (MBE) technique at 1 × 10⁻² Pa and 2 × 10⁻⁴ Pa oxygen partial pressures, respectively. The dielectric properties of the multilayers (MLs) were investigated. The differences of the dielectric properties of the two samples were explained by an impedance analysis technique, which indicates that the interfacial polarization has a close relationship with the oxygen pressure.     

The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.