Characterization of Al/Si junctions on Si(100) wafers with chemical vapor deposition-based sulfur passivation

Chemical vapor deposition-based sulfur passivation using hydrogen sulfide is carried out on both n-type and p-type Si(100) wafers. Al contacts are fabricated on sulfur-passivated Si(100) wafers and the resultant Schottky barriers are characterized with current–voltage (I–V), capacitance–voltage (C–V) and activation-energy methods. Al/S-passivated n-type Si(100) junctions exhibit ohmic behavior with a barrier height of <0.078 eV by the I–V method and significantly lower than 0.08 eV by the activation-energy method. For Al/S-passivated p-type Si(100) junctions, the barrier height is ~0.77 eV by I–V and activation-energy methods and 1.14 eV by the C–V method. The discrepancy between C–V and other methods is explained by image force-induced barrier lowering and edge-leakage current. The I–V behavior of an Al/S-passivated p-type Si(100) junction remains largely unchanged after 300 °C annealing in air. It is also discovered that heating the S-passivated Si(100) wafer before Al deposition significantly improves the thermal stability of an Al/S-passivated n-type Si(100) junction to 500 °C.     

Capacitance-voltage measurements on p-n-p InP structures

The electrical properties of p-type layers of indium phosphide (InP) formed by the diffusion of zinc into n-type material were studied by capacitance-voltage measurements. A non-correspondence of atom and carrier concentrations was indicated, confirming previous four-point resistivity and Hall Effect studies. Using several specimens, a typical value of 25 was found from C⁻²-V and C-V curves for the atom/carrier ratio. The dielectric constant of InP was taken to be 11. The width of the depletion region at an intermediate voltage (0.5 V) was typically 0.03 μm. It was concluded that further work on contacting procedures to produce a good Schöttky Barrier at the contact-semiconductor interface should make this technique particularly useful for determining carrier profiles.     

Effect of p-μc-Si1−xOx:H layer on performance of hetero-junction microcrystalline silicon solar cells under light concentration

Preparation of p-type hydrogenated microcrystalline silicon oxide thin films (p-μc-Si_1−xO_x:H) by 13.56 MHz RF-PECVD method for use as a p-layer of hetero-junction μc-Si:H solar cells is presented. We investigated effects of wide-gap p-μc-Si_1−xO_x:H layer on the performance of hetero-junction μc-Si:H solar cells under various light intensity. We observed that a wide-gap p-μc-Si_1−xO_x:H was effective in improving the open-circuit voltage (V_oc) of the solar cells. We also confirmed that the V_oc logarithmically increased with increasing light intensity, and the enhancement of V_oc became larger with increasing band gap of p-layer. These results indicate that wide-gap p-μc-Si_1−xO_x:H is a promising material for use as window layer in hetero-junction μc-Si:H solar cells.     

Doped SiO x emitter layer in amorphous/crystalline silicon heterojunction solar cell

In this work we propose to replace the emitter layer of the n-type doped a-Si:H/p-type doped crystalline silicon heterojunction solar cell, with an n-type doped SiO _x amorphous oxide layer. The n-type doped SiO _x :H shows a lower activation energy and higher carrier mobility value with respect to the n-type doped a-Si:H. Moreover, higher transmission, below 500 nm of wavelength, and higher conductivity are measured. The relevance of transparency of the (n) a-SiO _x :H has been studied using that film in solar cells. The electrical parameters revealed a solar cell efficiency of 15.8 %. Moreover, the effect of TCO as a front side cell electrode is considered and discussed on the base of its workfunction when applied on top of the n-type doped SiO _x emitter layer using also numerical simulations.     

Subsurface localization of charge carriers in Si/SiO2/Si x Ge1 − x nanostructures

Analysis of the capacitance-voltage (C-V) characteristics reveals an elevated concentration of charge carriers under the surface of a silicon substrate due to the formation of elastically stressed regions induced in the substrate by Si _x Ge_{1 ? x} nanoislands grown on the preliminarily oxidized Si surface. The C-V characteristics exhibit charge density peaks at a depth from 700 to 1000 nm for Si/SiO₂/Si _x Ge_{1 ? x} structures with various thicknesses of the SiO₂ layer. The results of theoretical calculations of the electron density distribution in the bulk of the silicon substrate correspond on the whole to the C-V characteristics. The state of the interfaces in the structures with different thicknesses of the oxide layer, which determines the effects of surface and interfacial recombination as well as charge carrier scattering, is studied by analyzing the kinetics of decay of a photo-emf signal and the photo-emf distribution over the surface of the structure. The results can be used in the development of various devices based on SiGe with inclusions of oxide layers.     

Application of crystalline silicon surface oxidation to silicon heterojunction solar cells

We study the effect of ultra-thin oxide (SiO_x) layers inserted at the interfaces of silicon heterojunction (SHJ) solar cells on their open-circuit voltage (V_OC). The SiO_x layers can be easily formed by dipping c-Si into oxidant such as hydrogen peroxide (H₂O₂) and nitric acid (HNO₃). We confirm the prevention of the undesirable epitaxial growth of Si layers during the deposition of a-Si films by the insertion of the ultra-thin SiO_x layers. The formation of the SiO_x layers by H₂O₂ leads to better effective minority carrier lifetime (τ_eff) and V_OC than the case of using HNO₃. c-Si with the ultra-thin SiO_x layers formed by H₂O₂ dipping, prior to deposition of a-Si passivation layers, can have high implied V_OC of up to ∼0.714 V.     

Understanding of a-Si:H(p)/c-Si(n) heterojunction solar cell through analysis of cells with point-contacted p/n junction

We fabricated point-contacted a-Si:H(p)/c-Si(n) heterojunction solar cells using patterned SiO₂ and investigated their electrical properties using the light current–voltage (I–V) curve and Suns-V_oc measurements. The light I–V curves showed bias-dependent changes according to the applied voltage in the point-contacted cells, especially in the samples with a long distance between the point-contacted junctions. The Suns-V_oc measurements showed that the bias-dependence of the light I–V curves did not originate from the recombination in the SiO₂/Si or a-Si:H(p)/c-Si(n) interface, but from the series resistances. It is possible to explain the bias-dependent light I–V curve in terms of the conductivity of a-Si:H(p) and difference in the electrical contact properties between a-Si:H(p), ZnO and c-Si(n). These results mean that the electrical properties of the a-Si:H(p) layer and the contact properties with this layer are also critical to obtain a high J_sc and fill factor in n-type based Si heterojunction solar cells.     

The dependence of barrier height on temperature for Pd Schottky contacts on ZnO

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements have been performed on Pd/ZnO Schottky barrier diodes in the range 60-300 K. The room temperature values for the zero bias barrier height from the I-V measurements (Φ_I-V) was found to be 0.52 eV and from the C-V measurements (Φ_C-V) as 3.83 eV. From the temperature dependence of forward bias I-V, the barrier height was observed to increase with temperature, a trend that disagrees with the negative temperature coefficient for semiconductor material. The C-V barrier height decreases with temperature, a trend that is in agreement with the negative temperature coefficient of semiconductor material. This has enabled us to fit two curves in two regions (60-120 K and 140-300 K). We have attributed this behaviour to a defect observed by DLTS with energy level 0.31 eV below the conduction band and defect concentration of between 4×10¹⁶ and 6×10¹⁶ cm⁻³ that traps carriers, influencing the determination of the barrier height.     

Activation energy of hydrogen desorption from high-performance titanium oxide carrier-selective contacts with silicon oxide interlayers

The impact of hydrogen desorption on the electrical properties of TiO_x on crystalline silicon (c-Si) with SiO_y interlayers is studied for the development of high-performance TiO_x carrier-selective contacts. Compared with the TiO_x/c-Si heterocontacts, a lower surface recombination velocity of 9.6 cm/s and lower contact resistivity of 7.1 mΩ cm² are obtained by using SiO_y interlayers formed by mixture (often called SC2). The hydrogen desorption peaks arising from silicon dihydride (α1) and silicon monohydride (α2) on the c-Si surface of the as-deposited samples are observed. The α1 peak pressure of as-deposited heterocontacts with SiO_x interlayers is lower than that of heterocontacts without a SiO_y interlayer. Furthermore, the hydrogen desorption energies are found to be 1.76 and 2.13 eV for the TiO_x/c-Si and TiO_x/SC2-SiO_y/c-Si heterocontacts, respectively. Therefore, the excellent passivation of the TiO_x/SC2-SiO_y/c-Si heterocontacts is ascribed to the relatively high rupture energy of bonding between Si and H atoms.     

Electrical and photovoltaic characteristics of sodium copper chlorophyllin/n-type silicon heterojunctions

Heterojunctions of p-type sodium copper chlorophyllin (p-SCC)/n-type silicon (n-Si) were prepared by deposition of p-SCC film on n-Si wafers using spray-pyrolysis technique. Current-voltage and capacitance-voltage measurements of Au/p-SCC/n-Si/In heterojunctions were performed to discuss the electrical properties of these heterostructures. Rectifying characteristics were observed, which are definitely of the diode type. The current-voltage measurements suggest that the forward current in these junctions involves tunnelling and the results showed that the forward current can be explained by a multi-tunnelling capture-emission model in which the electron emission process dominates the carrier transport mechanism. On the other hand, the reverse current is probably limited by the same conduction process. The capacitance-voltage behavior indicates an abrupt heterojunction model is valid for Au/p-SCC/n-Si/In heterojunctions and the junction parameters such as, built-in potential, V_D, carrier concentration, N, the width of depletion layer, W, were obtained. The temperature and frequency dependence of the measured capacitance were also studied. The loaded I-V characteristics under white illumination provided by tungsten lamp (80 mW/cm²) give values of 400 mV, 0.9 mA, 0.38 and 1.7% for the open-circuit voltage, V_oc, the short-circuit current, I_sc, the fill factor, FF, and conversion efficiency, η, respectively.     

Effect of poly silicon thickness on the formation of Ni-FUSI gate by using atomic layer deposited nickel film

The effect of poly-Si thickness on silicidation of Ni film was investigated by using X-ray diffraction, auger electron spectroscopy, cross-sectional scanning transmission electron microscopy, resistivity, I–V, and C–V measurements. The poly-Si films with various thickness of 30–200 nm were deposited by LPCVD on thermally grown 50 nm thick SiO₂, followed by deposition of Ni film right after removing the native oxide. The Ni film was prepared by using atomic layer deposition with a N²-hydroxyhexafluoroisopropyl-N¹ (Bis-Ni) precursor. Rapid thermal process was then applied for a formation of fully silicide (FUSI) gate at temperature of 500 °C in N₂ ambient during 30 s. The resultant phase of Ni-silicide was strongly dependent on the thickness of poly-Si layer, continuously changing its phase from Ni-rich (Ni₃Si₂) to Si-rich (NiSi₂) with increasing the thickness of the poly-Si layer, which is believed to be responsible for the observed flat band voltage shift, ΔV_FB, in C–V curves.     

Fabrication and characterization of Fe-doped titania semiconductor electrodes with p-n homojunction devices

The nano-TiO₂ electrode with a p-n homojunction device was designed and fabricated by coating of the Fe³⁺-doped TiO₂ (p-type) film on top of the nano-TiO₂ (n-type) film. These films were prepared from synthesized sol-gel TiO₂ samples which were verified as anatase with nano-size particles. The semiconductor characteristics of the p-type and n-type films were demonstrated by current-voltage (I-V) measurements. Results show that the rectifying curves of undoped TiO₂ and Fe³⁺-doped TiO₂ sample films were observed from the I-V data illustration for both the n-type and p-type films. In addition, the shapes of the rectifying curves were influenced by the fabrication conditions of the sample films, such as the doping concentration of the metal ions, and thermal treatments. Moreover, the p-n homojunction films heating at different temperatures were produced and analyzed by the I-V measurements. From the I-V data analysis, the rectifying current of this p-n junction diode has a 10 mA order higher than the current of the n-type film. The p-n homojunction TiO₂ electrode demonstrated greater performance of electronic properties than the n-type TiO₂ electrode.     

Electrical and optical characterization of SiOxNy and SiO2 dielectric layers and rear surface passivation by using SiO2/SiOxNy stack layers with screen printed local Al-BSF for c-Si solar cells

In c-Si solar cells, surface recombination velocity increases as the wafer thickness decreases due to an increase in surface to volume ratio. For high efficiency, in addition to low surface recombination velocity at the rear side, a high internal reflection from the rear surface is also required. The SiO_xN_y film with low absorbance can act as rear surface reflector. In this study, industrially feasible SiO₂/SiO_xN_y stack for rear surface passivation and screen printed local aluminium back surface field were used in the cell structure. A 3 nm thick oxide layer has resulted in low fixed oxide charge density of 1.58 × 10¹¹ cm⁻² without parasitic shunting. The oxide layer capped with SiO_xN_y layer led to surface recombination velocity of 155 cm/s after firing. Using single layer (SiO₂) rear passivation, an efficiency of 18.13% has been obtained with V_oc of 625 mV, J_sc of 36.4 mA/cm² and fill factor of 78.7%. By using double layer (SiO₂/SiO_xN_y stack) passivation at the rear side, an efficiency of 18.59% has been achieved with V_oc of 632 mV, J_sc of 37.6 mA/cm², and fill factor of 78.3%. An improved cell performance was obtained with SiO₂/SiO_xN_y rear stack passivation and local BSF.     

Effect of rapid thermal oxidation on structure and photoelectronic properties of silicon oxide in monocrystalline silicon solar cells

This paper concerns the topic of surface passivation properties of rapid thermal oxidation on p-type monocrystalline silicon wafer for use in screen-printed silicon solar cells. It shows that inline thermal oxidation is a very promising alternative to the use of conventional batch type quartz tube furnaces for the surface passivation of industrial phosphorus-diffused emitters. Five minutes was the most favorable holding time for the rapid thermal oxidation growth of the solar cell sample, in which the average carrier lifetime was increased 19.4 μs. The Fourier transform infrared spectrum of the rapid thermal oxidation sample, whose structure was Al/Al-BSF/p-type Si/n-type SiP/SiO₂/SiN_x/Ag solar cell with an active area of 15.6 cm², contained an absorption peak at 1085 cm⁻¹, which was associated with the Si–O bonds in silicon oxide. The lowest average reflectance of this sample is 0.87%. Furthermore, for this sample, its average of internal quantum efficiency and conversion efficiency are respectively increased by 8% and 0.23%, compared with the sample without rapid thermal oxidation processing.     

PECVD硼掺杂微晶硅薄膜的压阻特性

研究了在硅片、柯伐合金和石英片等不同衬底材料上PECVD生长的微晶硅薄膜的压阻特性。测得以硅片和柯伐合金片作衬底样品的最大应变灵敏度因子(以下简称GF)分别为25和20,经激光退火后可达30。利用价带顶轻、重空穴带在应力作用下分裂模型和热电子发射理论推导了计算p型微晶、多晶硅薄膜GF的公式,可表示为GF对掺杂浓度、晶粒尺寸、晶界陷阱态密度以及薄膜织构的依赖关系,理论计算与实验结果较为符台。本文对微晶、多晶硅薄膜力敏器件的设计和制造将有重要的参考价值。 关键词：     

Trap-controlled behavior in ultrathin Lu2O3 high-k gate dielectrics

Amorphous Lu₂O₃ high-k gate dielectrics were grown directly on n-type (100) Si substrates by the pulsed laser deposition (PLD) technique. High-resolution transmission electron microscope (HRTEM) observation illustrated that the Lu₂O₃ film has amorphous structure and the interface with Si substrate is free from amorphous SiO₂. An equivalent oxide thickness (EOT) of 1.1 nm with a leakage current density of 2.6×10⁻⁵ A/cm² at 1 V accumulation bias was obtained for 4.5 nm thick Lu₂O₃ thin film deposited at room temperature followed by post-deposition anneal (PDA) at 600 °C in oxygen ambient. The effects of PDA process and light illumination were studied by capacitance-voltage (C-V) and current density-voltage (J-V) measurements. It was proposed that the net fixed charge density and leakage current density could be altered significantly depending on the post-annealing conditions and the capability of traps to trap and release charges.     

Effect of the oxidation process on SiO2/4H-SiC interface electrical characteristics

In this work we have compared the SiO₂/SiC interface electrical characteristics for three different oxidations processes (dry oxygen, water-containing oxygen and water-containing nitrogen atmospheres). MOS structures were fabricated on 8° off-axis 4H-SiC(0 0 0 1) n- and p-type epi-wafers. Electrical characteristics were obtained by I-V measurements, high-frequency capacitance-voltage (C-V) and ac conductance (G-ω) methods. Comparing the results, one observes remarkable differences between samples which underwent different oxidation routes. Among the MOS structures analyzed, the sample which underwent wet oxidation with oxygen as carrier gas presented the higher dielectric strength and lower values of interface states density.     

C-V studies on metal-ferroelectric bismuth vanadate (Bi2VO5.5)-semiconductor structure

Ferroelectric bismuth vanadate Bi₂VO_5.5 (BVO) thin films have been successfully grown on p-type Si(100) substrate by using chemical solution decomposition (CSD) technique followed by rapid thermal annealing (RTA). The crystalline nature of the films has been studied by X-ray diffraction (XRD). Atomic force microscopy (AFM) was used to study the microstructure of the films. The dielectric properties of the films were studied. The capacitance-voltage characteristics have been studied in metal-ferroelectric-insulator-semiconductor (MFIS) configuration. The dielectric constant of BVO thin films formed on Si(100) is about 146 measured at a frequency of 100 kHz at room temperature. The capacitance-voltage plot of a Bi₂VO_5.5 MFIS capacitor subjected to a dc polarizing voltages shows a memory window of 1.42 V during a sweep of ±5 V gate bias. The flatband voltage (V_f) shifts towards the positive direction rather than negative direction. This leads to the asymmetric behavior of the C-V curve and decrease in memory window. The oxide trap density at a ramp rate of 0.2 V/s was estimated to be as high as 1.45×10¹² cm⁻².     

Pure and Nb-doped TiO1.5 films grown by pulsed-laser deposition for transparent p-n homojunctions

Pure and Nb-doped titanium oxide thin films were grown on sapphire substrates by pulsed-laser deposition in vacuum (10⁻⁷ mbar). The PLD growth leads to titanium oxide thin films displaying a high oxygen deficiency (TiO_1.5) compared with the stoichiometric TiO₂ compound. The structural and electrical properties (phase, crystalline orientation, nature and concentration of charge carriers, etc.) of these titanium oxide films were studied by XRD measurements and Hall effect experiments, respectively. The undoped TiO_1.5 phase displayed a p-type semiconductivity. Doping this titanium oxide phase with Nb⁵⁺ leads to an n-type behaviour as is generally observed for titanium oxide films with oxygen deficiency (TiO_x with 1.7 < x < 2). Multilayer homojunctions were obtained by the stacking of TiO_1.5 (p-type) and Nb-TiO_1.5 (n-type) thin films deposited onto sapphire substrates. Each layer is 75 nm thick and the resulting heterostructure shows a good transparency in the visible range. Finally, the I-V curves obtained for such systems exhibit a rectifying response and demonstrate that it is possible to fabricate p-n homojunctions based only on transparent conductive oxide thin films and on a single chemical compound (TiO_x).     

The interface reaction of high-k La2Hf2O7/Si thin film grown by pulsed laser deposition

The La₂Hf₂O₇ films have been deposited on Si (1 0 0) substrate by using pulsed laser deposition (PLD) method. X-ray diffraction (XRD) demonstrates that the as-grown film is amorphous and crystallizes after 1000 °C annealing. The interface structure is systematically studied by Synchrotron X-ray reflectivity (XRR), Fourier transform infrared (FTIR) and X-ray photoelectron spectroscopy (XPS). Silicide, silicate and SiO_x formations from interfacial reaction are observed on the surface of the Si substrate in the as-grown film. The impact of silicide formation on the electrical properties is revealed by capacitance-voltage (C-V) measurements. By post-deposition annealing (PDA), silicide can be effectively eliminated and C-V property is obviously improved.