Analysis of charge injection processes including ESD in MEMS

The effect of charge injection due to human body model (HBM) electrostatic discharge (ESD), charged device model (CDM) ESD and triboelectrification in capacitive microelectromechanical systems' (MEMS) structures is analyzed. The results show that as feature size is reduced, the effect remains constant for charging by triboelectrification. However, HBM ESD injected charge produces a change which is inversely proportional to the square of the gap separation and CDM ESD injected charge produces a change which is inversely proportional to the square of the plate area.     

ESD qualification data used as the basis for building electrostatic discharge protected areas

ESD control programs that are based on the standards IEC61340-5-1 and ANSI/ESD S20.20 are targeted to provide safer handling of electronic parts now susceptible to damage by electrostatic discharge. However, ESD failures have occurred in EPA even when all standard control methods are met. To further improve EPAs, ESD control programs should be updated to cover all known common discharge scenarios, and multiple parallel ESD source parameters should be used to assess the level of ESD risks. In addition, a reliable ESD risk assessment should be based on discharge source circuit analysis and product sensitivity tests using the real discharge waveforms found in EPA.     

Assessment of ESD threats to electronic components

Electrostatic discharge (ESD) is a major source of failures in electronic devices and products detected during manufacturing. Reduction of semiconductor element dimensions as well as implementation of new product and production technologies have made many devices extremely vulnerable to disturbances of electrostatic origin. Effective ESD damage prevention requires that ESD threats are carefully assessed and understood. This paper reviews new research results on electrostatic discharges as well as tools for the assessment of ESD threats to electronic components. Influences of the new results on the ESD control are discussed. There is a need to modify existing standards for the ESD control in electronics industry in order to meet challenges related to the manufacturing of future electronic products.     

典型静电放电火花点燃能力测试研究

通过对静电放电火花点火过程的物理特征研究，分析与总结了典型静电放电火花的点燃能力．根据放电火花的产生条件和形状特点，静电放电火花分为电晕放电、刷形放电、料仓堆表面放电、人体放电、火花放电和传播型尉形放电6种典型放电类型．根据静电放电火花的火花空间分布范围和火花持续时间，研究了静电放电火花点燃可燃物的能力．典型静电放电火花的实际点火能量为：电晕放电不大于0．025mJ，刷形放电不大于3mJ，料仓堆表面放电不大于10mJ．人体放电不大于30mJ，火花放电不大于1J，传播型刷形放电不大于10J．     

ESD currents induced in a charged human body approaching a vehicle

The finite-difference time-domain (FDTD) method is used to calculate electrostatic discharge (ESD) currents induced in a charged human body approaching a vehicle. Maximum current densities induced in the human body are much higher than the threshold current density of 1 μA/cm² for the steady-state current flow cases, which may cause biological effects. It is found that the ESD current induced in the heart is smaller than the threshold current required to produce ventricular fibrillation in humans. The specific absorption (SA) induced in the human body is considerably smaller than the value of 28.8 J/kg regulated by the ANSI.     

Measurements of air discharges from insulating,electrostatic dissipative and conductive materials with different ESD probes

In this work, we have compared the performance of three different kinds of passive resistor-transmission line ESD probes: an unshielded ball probe, a shielded ball probe with the ESD current collected on a coaxial wire tip, and a needle-like probe. We have measured discharges from ESD sources having different surface resistivities including charged insulator surfaces, electrostatic dissipative materials and metal plates. In compliance with the results, there is no single probe type that is ideal for all kinds of situations—there are significant differences between the probe responses comprising sensitivity, charge transferred and peak ESD current. As expected, the initiation of air discharges was suppressed in accordance with increasing surface resistivity of the ESD source.     

Evaluation of ESD hardness of fingerprint sensor LSIs

We evaluated the electrostatic discharge (ESD) hardness of capacitive fingerprint sensor large scaled integrated circuits (LSIs) with two kinds of ESD test methods.We used three kinds of fingerprint sensor LSIs, i.e., a conventional planar sensor LSI, a sensor LSI with a grounded wall (GND wall) structure where each sensor plate was surrounded by a lattice-like wall, and a sensor where some of the sensor plates had been replaced with GNDs. In human body model (HBM)-based contact discharge tests, the sensor LSI with the GND wall structure and the one with the GNDs demonstrated a high ESD hardness compared with the planar sensor LSI. An air discharge test was also carried out in accordance with IEC61000-4-2 specifications because other ESD tests cannot be used to estimate over ±8 kV. The ESD hardness of the GND wall structure was ±20 kV, whereas that of the other sensor with the GND structure was below ±12 kV. It was evident from our findings that the ESD hardness of sensor LSIs obviously depends on the number of GNDs in the sensor region, their arrangement, and the GND structure, and that the sensor LSI with the GND wall had the highest ESD hardness.     

Multichannel measurement of ESD

The multichannel system for recording ESD was used to simultaneous recording of discharge to electrodes in the laboratory model of a silo within a pneumatic transportation system. The investigation method of ESD parameters in the continuous stationary processes has been elaborated. The applied algorithm determines the probability of ignition initiation on the basis of measurements of charges transferred in pulses and time intervals between the pulses. The results of the investigation in a silo have been presented.     

A mathematical expression for air ESD current waveform using BP neural network

A curve-fitting method based on backpropagation (BP) neural network (NN) is proposed for fitting electrostatic discharge (ESD) current waveforms and giving the corresponding expressions in order to analyze the characteristics of ESD and calculate the ESD electromagnetic pulse radiation field. According to IEC61000-4-2, this method is used to fit the ideal contact current waveform of human-metal ESD to obtain the mathematical expression. The waveform parameters of the fitting curve meet the requirements of the IEC61000-4-2. By fitting the measured air ESD current waveform at 4 kV discharge, the mathematical expression is obtained. This paper proposes the mathematical expression for arbitrary curves and analyzes the factors affecting the effects of curve-fitting.     

静电放电电磁脉冲的实验研究

 利用单极子天线对静电放电产生的电磁脉冲进行了实验研究。测量表明, 静电放电电磁脉冲辐射场为脉冲持续时间百纳秒的窄脉冲,但在距离放电源几米以内,其场强很大,典型值可达千伏每米量级, 其频谱主要分布在几十到几百兆赫,典型的频谱上限值可以达到几个吉赫。     

Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry

Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips.     

Soft ESD phenomena in GMR heads in the HDD manufacturing process

GMR (giant magnetoresistive) heads used for HDD (hard disk drives) are very sensitive to ESD (electrostatic discharge). Some kinds of ESD damages will cause soft magnetic degradations of head performance with a progressive nature. We report examples of head degradations by ESD damages as well as other damages due to head scratches, electro-migration effects and corrosion of GMR stack. It is usually very difficult to distinguish these phenomena explicitly by QST (quasistatic tester) and spinstand measurement test. We show that head scratches can cause damages similar to damages caused by ESD and that re-magnetization has certain potential to correct the damaged magnetic structure caused by such scratches.     

Risks of damage to electronics with reference to charged clothing

Risks of damage to electronic devices with reference to charged clothing have been identified and quantified. The key parameters to control, in order to minimise the device failures due to electrostatic discharge (ESD), are peak ESD current and charge transfer in a direct discharge and device charging by induction and rubbing. An extensive experimental program was carried out to gain experience on threshold levels of these parameters. Use of ESD protective garments over normal clothes of operators is highly recommended in order to minimise ESD failures of devices. The ESD protective garments must be properly used and designed, otherwise they themselves form an ESD risk to electronics.     

ESD protection for the tolerant I/O circuits using PESD implantation

In this paper, we propose an electrostatic discharge (ESD) solution with cascode structure for deep-submicron integrated circuits technology to enhance its ESD robustness. Using the added boron implantation (we call “PESD” implantation here) at the drain side of the stacked n-type metal-oxide semiconductor (NMOS), the long-base parasitic NPN (i.e., emitter, base and collector in the bipolar transistor are n-type, p-type, and n-type, respectively) bipolar transistor in the cascode NMOS structure can be easily triggered by the Zener breakdown mechanism at the drain side under ESD stress conditions. Based on UMC 0.25 μm process, this method provides a significant improvement in the cascode ESD performance.     

Low capacitance ESD protection circuits for GaAs RF ICs

We present a novel electrostatic discharge (ESD) protection circuit for GaAs radio frequency (RF) integrated circuits (ICs), which are targeted for 10 Gb/s fiber-optic communication applications. The robustness, parasitic impedance, and loading effect of the new ESD protection circuit are studied and compared with the conventional diode-based ESD protection technique. Two versions of this type of ESD protection circuit were fabricated with a 60-GHz InGaP heterojunction bipolar transistor (HBT) technology. These two circuits can withstand, respectively, 2700 and 5000 V human body model (HBM) ESD stress and provide a similar level of ESD protection to RF ICs. The corresponding impedances of the off state are represented by an equivalent shunt capacitance and shunt resistance of 0.22 pF and 500 Ω, and 0.5 pF and 250 Ω, at 10 GHz. This ESD protection circuit can protect the 10 Gb/s RF ICs against much higher level ESD stress than conventional diode-based ESD protection circuits even with smaller size.     

Enhanced ESD properties of GaN-based light-emitting diodes with various MOS capacitor designs

High electrostatic discharge (ESD) protection of GaN-based light-emitting diodes (LEDs) has been developed using a metal–oxide semiconductor (MOS) capacitor. This structure is realized by adopting various metal electrode patterns. The MOS capacitor can be implemented by extending the metal line directly from the p-type electrode to the top surface of an SiO₂-capped n-GaN layer near the vicinity of the n-type electrode. By connecting a MOS capacitor in parallel with the GaN-based LED, the negative ESD strike could be significantly increased from 385 to 1075 V of human body mode (HBM).     

源、漏到栅距离对次亚微米ggNMOS ESD保护电路鲁棒性的影响

基于对静电放电(electrostatic discharge,ESD)应力下高电压、大电流特性的研究,本文通过优化晶格自加热漂移-扩散模型和热力学模型,并应用优化模型建立了全新的0.6 μm CSMC 6S06DPDM-CT02 CMOS工艺下栅接地NMOS (gate grounded NMOS,ggNMOS)ESD保护电路3D模型,对所建模型中漏接触孔到栅距离(drain contact to gate spacing,DCGS)与源接触孔到栅距离(source contact to gate sp 关键词： 栅接地NMOS 静电放电 漏接触孔到栅的距离 源接触孔到栅的距离     

High efficiency and enhanced ESD properties of UV LEDs by inserting p-GaN/p-AlGaN superlattice

Significantly improved electrostatic discharge(ESD)properties of InGaN/GaN-based UV light-emitting diode(LED)with inserting p-GaN/p-AlGaN superlattice(p-SLs)layers(instead of p-AlGaN single layer)between multiple quantum wells and Mg-doped GaN layer are reported.The pass yield of the LEDs increased from 73.53%to 93.81%under negative 2000 V ESD pulses.In addition,the light output power(LOP)and efficiency droop at high injection current were also improved.The mechanism of the enhanced ESD properties was then investigated.After excluding the effect of capacitance modulation,high-resolution X-ray diffraction(XRD)and atomic force microscope(AFM)measurements demonstrated that the dominant mechanism of the enhanced ESD properties is the material quality improved by p-SLs,which indicated less leakage paths,rather than the current spreading improved by p-SLs.     

An improved GGNMOS triggered SCR for high holding voltage ESD protection applications

Developing an electrostatic discharge(ESD) protection device with a better latch-up immunity has been a challenging issue for the nanometer complementary metal-oxide semiconductor(CMOS) technology. In this work, an improved grounded-gate N-channel metal-oxide semiconductor(GGNMOS) transistor triggered silicon-controlled rectifier(SCR)structure, named GGSCR, is proposed for high holding voltage ESD protection applications. The GGSCR demonstrates a double snapback behavior as a result of progressive trigger-on of the GGNMOS and SCR. The double snapback makes the holding voltage increase from 3.43 V to 6.25 V as compared with the conventional low-voltage SCR. The TCAD simulations are carried out to verify the modes of operation of the device.     

Effects of ESD transients on noise in tunneling recording heads

Noise power spectral density (PSD) and transfer curves (resistance versus applied magnetic field) are collected and compared on two groups of tunneling magnetoresistive (TuMR) sensors. The first group was comprised of TuMR sensors that were normal, undamaged TuMR sensors. The second group included TuMR sensors that had been damaged by electrostatic discharge (ESD) transients while handling in the lab. Representative TuMR sensors from the second, ESD damaged group were observed to have abrupt shifts in the ferromagnetic resonance (FMR) peak position and shape with applied magnetic field when compared to similar data for undamaged TuMR sensors. These abrupt shifts in FMR peaks occur at applied magnetic fields that correspond to fields at which discontinuities in quasi-static transfer curves are observed.