锗硅异质结晶体管单粒子效应激光微束模拟

对国产锗硅异质结双极晶体管(SiGe HBT)进行了单粒子效应激光微束辐照试验,观测SiGe HBT单粒子效应的敏感区域,测试不同外加电压和不同激光能量下SiGe HBT集电极瞬变电流和电荷收集情况,并结合器件结构对试验结果进行分析。试验结果表明:国产SiGe HBT位于集电极/衬底结内的区域对单粒子效应敏感,波长为1064 nm的激光在能量约为1.5 nJ时诱发SiGe HBT单粒子效应,引起电流瞬变。入射激光能量增强,电流脉冲增大,电荷收集量增加;外加电压增大,电流脉冲的波峰增大;SiGe HBT的单粒子效应与外加电压大小和入射激光能量都相关,电压主要影响瞬变电流的峰值,而电荷收集量主要依赖于入射激光能量。     

纳米体硅鳍形场效应晶体管单粒子瞬态中的源漏导通现象

体硅鳍形场效应晶体管(FinFET)是晶体管尺寸缩小到30 nm以下应用最多的结构,其单粒子瞬态产生机理值得关注.利用脉冲激光单粒子效应模拟平台开展了栅长为30, 40, 60, 100 nm Fin FET器件的单粒子瞬态实验,研究FinFET器件单粒子瞬态电流脉冲波形随栅长变化情况;利用计算机辅助设计(technology computer-aided design, TCAD)软件仿真比较电流脉冲产生过程中器件内部电子浓度和电势变化,研究漏电流脉冲波形产生的物理机理.研究表明,不同栅长Fin FET器件瞬态电流脉冲尾部都存在明显的平台区,且平台区电流值随着栅长变短而增大;入射激光在器件沟道区下方体区产生高浓度电子将源漏导通产生导通电流,而源漏导通升高了体区电势,抑制体区高浓度电子扩散,使得导通状态维持时间长,形成平台区电流;尾部平台区由于持续时间长,收集电荷量大,会严重影响器件工作状态和性能.研究结论为纳米Fin FET器件抗辐射加固提供理论支撑.     

选择性埋氧层上硅器件的单粒子瞬态响应的温度相关性

本文建立了90 nm工艺下的绝缘体上硅浮体器件和选择性埋氧层上硅器件模型,通过器件电路混合仿真探究了工作温度对上述两种结构的多级反相器链单粒子瞬态脉冲宽度以及器件内部电荷收集过程的影响.研究表明, N型选择性埋氧层上硅器件相较于浮体器件具有更好的抗单粒子能力,但P型选择性埋氧层上硅器件的抗单粒子能力在高线性能量转移值下与浮体器件基本相同.同时电荷收集的温度相关性分析表明,N型选择性埋氧层上硅器件只存在漂移扩散过程,当温度升高时其电荷收集量变化很小,而N型浮体器件存在双极放大过程,电荷收集量随着温度的升高而显著增加;另外, P型选择性埋氧层上硅器件和浮体器件均存在双极放大过程,当温度升高时P型选择性埋氧层上硅器件衬底中的双极放大过程越来越严重,由于局部埋氧层的存在,反而抑制了其源极的双极放大过程,导致它的电荷收集量要明显少于P型浮体器件.因此选择性埋氧层上硅器件比浮体器件更好地抑制了温度对单粒子瞬态脉冲的影响.     

单电子晶体管电流解析模型及数值分析

本文首先建立单电子晶体管的电流解析模型, 然后将蒙特卡罗法与主方程法结合进行数值分析, 研究了栅极偏压、漏极偏压、温度与隧道结电阻等参数对器件特性的影响. 结果表明: 对于对称结, 库仑台阶随栅极偏压增大而漂移; 漏极电压增大, 库仑振荡振幅增强, 库仑阻塞则衰减; 温度升高将导致库仑台阶和库仑振荡现象消失. 对于非对称结, 源漏隧道结电阻比率增大, 库仑阻塞现象越明显. 关键词： 单电子晶体管 解析模型 蒙特卡罗法 主方程法     

三维H形栅SOINMOS器件总剂量条件下的单粒子效应

本文通过数值模拟研究了H形栅SOI NMOS器件在总剂量条件下的单粒子效应. 首先通过分析仿真程序中影响迁移率的物理模型, 发现通过修改了的由于表面散射造成迁移率退化的Lombardi模型, 仿真的SOI晶体管转移特性和实测数据非常符合. 然后使用该模型, 仿真研究了处于截止态 (V_D=5V) 的 H形栅SOI NMOS器件在总剂量条件下的单粒子效应. 结果表明: 随着总剂量水平的增加, 器件在同等条件的重离子注入下, 产生的最大漏极电流脉冲只是稍有增大, 但是漏极收集电荷随总剂量水平大幅增加. 关键词： 单粒子脉冲电流 漏极收集电荷 总剂量效应     

不同偏置影响锗硅异质结双极晶体管单粒子效应的三维数值仿真研究

针对国产锗硅异质结双极晶体管(SiGe HBT),采用半导体器件三维计算机模拟工具,建立单粒子效应三维损伤模型,研究不同偏置状态对SiGe HBT单粒子效应的影响.分析比较不同偏置下重离子入射器件后,各端口电流瞬变峰值和电荷收集量随时间的变化关系,获得SiGe HBT单粒子效应与偏置的响应关系.结果表明:不同端口对单粒子效应响应的最劣偏置不同,同一端口电荷收集量和瞬变电流峰值的最劣偏置也有所差异.载流子输运方式变化和外加电场影响是造成这种现象的主要原因.     

0.18 μm部分耗尽绝缘体上硅互补金属氧化物半导体电路单粒子瞬态特性研究

利用脉冲激光入射技术研究100级0.18 μm部分耗尽绝缘体上硅互补金属氧化物半导体反相器链的单粒子瞬态效应, 分析了激光入射器件类型及入射位置对单粒子瞬态脉冲传输特性的影响. 实验结果表明, 单粒子瞬态脉冲在反相器链中的传输与激光入射位置有关, 当激光入射第100级到第2级的n型金属-氧化物-半导体器件, 得到的脉冲宽度从287.4 ps增加到427.5 ps; 当激光入射第99级到第1级的p型金属-氧化物-半导体器件, 得到的脉冲宽度从150.5 ps增加到295.9 ps. 激光入射点靠近输出则得到的瞬态波形窄; 靠近输入则得到的瞬态波形较宽, 单粒子瞬态脉冲随着反相器链的传输而展宽. 入射器件的类型对单粒子瞬态脉冲展宽无影响. 通过理论分析得到, 部分耗尽绝缘体上硅器件浮体效应导致的阈值电压迟滞是反相器链单粒子瞬态脉冲展宽的主要原因. 而示波器观察到的与预期结果幅值相反的正输出脉冲, 是输出节点电容充放电的结果.     

p型金属氧化物半导体场效应晶体管界面态的积累对单粒子电荷共享收集的影响

由于负偏置温度不稳定性和热载流子注入,p型金属氧化物半导体场效应晶体管(pMOSFET)将在工作中不断退化,而其SiO₂/Si界面处界面态的积累是导致其退化的主要原因之一. 采用三维器件数值模拟方法,基于130 nm体硅工艺,研究了界面态的积累对相邻pMOSFET之间单粒子电荷共享收集的影响. 研究发现,随着pMOSFET SiO₂/Si界面处界面态的积累,相邻pMOSFET漏端的单粒子电荷共享收集量均减少. 还研究了界面态的积累对相邻反相器中单粒子电荷共享收集 关键词： 负偏置温度不稳定性 电荷共享收集 双极放大效应 单粒子多瞬态     

超低泄漏电流二极管单粒子位移损伤电流计算

提出了一种计算超低泄漏电流硅二极管的单粒子位移损伤电流的方法。采用SRIM软件计算了252Cf源的裂变碎片入射二极管产生的初级撞出原子的分布, 并采用Shockley-Read-Hall复合理论探讨了单粒子位移损伤电流值与缺陷参数的关系, 计算了252Cf源辐照引起的单粒子位移损伤电流台阶值, 计算结果与实验结果一致。针对耗尽区电场非均匀的特点, 提出电场分层近似方法来考虑处于耗尽区中不同位置的初级撞出原子产生的缺陷对泄漏电流的影响。结果表明, PN结附近电场增强载流子产生效应最显著, 考虑电场增强效应的情况下单个Frenkel缺陷引起的泄漏电流比未考虑电场增强效应时高约44倍;裂变碎片80 MeV Nd入射比106 MeV Cd入射引起的单粒子位移损伤电流大;252Cf源的裂变碎片在二极管中引起的单粒子位移损伤电流台阶值主要集中于1 fA至1 pA之间。     

富硅氮化硅／c—Si异质结中的电流输运机理研究

采用对靶磁控溅射方法在P型晶体硅（c—Si）衬底上沉积n型富硅氮化硅（SiNx）薄膜,形成了富硅SiNx／c—Si异质结．异质结器件呈现出较高的整流比,在室温下当V=4-2V时为1．3×10^3．在正向偏压下温度依赖的J—V特性曲线可以分为三个明显不同的区域．在低偏压区载流子的输运满足欧姆传输机理,在中间偏压区的电流是由载流子的隧穿过程和复合过程共同决定的,在较高偏压区的电输运以具有指数陷阱分布的空间电荷限制电流（SCLC）传输机理为主．     

Parasitic bipolar amplification in single event transient and its temperature dependence

Using three-dimensional technology computer-aided design (TCAD) simulation, parasitic bipolar amplification in single event transient (SET) current of single transistor and its temperature dependence are studied. We quantify the contributions of different current components in SET current pulse, and it is found that the proportion of parasitic bipolar amplification in total collected charge is about 30% in both 130-nm and 90-nm technologies. The temperature dependence of parasitic bipolar amplification and the mechanism of SET pulse are also investigated and quantified. The results show that the proportion of charge induced by parasitic bipolar increases with rising temperature, which illustrates that the parasitic bipolar amplification plays an important role in the charge collection of single transistor.     

Parasitic bipolar amplification in a single event transient and its temperature dependence

Using three-dimensional technology computer-aided design (TCAD) simulation, parasitic bipolar amplification in a single event transient (SET) current of a single transistor and its temperature dependence are studied. We quantify the contributions of different current components in a SET current pulse, and it is found that the proportion of parasitic bipolar amplification in total collected charge is about 30% in both 130-nm and 90-nm technologies. The temperature dependence of parasitic bipolar amplification and the mechanism of the SET pulse are also investigated and quantified. The results show that the proportion of charge induced by parasitic bipolar increases with rising temperature, which illustrates that the parasitic bipolar amplification plays an important role in the charge collection of a single transistor.     

New insight into the parasitic bipolar amplification effect in single event transient production

In this paper, a new method is proposed to study the mechanism of charge collection in single event transient (SET) production in 90 nm bulk complementary metal oxide semiconductor (CMOS) technology. We find that different from the case in the pMOSFET, the parasitic bipolar amplification effect (bipolar effect) in the balanced inverter does not exist in the nMOSFET after the ion striking. The influence of the substrate process on the bipolar effect is also studied in the pMOSFET. We find that the bipolar effect can be effectively mitigated by a buried deep P⁺-well layer and can be removed by a buried SO₂ layer.     

Temperature dependence of single event transient in 90-nm CMOS dual-well and triple-well NMOSFETs

This paper investigates the temperature dependence of single event transient (SET) in 90-nm complementary metat-oxide semiconductor (CMOS) dual-well and triple-well negative metal-oxide semiconductor field-effect transistors (NMOSFETs). Technology computer-aided design (TCAD) three-dimensional (3D) simulations show that the drain current pulse duration increases from 85 ps to 245 ps for triple-well but only increases from 65 ps to 98 ps for dual-well when the temperature increases from -55℃ to 125℃, which is closely correlated with the source of NMOSFETs. This reveals that the pulse width increases with temperature in dual-well due to the weakening of anti-amplification bipolar effect while increases with temperature in triple-well due to the enhancement of the bipolar amplification.     

Temperature dependence of the P-hit single event transient pulse width in a three-transistor inverter chain

A comparison of the temperature dependence of the P-hit single event transient (SET) in a two-transistor (2T) inverter with that in a three-transistor (3T) inverter is carried out based on a three-dimensional numerical simulation. Due to the significantly distinct mechanisms of the single event change collection in the 2T and the 3T inverters, the temperature plays different roles in the SET production and propagation. The SET pulse will be significantly broadened in the 2T inverter chain while will be compressed in the 3T inverter chain as temperature increases. The investigation provides a new insight into the SET mitigation under the extreme environment, where both the high temperature and the single event effects should be considered. The 3T inverter layout structure (or similar layout structures) will be a better solution for spaceborne integrated circuit design for extreme environments.     

Fin width and height dependence of bipolar amplification in bulk FinFETs submitted to heavy ion irradiation

Fin FET technologies are becoming the mainstream process as technology scales down. Based on a 28-nm bulk pFin FET device, we have investigated the fin width and height dependence of bipolar amplification for heavy-ion-irradiated Fin FETs by 3D TCAD numerical simulation. Simulation results show that due to a well bipolar conduction mechanism rather than a channel(fin) conduction path, the transistors with narrower fins exhibit a diminished bipolar amplification effect, while the fin height presents a trivial effect on the bipolar amplification and charge collection. The results also indicate that the single event transient(SET) pulse width can be mitigated about 35% at least by optimizing the ratio of fin width and height, which can provide guidance for radiation-hardened applications in bulk Fin FET technology.     

The modulation effect of substrate doping on multi-node charge collection and single-event transient propagation in 90-nm bulk complementary metal-oxide semiconductor technology

Variation of substrate background doping will affect the charge collection of active and passive MOSFETs in complementary metal-oxide semiconductor (CMOS) technologies, which are significant for charge sharing, thus affecting the propagated single event transient pulsewidths in circuits. The trends of charge collected by the drain of a positive channel metal-oxide semiconductor (PMOS) and an N metal-oxide semiconductor (NMOS) are opposite as the substrate doping increases. The PMOS source will inject carriers after strike and the amount of charge injected will increase as the substrate doping increases, whereas the source of the NMOS will mainly collect carriers and the source of the NMOS can also inject electrons when the substrate doping is light enough. Additionally, it indicates that substrate doping mainly affects the bipolar amplification component of a single-event transient current, and has little effect on the drift and diffusion. The change in substrate doping has a much greater effect on PMOS than on NMOS.     

The dual role of multiple-transistor charge sharing collection in single-event transients

As technologies scale down in size, multiple-transistors being affected by a single ion has become a universal phenomenon, and some new effects are present in single event transients (SETs) due to the charge sharing collection of the adjacent multiple-transistors. In this paper, not only the off-state p-channel metal-oxide semiconductor field-effect transistor (PMOS FET), but also the on-state PMOS is struck by a heavy-ion in the two-transistor inverter chain, due to the charge sharing collection and the electrical interaction. The SET induced by striking the off-state PMOS is efficiently mitigated by the pulse quenching effect, but the SET induced by striking the on-state PMOS becomes dominant. It is indicated in this study that in the advanced technologies, the SET will no longer just be induced by an ion striking the off-state transistor, and the SET sensitive region will no longer just surround the off-state transistor either, as it is in the older technologies. We also discuss this issue in a three-transistor inverter in depth, and the study illustrates that the three-transistor inverter is still a better replacement for spaceborne integrated circuit design in advanced technologies.