界面态电荷对n沟6H-SiC MOSFET场效应迁移率的影响

针对界面态密度在禁带中的不均匀分布，分析了界面态电荷对n沟6H碳化硅MOSFET场效应迁移率的影响.分析结果显示，界面态电荷使n沟碳化硅器件的场效应迁移率明显降低.并给出了实验测定的场效应迁移率和反型层载流子迁移率的比值与界面态密度之间关系. 关键词： 碳化硅 界面态 反型层迁移率 场效应迁移率     

1200 V碳化硅功率MOSFET低温特性的实验表征及分析

碳化硅功率MOSFET是宽禁带功率半导体器件的典型代表,具有优异的电气性能。基于低温环境下的应用需求,研究了1200 V碳化硅功率MOSFET在77.7 K至300 K温区的静/动态特性,定性分析了温度对碳化硅功率MOSFET性能的影响。实验结果显示,温度从300 K降低至77.7 K时,阈值电压上升177.24%,漏-源极击穿电压降低32.99%,栅极泄漏电流降低82.51%,导通电阻升高1142.28%,零栅压漏电流降低89.84%(300 K至125 K)。双脉冲测试显示,开通时间增大8.59%,关断时间降低16.86%,开关损耗增加48%。分析发现,碳化硅功率MOSFET较高的界面态密度和较差的沟道迁移率,是导致其在低温下性能劣化的主要原因。     

石墨烯/碳化硅异质界面热学特性的分子动力学模拟

为了调控石墨烯/碳化硅异质界面传热特性,采用非平衡态分子动力学方法研究温度、尺寸、材料缺陷率对界面热导的影响,通过声子态密度和声子参与率对界面热导变化的原因进行阐述分析.研究表明:两种界面作用力下界面热导均随温度升高而增大,但共价键的异质界面热导要高于范德瓦耳斯作用力下的界面热导.异质界面的界面热导随着碳化硅层数的增加而降低,当层数从10层增加到20层时,界面热导下降30.5%;4层时异质结构界面热导最低,分析认为中低频段更多的声子从局域进入离域模式.空位缺陷的引入可以有效地提高界面热导,随着碳化硅和石墨烯缺陷率的增加,界面热导均先升高再降低.300 K时当碳化硅和石墨烯缺陷率分别为20%和35%时界面热导达到最大值,分析认为缺陷的引入会阻碍中频声子的热输运.研究结果揭示可以通过尺寸效应和空位缺陷来进行异质界面的改性研究,有利于第三代半导体微纳器件的设计和热管理.     

低剂量率60Coγ辐线辐照下SOIMOS器件的退化机理

本文通过实验分析了O．8μm工艺H形栅SOIMOS器件在低剂量率下的1射线总剂量效应．实验结果表明,总剂量相同时,低剂量率的辐照效应更严重,关态偏置条件下的阈值电压漂移大于开态,辐照引起NMOS器件发生kink效应时的漏极电压％升高．研究结果表明：界面态对PMOS器件亚阈值斜率和跨导退化的影响作用不同,主要原因是栅极偏置不同使起作用的界面态数量不同．     

低温低剂量率下金属-氧化物-半导体器件的辐照效应

对金属氧化物半导体(MOS)器件在低剂量率γ射线辐照条件下的剂量率效应以及温度效应进行了研究.对不同剂量率、不同温度辐照后MOS器件的阈值电压漂移进行了比较.结果表明,低剂量率辐照下,感生界面态要受到辐照时间的长短以及生成的氢离子数目的影响,辐照时间越长,生成的氢离子越多,感生界面态密度越大;温度对界面态的影响与界面态建立的时间有关,低温辐照时,界面态建立的时间要加长 关键词： 辐照效应 阈值电压漂移 低剂量率 低温 界面态     

0.25-μm PMOSFETs中热载流子的退化特性和解释

本文研究了深亚微米PMOSFETs的热载流子效应。研究发现热载流子效应包括界面态的产生和氧化层中固定正电荷的形成。通过实验证明了深亚微米PMOSFETs中这两种机制的重要性。首先，氧化层固定正电荷的产生在深亚微米PMOSFETs中起作用，使得器件的阈值电压退化，最终限制了表面沟道晶体管的使用寿命。对于先进的模拟和混合信号的应用，工艺和器件的可靠性必须按照阈值电压的漂移重新定义，而不仅仅依照跨导的退化或者栅氧化层的寿命来定义。其次，空穴注入产生的界面态也影响器件的特性。推断了热载流子效应的形成过程。     

AlGaN/GaN槽栅HEMT模拟与实验研究

分析了栅槽深度对AlGaN/GaN HEMT特性的影响,并对不同栅槽深度的器件特性进行了模拟,得到了器件饱和电流、最大跨导和阈值电压随栅槽深度的变化规律.当槽栅深度增大,器件饱和电流逐渐下降,而最大跨导逐渐增大,阈值电压向X轴正方向移动.研制出不同栅槽深度的蓝宝石衬底AlGaN/GaN HEMT,用实验数据验证了得到的不同栅槽深度器件特性变化规律.从刻蚀损伤和刻蚀引入界面态的角度分析了模拟与实验规律产生差别的原因. 关键词： 高电子迁移率晶体管 AlGaN/GaN 槽栅器件     

高场应力及栅应力下AlGaN/GaN HEMT器件退化研究

采用不同的高场应力和栅应力对AlGaN/GaN HEMT器件进行直流应力测试,实验发现：应力后器件主要参数如饱和漏电流,跨导峰值和阈值电压等均发生了明显退化,而且这些退化还是可以完全恢复的;高场应力下,器件特性的退化随高场应力偏置电压的增加和应力时间的累积而增大;对于不同的栅应力,相对来说,脉冲栅应力和开态栅应力下器件特性的退化比关态栅应力下的退化大.对不同应力前后器件饱和漏电流,跨导峰值和阈值电压的分析表明,AlGaN势垒层陷阱俘获沟道热电子以及栅极电子在栅漏间电场的作用下填充虚栅中的表面态是这些不同应 关键词： AlGaN/GaN HEMT器件 表面态(虚栅) 势垒层陷阱 应力     

栅长对PDSOINMOS器件总剂量辐照效应影响的实验研究

本文对PDS01NMOS器件进行了60Coγ射线总剂量辐照的实验测试,分析了不同的栅长对器件辐射效应的影响及其物理机理．研究结果表明,短沟道器件辐照后感生的界面态密度更大,使器件跨导出现退化．PDSOI器件的局部浮体效应是造成不同栅长器件辐照后输出特性变化不一致的主要原因．短沟道器件输出特性的击穿电压更低．在关态偏置条件下,由于背栅晶体管更严重的辐射效应,短沟道SOI器件的电离辐射效应比同样偏置条件下长沟道器件严重．     

总剂量辐照下沟道长度对部分耗尽绝缘体上硅p型场效应晶体管电特性的影响

本文通过实验研究了0.8μm PD(Partially Depleted)SOI(Silicon-On-Insulator)p型Metal-oxidesemiconductor-feld-efect-Transistor(MOSFET)经过剂量率为50 rad(Si)/s的60Coγ射线辐照后的总剂量效应,分析了沟道长度对器件辐照效应的影响.研究结果表明:辐照总剂量相同时,短沟道器件的阈值电压负向漂移量比长沟道器件大,最大跨导退化的更加明显.通过亚阈值分离技术分析得到,氧化物陷阱电荷是引起阈值电压漂移的主要因素.与长沟道器件相比,短沟道器件辐照感生的界面陷阱电荷更多.     

SiC肖特基源漏MOSFET的阈值电压

SiC肖特基源漏MOSFET的阈值电压不同于传统的MOSFET的阈值电压.在深入分析工作机理的基础上,利用二维模拟软件ISE提取并分析了器件的阈值电压.对SiC肖特基源漏MOSFET的阈值电压给出物理描述,得出当源极载流子主要以场发射方式进入沟道,同时沟道进入强反型状态,此时的栅电压是该器件的阈值电压. 关键词： 碳化硅 肖特基接触 阈值电压     

Comprehensive study of a 4H–SiC MES–MOSFET

In this paper, we studied the enhancement of the breakdown voltage in the 4H–SiC MESFET–MOSFET (MES–MOSFET) structure which we have proposed in our previous work. We compared this structure with Conventional Bulk-MOSFET (CB-MOSFET) and Field plated Conventional Bulk-MOSFET (FCB-MOSFET) structures. The 4H–SiC MES–MOSFET structure consists of two additional schottky buried gates which behave like a Metal on Semiconductor (MES) at the interface of the active region and substrate. The motivation for this structure was to enhance the breakdown voltage by introducing a new technique of utilizing the reduced surface field (RESURF) concept. In our comparison and investigation we used a two-dimensional device simulator. Our simulation results show that the breakdown voltage of the proposed structure is 3.7 and 2.9 times larger than CB-MOSFET and FCB-MOSFET structures, respectively. We also showed that the threshold voltage and the slope of drain current (I_D) as a function of drain–source voltage (V_DS) for all the structures is the same.     

4H-SiC MOSFET的温度特性研究

对4HSiCMOSFET的器件结构和温度特性进行了研究,总结了器件的结构参数对特性的影响,比较了不同温度下的输出特性以及饱和漏电流、阈值电压、跨导、导通电阻与温度的变化关系,模拟结果表明4HSiCMOSFET具有优异的温度特性,在800K下可以正常工作 关键词： 4H-SiC MOSFET     

Negative bias-induced threshold voltage instability and zener/interface trapping mechanism in GaN-based MIS-HEMTs

We investigate the instability of threshold voltage in D-mode MIS-HEMT with in-situ SiN as gate dielectric under different negative gate stresses.The complex non-monotonic evolution of threshold voltage under the negative stress and during the recovery process is induced by the combination effect of two mechanisms.The effect of trapping behavior of interface state at SiN/AlGaN interface and the effect of zener traps in AlGaN barrier layer on the threshold voltage instability are opposite to each other.The threshold voltage shifts negatively under the negative stress due to the detrapping of the electrons at SiN/AlGaN interface,and shifts positively due to zener trapping in AlGaN barrier layer.As the stress is removed,the threshold voltage shifts positively for the retrapping of interface states and negatively for the thermal detrapping in AlGaN.However,it is the trapping behavior in the AlGaN rather than the interface state that results in the change of transconductance in the D-mode MIS-HEMT.     

P沟道和N沟道MOS场效应管的辐照实验研究

通过对P沟道MOS场效应管IRF9530和N沟道MOS场效应管IRF540N的X射线和钴源γ射线的辐照对比研究,发现两种场效应管阈值电压变化随吸收剂量近似成一阶指数衰减关系。产生这种现象的原因是场效应管氧化物中的空间俘获电荷与吸收剂量近似成线性变化,对阈值电压变化和吸收剂量有近似线性的改变;而界面态对空间电荷有补偿作用,其对阈值电压的改变与吸收剂量有近似成二次方的关系。     

Sensitivity of heavy-ion-induced single event burnout in SiC MOSFET

The energy deposition and electrothermal behavior of SiC metal-oxide-semiconductor field-effect transistor(MOSFET)under heavy ion radiation are investigated based on Monte Carlo method and TCAD numerical simulation.The Monte Carlo simulation results show that the density of heavy ion-induced energy deposition is the largest in the center of the heavy ion track.The time for energy deposition in SiC is on the order of picoseconds.The TCAD is used to simulate the single event burnout(SEB)sensitivity of SiC MOSFET at four representative incident positions and four incident depths.When heavy ions strike vertically from SiC MOSFET source electrode,the SiC MOSFET has the shortest SEB time and the lowest SEB voltage with respect to direct strike from the epitaxial layer,strike from the channel,and strike from the body diode region.High current and strong electric field simultaneously appear in the local area of SiC MOSFET,resulting in excessive power dissipation,further leading to excessive high lattice temperature.The gate-source junction area and the substrate-epitaxial layer junction area are both the regions where the SiC lattice temperature first reaches the SEB critical temperature.In the SEB simulation of SiC MOSFET at different incident depths,when the incident depth does not exceed the device's epitaxial layer,the heavy-ion-induced charge deposition is not enough to make lattice temperature reach the SEB critical temperature.     

固态Marx发生器的过流保护研究

具有快速上升沿、低开关损耗的SiC MOSFET已逐渐在固态高压脉冲电源中使用。针对固态Marx发生器中的常见短路故障,分析了SiC MOSFET的过流损坏机制,提出了一种新型的带过流保护的驱动系统。该驱动系统不仅实现了宽驱动信号同步输出,同时能够在整个SiC MOSFET导通期间提供过电流钳制效果。驱动系统中的保护电路利用SiC MOSFET门极电压与漏极电流的关系,通过单个采样电阻和一对反向串联的稳压管将SiC MOSFET门极电压拉低的方式来限制过电流。实验结果表明:当开关管的导通电流较小时,虽然门极电压会有轻微下降,但是SiC MOSFET的导通阻抗仍然很低;而在过电流故障发生时,门极电压会被快速拉低,开关管的导通阻抗急剧上升,从而迅速将导通电流钳制在安全范围内。     

Comparative study of electrical characteristics for n-type 4H–SiC planar and trench MOS capacitors annealed in ambient NO

The interface properties and electrical characteristics of the n-type 4H-SiC planar and trench metal–oxide–semiconductor(MOS) capacitors are investigated by measuring the capacitance voltage and current voltage. The flat-band voltage and interface state density are evaluated by the quasi-static method. It is not effective on further improving the interface properties annealing at 1250℃ in NO ambient for above 1 h due to the increasing interface shallow and fast states.These shallow states reduce the effective positive fixed charge density in the oxide. For the vertical MOS capacitors on the(1120) and(1100) faces, the interface state density can be reduced by approximately one order of magnitude, in comparison to the result of the planar MOS capacitors on the(0001) face under the same NO annealing condition. In addition, it is found that Fowler–Nordheim tunneling current occurs at an oxide electric field of 7 MV/cm for the planar MOS device.However, Poole–Frenkel conduction current occurs at a lower electric field of 4 MV/cm for the trench MOS capacitor. This is due to the local field crowded at the trench corner severely causing the electrons to be early captured at or emitted from the SiO_2/Si C interface. These results provide a reference for an in-depth understanding of the mobility-limiting factors and long term reliability of the trench and planar SiO_2/Si C interfaces.