Microwave complementary doped-channel field-effect transistors

In this paper, the device performance and complementary inverter of the InGaP/InGaAs/GaAs doped-channel field-effect transistors (DCFETs) by two-dimensional semiconductor simulation are demonstrated. Due to the relatively large conduction (valance) band discontinuity at InGaP/InGaAs interface, it provides good confinement effect for transporting carriers in InGaAs channel layer for the n-channel (p-channel) device. The large gate turn-on voltage is achieved due to the employment of the wide energy-gap InGaP material as gate layer. The _ft$f_t$ and _fmax$f_{max}$ are of 6.5 (2.1) and 25 (5) GHz for the n-channel (p-channel) device. Furthermore, the co-integrated structures, by the combination of n- and p-channel field-effect transistors, could form a complementary inverter and the relatively large noise margins are achieved.     

Performance of La₂O₃/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors

We report on the performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors(MOSHEMTs) and InAlN/GaN high electron mobility transistors(HEMTs).The MOSHEMT presents a maximum drain current of 961 mA/mm at Vgs = 4 V and a maximum transconductance of 130 mS/mm compared with 710 mA/mm at Vgs = 1 V and 131 mS/mm for the HEMT device,while the gate leakage current in the reverse direction could be reduced by four orders of magnitude.Compared with the HEMT device of a similar geometry,MOSHEMT presents a large gate voltage swing and negligible current collapse.     

Performance of La2O3/InAlN/GaN metal—oxide—semiconductor high electron mobility transistors

We report on the performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors(MOSHEMTs) and InAlN/GaN high electron mobility transistors(HEMTs).The MOSHEMT presents a maximum drain current of 961 mA/mm at Vgs = 4 V and a maximum transconductance of 130 mS/mm compared with 710 mA/mm at Vgs = 1 V and 131 mS/mm for the HEMT device,while the gate leakage current in the reverse direction could be reduced by four orders of magnitude.Compared with the HEMT device of a similar geometry,MOSHEMT presents a large gate voltage swing and negligible current collapse.     

Heterogeneous integration of InP HEMTs on quartz wafer using BCB bonding technology

Heterogeneous integrated InP high electron mobility transistors(HEMTs)on quartz wafers are fabricated successfully by using a reverse-grown InP epitaxial structure and benzocyclobutene(BCB)bonding technology.The channel of the new device is In_0.7Ga_0.3As,and the gate length is 100 nm.A maximum extrinsic transconductance gm,max of 855.5 mS/mm and a maximum drain current of 536.5 mA/mm are obtained.The current gain cutoff frequency is as high as 262 GHz and the maximum oscillation frequency reaches 288 GHz.In addition,a small signal equivalent circuit model of heterogeneous integration of InP HEMTs on quartz wafer is built to characterize device performance.     

High temperature characteristics of ZnO-based MOS-FETs with a photochemical vapor deposition SiO2 gate dielectric

The authors report the fabrication of ZnO-based metal-oxide-semiconductor field effect transistors (MOSFETs) with a high quality SiO₂ gate dielectric by photochemical vapor deposition (photo-CVD) on a sapphire substrate. Compared with ZnO-based metal-semiconductor FETs (MESFETs), it was found that the gate leakage current was decreased to more than two orders of magnitude by inserting the photo-CVD SiO₂ gate dielectric between ZnO and gate metal. Besides, it was also found that the fabricated ZnO MOSFETs can achieve normal operation of FET, even operated at 150 °C. This could be attributed to the high quality of photo-CVD SiO₂ layer. With a 2 μm gate length, the saturated I_ds and maximum transconductance (G_m) were 61.1 mA/mm and 10.2 mS/mm for ZnO-based MOSFETs measured at room temperature, while 45.7 mA/mm and 7.67 mS/mm for that measured at 150 °C, respectively.     

高线性度Al_xGa_(1-x)N/Al_yGa_(1-y)N/GaN高电子迁移率晶体管优化设计

对新型复合沟道AlxGa1-xN/AlyGa1-yN/GaN高电子迁移率晶体管(HEMT)进行了优化设计.从半导体能带理论与量子阱理论出发,自洽求解了器件层结构参数对器件导带能级以及二维电子气(2DEG)中载流子浓度和横向电场的影响.用TCAD软件仿真得到了器件的层结构参数对器件性能的影响.结合理论分析和仿真结果确定了器件的最佳外延层结构Al0.31Ga0.69N/Al0.04Ga0.96N/GaNHEMT.对栅长1μm,栅宽100μm的器件仿真表明,器件的最大跨导为300mS/mm,且在栅极电压-2—1V的宽范围内跨导变化很小,表明器件具有较好的线性度;器件的最大电流密度为1300mA/mm,特征频率为11.5GHz,最大振荡频率为32.5GHz.     

Device linearity improvement and current enhancement utilizing high-to-low doping-channel FETs

We report device linearity improvement and current enhancement in both a heterostructure FET (HFET) and a camel-gate FET (CAMFET) using InGaAs/GaAs high-low and GaAs high-medium-low doped channels, respectively. In an HFET, a low doped GaAs layer was employed to build an excellent Schottky contact. In a GaAs CAMFET, a low doped layer together withn⁺andp⁺layers formed a high-performance majority camel-diode gate. Both exhibit high effective potential barriers of >1.0 V and gate-to-drain breakdown voltages of >20.0 V (atI_g=1.0 mA mm⁻¹). A thin, high doped channel was used to enhance current drivability and to improve the transconductance linearity. A 2×100 μm²HFET had a peak transconductance of 230 mS mm⁻¹and a current density greater than 800 mA mm⁻¹. The device had a transconductance of more than 80 percent of the peak value over a wide drain current range of 200 to 800 mA mm⁻¹. A 1.5×100 μm²CAMFET had a peak transconductance of 220 mS mm⁻¹and a current density greater than 800 mA mm⁻¹. Similarly, the device had a transconductance of more than 80 percent of the peak value over a wide drain current range of 160 to 800 mA mm⁻¹. The improvement of device linearity and the enhancement of current density suggest that high-to-low doped-channel devices for both an HFET and a CAMFET are suitable for high-power large signal circuit applications.     

高跨导氢终端多晶金刚石长沟道场效应晶体管特性研究

基于多晶金刚石制作了栅长为4 pm的铝栅氢终端金刚石场效应晶体管.器件的饱和漏源电流为160 mA/mm,导通电阻低达37.85Ω·mm,最大跨导达到32 mS/mm,且跨导高于最大值的90%的栅压(V_(GS))范围达到3 V(-2 V≤V_(GS)≤-5 V).通过传输线电阻分析以及器件的导通电阻和电容-电压特性分析,发现氢终端多晶金刚石栅下沟道中的空穴面浓度达到了1.56×10~(13)cm~(-2),有效迁移率在前述高跨导栅压范围保持在约170 cm~2/(V·s).分析认为,较低的栅源和栅漏串联电阻、沟道中高密度的载流子和在大范围栅压内的高水平迁移率是引起高而宽阔的跨导峰和低导通电阻的原因.     

In-situ SiN combined with etch-stop barrier structure for high-frequency AlGaN/GaN HEMT

The etch-stop structure including the in-situ SiN and AlGaN/GaN barrier is proposed for high frequency applications.The etch-stop process is realized by placing an in-situ SiN layer on the top of the thin AlGaN barrier.F-based etching can be self-terminated after removing SiN,leaving the AlGaN barrier in the gate region.With this in-situ SiN and thin barrier etch-stop structure,the short channel effect can be suppressed,meanwhile achieving highly precisely controlled and low damage etching process.The device shows a maximum drain current of 1022 mA/mm,a peak transconductance of 459 mS/mm,and a maximum oscillation frequency(fmax)of 248 GHz.     

A study of GaN MOSFETs with atomic-layer-deposited Al2O3 as the gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic-layer-deposited Al₂O₃ gate dielectrics are fabricated. The device, with atomic-layer-deposited Al₂O₃ as the gate dielectric, presents a drain current of 260 mA/mm and a broad maximum transconductance of 34 mS/mm, which are better than those reported previously with Al₂O₃ as the gate dielectric. Furthermore, the device shows negligible current collapse in a wide range of bias voltages, owing to the effective passivation of the GaN surface by the Al₂O₃ film. The gate drain breakdown voltage is found to be about 59.5 V, and in addition the channel mobility of the n-GaN layer is about 380 cm²/Vs, which is consistent with the Hall result, and it is not degraded by atomic-layer-deposition Al₂O₃ growth and device fabrication.     

A numerical study of dc characteristics of HEMT with p -type δ -doped barrier

The dc characteristics of an InGaP/InGaAs/GaAs pseudomorphic high-electron-mobility transistor (HEMT) with a p-type δ-doped InGaP barrier are numerically investigated with the ISE-TCAD simulation program. The simulation results indicate that a HEMT with such a structure has a higher gate turn-on voltage, better carrier confinement that results in a lower voltage-dependent transconductance, and a larger breakdown voltage when compared with the typical HEMT. The simulation results also suggest that this structure is beneficial for linear and large-signal application. PACS 85.30.De; 73.50.-h; 02.60.Cb     

Off-state breakdown characteristics of InGaP-based high-barrier gate heterostructure field-effect transistors

In this work, the off-state breakdown characteristics of two different types InGaP-based high-barrier gate heterostructure field-effect transistors are studied and demonstrated. These devices have different high-barrier gate structures, e.g. the i-InGaP layer for device A and n  ⁺ - GaAs/p ⁺  -InGaP/n-GaAs camel-like structure for device B. The wide-gap InGaP layer is used to improve the breakdown characteristics. Experimentally, the studied devices show high off-state breakdown characteristics even at high temperature operation regime. This indicates that the studied devices are suitable for high-power and high-temperature applications. In addition, the off-state breakdown mechanisms are different for device A and B. For device A, off-state breakdown characteristics is only gate dominated at the temperature regime from 30 to 180  ^∘ C. For device B, off-state breakdown characteristics are gate and channel dominated at 30  ^∘ C and only gate dominated within 150 to 210  ^∘ C.     

Novel vertical stack HCMOSFET with strained SiGe/Si quantum channel

A novel vertical stack heterostructure CMOSFET is investigated, which is structured by strained SiGe/Si with a hole quantum well channel in the compressively strained Si量子信道 异质结构 CMOSFET 量子论 量子阱strained SiGe/Si, quantum well channel, heterostructure CMOSFET, poly-SiGe gateProject supported by the Preresearch from National Ministries and Commissions (Grant Nos 51408061104DZ01, 51439010904DZ0101).2/2/2006 12:00:00 AM2006-01-022006-03-16A novel vertical stack heterostructure CMOSFET is investigated, which is structured by strained SiGe/Si with a hole quantum well channel in the compressively strained Sil-xGex layer for p-MOSFET and an electron quantum well channel in the tensile strained Si layer for n-MOSFET. The device possesses several advantages including： 1） the integration of electron quantum well channel with hole quantum well channel into the same vertical layer structure; 2） the gate work function modifiability due to the introduction of poly-SiGe as a gate material; 3） better transistor matching; and 4） flexibility of layout design of CMOSFET by adopting exactly the same material lays for both n-channel and p-channel. The MEDICI simulation result shows that p-MOSFET and n-MOSFET have approximately the same matching threshold voltages. Nice performances are displayed in transfer characteristic, transconductance and cut-off frequency. In addition, its operation as an inverter confirms the CMOSFET structured device to be normal and effective in function.     

单晶金刚石氢终端场效应晶体管特性

基于微波等离子体化学气相淀积生长的单晶金刚石制作了栅长为2μm的耗尽型氢终端金刚石场效应晶体管,并对器件特性进行了分析.器件的饱和漏电流在栅压为-6 V时达到了96 mA/mm,但是在-6 V时栅泄漏电流过大.在-3.5 V的安全工作栅压下,饱和漏电流达到了77 mA/mm.在器件的饱和区,宽5.9 V的栅电压范围内,跨导随着栅电压的增加而近线性增大到30 mS/mm.通过对器件导通电阻和电容-电压特性的分析,氢终端单晶金刚石的二维空穴气浓度达到了1.99×10~(13)cm~(-2),并且迁移率和载流子浓度均随着栅压向正偏方向的移动而逐渐增大.分析认为,沟道中高密度的载流子、大的栅电容以及迁移率的逐渐增加是引起跨导在很大的栅压范围内近线性增加的原因.     

Aδ-doped In0.24Ga0.76As/GaAs pseudomorphic high electron mobility transistor using a graded superlattice spacer

A new δ -doped In_0.24Ga_0.76As/GaAs pseudomorphic high electron mobility transistor (HEMT) using a graded superlattice spacer grown by molecular beam epitaxy (MBE) has been successfully fabricated and investigated. The present device structure demonstrated a more than 40% enhancement of electron mobility and 20% higher product value of electron mobility and two-dimensional electron gas (2DEG) concentration than those of the conventional HEMT with single undoped spacer under the same growth specifications. Superior device characteristics were achieved by employing the thickness-graded superlattice spacer to accommodate the lattice-mismatch-induced strain and to improve the interfacial quality. For a gate length of 1 μ m, the maximum drain-to-source saturation current density and extrinsic transconductance of the present HEMT design are 165 mA mm ^− 1and 107 mS mm ^− 1, respectively, at room temperature.     

Investigation on threshold voltage of p-channel GaN MOSFETs based on p-GaN/AlGaN/GaN heterostructure

The threshold voltage (V_th) of the p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is investigated via Silvaco-Atlas simulations. The main factors which influence the threshold voltage of p-channel GaN MOSFETs are barrier height Φ_1,p, polarization charge density σ_b, and equivalent unite capacitance C_oc. It is found that the thinner thickness of p-GaN layer and oxide layer will acquire the more negative threshold voltage V_th, and threshold voltage |V_th| increases with the reduction in p-GaN doping concentration and the work-function of gate metal. Meanwhile, the increase in gate dielectric relative permittivity may cause the increase in threshold voltage |V_th|. Additionally, the parameter influencing output current most is the p-GaN doping concentration, and the maximum current density is 9.5 mA/mm with p-type doping concentration of 9.5×10¹⁶ cm^-3 at V_GS = -12 V and V_DS = -10 V.     

Enhancement-mode AlGaN/GaN high electronic mobility transistors with thin barrier

An enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMTs) was fabricated with 15-nm AlGaN barrier layer. E-mode operation was achieved by using fluorine plasma treatment and post-gate rapid thermal annealing. The thin barrier depletion-HEMTs with a threshold voltage typically around --1.7 V, which is higher than that of the 22-nm barrier depletion-mode HEMTs (--3.5 V). Therefore, the thin barrier is emerging as an excellent candidate to realize the enhancement-mode operation. With 0.6-μ m gate length, the devices treated by fluorine plasma for 150-W RF power at 150 s exhibited a threshold voltage of 1.3 V. The maximum drain current and maximum transconductance are 300 mA/mm, and 177 mS/mm, respectively. Compared with the 22-nm barrier E-mode devices, V_T of the thin barrier HEMTs is much more stable under the gate step-stress.     

Fabrication of 160-nm T-gate metamorphic AlInAs/GaInAs HEMTs on GaAs substrates by metal organic chemical vapour deposition

The fabrication and performance of 160-nm gate-length metamorphic AlInAs/GaInAs high electron mobility tran-sistors (mHEMTs) grown on GaAs substrate by metal organic chemical vapour deposition (MOCVD) are reported. By using a novel combined optical and e-beam photolithography technology, submicron mHEMTs devices have been achieved. The devices exhibit good DC and RF performance. The maximum current density was 817 mA/mm and the maximum transconductance was 828 mS/mm. The non-alloyed Ohmic contact resistance Rc was as low as 0.02 Ω- mm. The unity current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) were 146 GHz and 189 GHz, respectively. This device has the highest fT yet reported for a 160-nm gate-length HEMTs grown by MOCVD. The output conductance is 28.9 mS/mm, which results in a large voltage gain of 28.6. Also, an input capacitance to gate-drain feedback capacitance ratio, Cgs/Cgd, of 4.3 is obtained in the device.     

Application of superlattice gate and modulation-doped buffer for GaAs power MESFET grown by MBE

A new power GaAs MESFET (SGMBT), using the undoped superlattice gate and modulation-doped (MD) buffer, has been fabricated successfully by MBE. A much higher gate-drain breakdown voltage (30 V) and lower gate reverse leakage current have been obtained due to the existence of the undoped AlGaAs/GaAs superlattice gate insulator. The use of MD buffer structure introduces a high output resistance and low trap concentration at AlGaAs/GaAs interface. The degradation region at channel-buffer interface is estimated to be smaller than 40 Å. Thus the sharpness and smoothness between active channel and buffer is truly improved by the insertion of MD structure. The maximum output saturation current and output power of SGMBT are 300 mA/mm and 0.67 W/mm, respectively. By optimizing the device geometry and gate dimension, the output performance of SGMBT can be improved further.     

Physical simulations and experimental results of 4H—SiC MESFETs on high purity semi-insulating substrates

In this paper we report on DC and RF simulations and experimental results of 4H--SiC metal semiconductor field effect transistors (MESFETs) on high purity semi-insulating substrates. DC and small-signal measurements are compared with simulations. We design our device process to fabricate n-channel 4H--SiC MESFETs with 100~μm gate periphery. At 30~V drain voltage, the maximum current density is 440~mA/mm and the maximum transconductance is 33~mS/mm. For the continuous wave (CW) at a frequency of 2~GHz, the maximum output power density is measured to be 6.6~W/mm, with a gain of 12~dB and power-added efficiency of 33.7％. The cut-off frequency (f_T) and the maximum frequency (f_max) are 9~GHz and 24.9~GHz respectively. The simulation results of f_T and f_max are 11.4~GHz and 38.6~GHz respectively.