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1.
We have developed low temperature formation methods of SiO2/Si and SiO2/SiC structures by use of nitric acid, i.e., nitric acid oxidation of Si (or SiC) (NAOS) methods. By use of the azeotropic NAOS method (i.e., immersion in 68 wt% HNO3 aqueous solutions at 120 °C), an ultrathin (i.e., 1.3-1.4 nm) SiO2 layer with a low leakage current density can be formed on Si. The leakage current density can be further decreased by post-metallization anneal (PMA) at 200 °C in hydrogen atmosphere, and consequently the leakage current density at the gate bias voltage of 1 V becomes 1/4-1/20 of that of an ultrathin (i.e., 1.5 nm) thermal oxide layer usually formed at temperatures between 800 and 900 °C. The low leakage current density is attributable to (i) low interface state density, (ii) low SiO2 gap-state density, and (iii) high band discontinuity energy at the SiO2/Si interface arising from the high atomic density of the NAOS SiO2 layer.For the formation of a relatively thick (i.e., ≥10 nm) SiO2 layer, we have developed the two-step NAOS method in which the initial and subsequent oxidation is performed by immersion in ∼40 wt% HNO3 and azeotropic HNO3 aqueous solutions, respectively. In this case, the SiO2 formation rate does not depend on the Si surface orientation. Using the two-step NAOS method, a uniform thickness SiO2 layer can be formed even on the rough surface of poly-crystalline Si thin films. The atomic density of the two-step NAOS SiO2 layer is slightly higher than that for thermal oxide. When PMA at 250 °C in hydrogen is performed on the two-step NAOS SiO2 layer, the current-voltage and capacitance-voltage characteristics become as good as those for thermal oxide formed at 900 °C.A relatively thick (i.e., ≥10 nm) SiO2 layer can also be formed on SiC at 120 °C by use of the two-step NAOS method. With no treatment before the NAOS method, the leakage current density is very high, but by heat treatment at 400 °C in pure hydrogen, the leakage current density is decreased by approximately seven orders of magnitude. The hydrogen treatment greatly smoothens the SiC surface, and the subsequent NAOS method results in the formation of an atomically smooth SiO2/SiC interface and a uniform thickness SiO2.  相似文献   

2.
We have developed the advanced nitric acid oxidation of Si (NAOS) method to form relatively thick (5-10 nm) SiO2/Si structure with good electrical characteristics. This method simply involves immersion of Si in 68 wt% nitric acid aqueous solutions at 120 °C with polysilazane films. Fourier transform infrared absorption (FT-IR) measurements show that the atomic density of the NAOS SiO2 layer is considerably high even without post-oxidation anneal (POA), i.e., 2.28 × 1022 atoms/cm2, and it increases by POA at 400 °C in wet-oxygen (2.32 × 1022 atoms/cm2) or dry-oxygen (2.30 × 1022 atoms/cm2). The leakage current density is considerably low (e.g., 10−5 A/cm2 at 8 MV/cm) and it is greatly decreased (10−8 A/cm2 at 8 MV/cm) by POA at 400 °C in wet-oxygen. POA in wet-oxygen increases the atomic density of the SiO2 layer, and decreases the density of oxide fixed positive charges.  相似文献   

3.
We have developed low temperature formation methods of SiO2 layers which are applicable to gate oxide layers in thin film transistors (TFT) by use of nitric acid (HNO3). Thick (>10 nm) SiO2 layers with good thickness uniformity (i.e., ±4%) can be formed on 32 cm × 40 cm substrates by the two-step nitric acid oxidation method in which initial and subsequent oxidation is performed using 40 and 68 wt% (azeotropic mixture) HNO3 aqueous solutions, respectively. The nitric acid oxidation of polycrystalline Si (poly-Si) thin films greatly decreases the height of ridge structure present on the poly-Si surfaces. When poly-Si thin films on 32 cm × 40 cm glass substrates are oxidized at azeotropic point (i.e., 68 wt% HNO3 aqueous solutions at 121 °C), ultrathin (i.e., 1.1 nm) SiO2 layers with a good thickness uniformity (±0.05 nm) are formed on the poly-Si surfaces. When SiO2/Si structure fabricated using plasma-enhanced chemical vapor deposition is immersed in 68 wt% HNO3, oxide fixed charge density is greatly decreased, and interface states are eliminated. The fixed charge density is further decreased by heat treatments at 200 °C, and consequently, capacitance-voltage characteristics which are as good as those of thermal SiO2/Si structure are achieved.  相似文献   

4.
A n atomic-layer-deposited Al2O3/HfO2/Al2O3 (A/H/A) tunnel barrier is in vestigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i.e., an increase by 9 V for ±12 V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1 V for 100 μs program/erase at a low voltage of ±7 V, which is due to fast charge injection rates, i.e., about 2.4× 10^16 cm^-2 s^-1 for electrons and 1.9× 1016 cm^-2 s^-1 for holes.  相似文献   

5.
The Ti-doped Ta2O5 thin films (<10 nm) obtained by rf sputtering are studied with respect to their composition, dielectric and electrical properties. The incorporation of Ti is performed by two methods - a surface doping, where a thin Ti layer is deposited on the top of Ta2O5 and a bulk doping where the Ti layer is sandwiched between two layers of Ta2O5. The effect of the process parameters (the method and level of doping) on the elemental distribution in-depth of the films is investigated by the time of flight secondary ion mass spectroscopy (ToF-SIMS). The Ti and Ta2O5 are intermixed throughout the whole thickness but the layers are very inhomogeneous. Two sub-layers exist in all the samples — a near interfacial region which is a mixture of Ta-, Ti-, Si-oxides as well as TaSiO, and an upper Ti-doped Ta2O5 sub-layer. For both methods of doping, Ti tends to pile-up at the Si interface. The electrical characterisation is performed on capacitors with Al- and Ru-gate electrodes. The two types of MIS structures exhibit distinctly different electrical behavior: the Ru gate provides higher dielectric permittivity while the stacks with Al electrode are better in terms of leakage currents. The specific metal-dielectric reactions and metal-induced electrically active defects for each metal electrode/high-k dielectric stack define its particular electrical behavior. It is demonstrated that the Ti doping of Ta2O5 is a way of remarkable improvement of leakage characteristics (the current reduction with more than four orders of magnitude as compared with undoped Ta2O5) of Ru-gated capacitors which originates from Ti induced suppression of the oxygen vacancy related defects.  相似文献   

6.
Thick (i.e., ∼10 nm) SiO2/Si structure has been formed at 121 °C by immersion of Si in relatively low concentration HNO3 followed by that in 68 wt.% HNO3 (i.e., two-step nitric acid (HNO3) oxidation method of Si, NAOS) and spectroscopic properties and electrical characteristics of the NAOS SiO2 layers are investigated. The SiO2 thickness strongly depends on the concentration of HNO3 aqueous solutions employed in the initial oxidation, and it becomes the largest at the HNO3 concentration of 40 wt.%. The MOS diodes with the ∼9 nm SiO2 layer formed by the NAOS method possess a relatively low leakage current density (e.g., 10−8 A/cm2 at the forward bias of 1 V) and it is further decreased by more than one order of magnitude by post-metallization annealing (PMA) in hydrogen at 250 °C. The good leakage characteristic is attributable to atomically flat SiO2/Si interfaces and high atomic density of 2.30-2.32 × 1022 atoms/cm3 of the NAOS SiO2 layers. High-density interface states are present in as-prepared SiO2 layers and they are eliminated by PMA in hydrogen.  相似文献   

7.
Silicon dioxide (SiO2) layers with a thickness more than 10 nm can be formed at ∼120 °C by direct Si oxidation with nitric acid (HNO3). Si is initially immersed in 40 wt.% HNO3 at the boiling temperature of 108 °C, which forms a ∼1 nm SiO2 layer, and the immersion is continued after reaching the azeotropic point (i.e., 68 wt.% HNO3 at 121 °C), resulting in an increase in the SiO2 thickness. The nitric acid oxidation rates are the same for (1 1 1) and (1 0 0) orientations, and n-type and p-type Si wafers. The oxidation rate is constant at least up to 15 nm SiO2 thickness (i.e., 1.5 nm/h for single crystalline Si and 3.4 nm/h for polycrystalline Si (poly-Si)), indicating that the interfacial reaction is the rate-determining step. SiO2 layers with a uniform thickness are formed even on a rough surface of poly-Si thin film.  相似文献   

8.
Epitaxial ultrathin NiFe2O4 films were deposited on 1 wt% Nb-doped SrTiO3 (0 0 1) substrates by reactive cosputtering to form junctions with an area of ∼2 mm2, and current-voltage curves show rectifying and asymmetrical hysteresis characteristics. The resistance calculated from the current-voltage curves is strongly voltage dependent, and the hysteretic loops with high and low resistive states were observed. The hysteretic loops are considered to stem from the capacitance effect of the highly resistive NiFe2O4 layer, which leads to charge accumulation at the interfaces. The results show that the interfaces of the junctions have a large areal capacitance of ∼100 nF/mm2 from 300 to 120 K.  相似文献   

9.
Conventional thermal oxidation of SiC requires heating at ∼1100 °C. In the present study, we have developed a method of oxidizing SiC at low temperatures (i.e., ∼120 °C) to form relatively thick silicon dioxide (SiO2) layers by use of nitric acid. When 4H-SiC(0 0 0 1) wafers are immersed in 40 wt% HNO3 at the boiling temperature of 108 °C and the boiling is kept for 5 h after reaching the azeotropic point (i.e., 68 wt% HNO3 at 121 °C), 8.1 nm thick SiO2 layers are formed on the SiC substrates. High resolution transmission electron microscopy measurements show that the SiO2/SiC interface is atomically flat and the SiO2 layer is uniform without bunching. When SiC is immersed in an azeotropic mixture of HNO3 with water from the first, the SiO2 thickness is less than 0.3 nm. The metal-oxide-semiconductor (MOS) diodes with the SiO2 layer formed by the nitric acid oxidation method possess a considerably low leakage current density.  相似文献   

10.
L. Shi 《Applied Surface Science》2007,253(7):3731-3735
As a potential gate dielectric material, the La2O3 doped SiO2 (LSO, the mole ratio is about 1:5) films were fabricated on n-Si (0 0 1) substrates by using pulsed laser deposition technique. By virtue of several measurements, the microstructure and electrical properties of the LSO films were characterized. The LSO films keep the amorphous state up to a high annealing temperature of 800 °C. From HRTEM and XPS results, these La atoms of the LSO films do not react with silicon substrate to form any La-compound at interfacial layer. However, these O atoms of the LSO films diffuse from the film toward the silicon substrate so as to form a SiO2 interfacial layer. The thickness of SiO2 layer is only about two atomic layers. A possible explanation for interfacial reaction has been proposed. The scanning electron microscope image shows the surface of the amorphous LSO film very flat. The LSO film shows a dielectric constant of 12.8 at 1 MHz. For the LSO film with thickness of 3 nm, a small equivalent oxide thickness of 1.2 nm is obtained. The leakage current density of the LSO film is 1.54 × 10−4 A/cm2 at a gate bias voltage of 1 V.  相似文献   

11.
Sandwich-structure Al2O3/HfO2/Al2O3 gate dielectric films were grown on ultra-thin silicon-on-insulator (SOI) substrates by vacuum electron beam evaporation (EB-PVD) method. AFM and TEM observations showed that the films remained amorphous even after post-annealing treatment at 950 °C with smooth surface and clean silicon interface. EDX- and XPS-analysis results revealed no silicate or silicide at the silicon interface. The equivalent oxide thickness was 3 nm and the dielectric constant was around 7.2, as determined by electrical measurements. A fixed charge density of 3 × 1010 cm−2 and a leakage current of 5 × 10−7A/cm2 at 2 V gate bias were achieved for Au/gate stack /Si/SiO2/Si/Au MIS capacitors. Post-annealing treatment was found to effectively reduce trap density, but increase in annealing temperature did not made any significant difference in the electrical performance.  相似文献   

12.
In order to apply two-dimensional electron-gas-field-effect-transistors (2DEG-FETs) for cell-viability sensors, we investigated the chemical/electrical properties of TiO2 thin films (13-17 nm) prepared with the sol-gel technique on the gate surface of AlGaAs/GaAs 2DEG-FETs. Photochemical/electrochemical reactions on GaAs surface in electrolytes, which induce the degradation of 2DEG-FET performance, are effectively suppressed by introducing a TiO2 thin film on the gate area of 2DEG-FETs. Compared to conventional ion-selective FETs (ISFETs), the TiO2/2DEG-FETs in this study exhibit a high sensitivity (410 mV/mM) for H2O2 detection. TiO2 surfaces show better biocompatibility than GaAs surfaces as demonstrated by direct cell culture on these surfaces.  相似文献   

13.
In this work we have compared the SiO2/SiC interface electrical characteristics for three different oxidations processes (dry oxygen, water-containing oxygen and water-containing nitrogen atmospheres). MOS structures were fabricated on 8° off-axis 4H-SiC(0 0 0 1) n- and p-type epi-wafers. Electrical characteristics were obtained by I-V measurements, high-frequency capacitance-voltage (C-V) and ac conductance (G-ω) methods. Comparing the results, one observes remarkable differences between samples which underwent different oxidation routes. Among the MOS structures analyzed, the sample which underwent wet oxidation with oxygen as carrier gas presented the higher dielectric strength and lower values of interface states density.  相似文献   

14.
The current-voltage (I-V) characteristics of Al/SiO2/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO2 interface. The density of interface states (Nss) distribution profile as a function of (Ess − Ev) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φe) at room temperature for the Schottky diode on the order of ≅4 × 1013 eV−1 cm−2. These high values of Nss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The Nss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in Nss but also in series resistance (Rs), and the location of Nss and Rs has a significant on electrical characteristics of Schottky diodes.  相似文献   

15.
A relatively thick (i.e., ∼9 nm) SiO2 layer can be formed by oxidation of Si with nitric acid (HNO3) vapor below 500 °C. In spite of the low temperature formation, the leakage current density flowing through the SiO2 layer is considerably low, and it follows the Fowler-Nordheim mechanism. From the Fowler-Nordheim plots, the conduction band offset energy at the SiO2/Si interface is determined to be 2.57 and 2.21 eV for HNO3 vapor oxidation at 500 and 350 °C, respectively. From X-ray photoelectron spectroscopy measurements, the valence band offset energy is estimated to be 4.80 and 4.48 eV, respectively, for 500 and 350 °C oxidation. The band-gap energy of the SiO2 layer formed at 500 °C (8.39 eV) is 0.68 eV larger than that formed at 350 °C. The higher band-gap energy for 500 °C oxidation is mainly attributable to the higher atomic density of the SiO2 layer of 2.46 × 1022/cm3. Another reason may be the absence of SiO2 trap-states.  相似文献   

16.
Phase relation studies in the Gd2O3-Nd2O3 system have been performed on (Gd1−xNdx)2O3 samples (0?x?1) with the purpose of performing a systematic study of the composition effects on their structural and magnetic properties. All the samples were synthesized by calcination of the related oxalates at 1200 °C in order to ensure the complete decomposition of the oxalates. Five phase regions, namely an A-type hexagonal, a B-type monoclinic, a C-type cubic solid solution and two biphasic mixtures of the former three phase fields were detected in this system. The magnetic susceptibility measurements showed the presence of antiferromagnetic interactions in all samples. The Curie-Weiss temperature shows a nonlinear dependence on concentration. Deduced effective magnetic moments are close to the free ion values.  相似文献   

17.
In this study, the AC conductivity of insulating Gd1/3Sr2/3FeO3 was analyzed within the framework of the quantum-mechanical tunneling mechanism (QMT) and the hopping of barrier mechanism (HOB). Experimental data were taken from 20 Hz to 1 MHz and from 80 to 300 K. Observation revealed that the small polaron QMT model is the more suitable mechanism for modeling the AC conductivity of Gd1/3Sr2/3FeO3 at low temperatures.  相似文献   

18.
In this work we analyze the effect of (NH)2Sx wet treatment on the GaAs(1 0 0) covered with “epiready” oxide layer without any pretreatment in order to check the removal of oxides and carbon-related contamination, and the formation of sulfur species. The sulfidation procedure consisted of epiready sample dipping (at room and 40 °C temperatures) in an ammonium polysulfide solution combined with a UHV flash annealing up to 500 °C.The inspection of the XPS As 2p3/2 and Ga 2p3/2 spectra taken at surface sensitive mode revealed: (i) the temperature-dependent reduction of the amount of GaAs oxides and carbon contamination after sulfidation, and almost their complete removal after subsequent annealing, (ii) the creation of sulfur bonds with both Ga and As, with more thermally stable Ga-S bonds, and (iii) the slight reduction in elemental arsenic amount.  相似文献   

19.
A high-quality ferromagnetic GaMnN (Mn=2.8 at%) film was deposited onto a GaN buffer/Al2O3(0 0 0 1) at 885 °C using the metal-organic chemical vapor deposition (MOCVD) process. The GaMnN film shows a highly c-axis-oriented hexagonal wurtzite structure, implying that Mn doping into GaN does not influence the crystallinity of the film. No Mn-related secondary phases were found in the GaMnN film by means of a high-flux X-ray diffraction analysis. The composition profiles of Ga, Mn, and N maintain nearly constant levels in depth profiles of the GaMnN film. The binding energy peak of the Mn 2p3/2 orbital was observed at 642.3 eV corresponding to the Mn (III) oxidation state of MnN. The presence of metallic Mn clusters (binding energy: 640.9 eV) in the GaMnN film was excluded. A broad yellow emission around 2.2 eV as well as a relatively weak near-band-edge emission at 3.39 eV was observed in a Mn-doped GaN film, while the undoped GaN film only shows a near-band-edge emission at 3.37 eV. The Mn-doped GaN film showed n-type semiconducting characteristics; the electron carrier concentration was 1.2×1021/cm3 and the resistivity was 3.9×10−3 Ω cm. Ferromagnetic hysteresis loops were observed at 300 K with a magnetic field parallel and perpendicular to the ab plane. The zero-field-cooled and field-cooled curves at temperatures ranging from 10 to 350 K strongly indicate that the GaMnN film is ferromagnetic at least up to 350 K. A coercive field of 250 Oe and effective magnetic moment of 0.0003 μB/Mn were obtained. The n-type semiconducting behavior plays a role in inducing ferromagnetism in the GaMnN film, and the observed ferromagnetism is appropriately explained by a double exchange mechanism.  相似文献   

20.
The structural and magnetic properties of 3-nm-thick CoPt alloys grown on WSe2(0 0 0 1) at various temperature are investigated. Deposition at room temperature leads to the formation of a chemically disordered fcc CoPt alloy with [1 1 1] orientation. Growth at elevated temperatures induces L10 chemical order starting at 470 K accompanied with an increase in grain size and a change in grain morphology. As a consequence of the [1 1 1] growth direction, the CoPt grains can adopt one of the three possible variants of the L10 phase with tetragonal c-axis tilted from the normal to the film plane direction at 54°. The average long-range order parameter is found to be 0.35(±0.05) and does not change with the increase in the deposition temperature from 570 to 730 K. This behavior might be related to Se segregation towards the growing facets and surface disorder effects promoted by a high surface-to-volume ratio. Magnetic studies reveal a superparamagnetic behavior for the films grown at 570 and 730 K in agreement with the film morphology and degree of chemical order. The measurements at 10 K reveal the orientation of the easy axis of the magnetization lying basically in the film plane.  相似文献   

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