零偏退火与反偏退火对含氢的Au／n—Si肖特基势垒的控制

＜１１１＞晶向的掺磷的ｎ型硅外延片经等离子进氢后连同未经等离子氢处理的对比片一起淀积金，制得Ａｕ／ｎ－Ｓｉ肖特基势垒，实验结果表明：氢能使Ａｕ／ｎ－Ｓｉ的肖特基势垒高度下降０．１３ｅＶ；含氢的肖特基势垒的高度可以被零偏退火与反偏退火所控制，即零偏退火使含氢的肖特基势垒的高度降低，而反偏退火使含氢的肖特基势垒的高度升高；而且零偏退火与反偏退火对肖特基势垒高的这种控制作用至少在三个循环过程中是可逆的。     

非晶态半导体／金属薄膜的分形晶化

本文综述非晶态半导体／金属薄膜退火过程中金属诱导非晶态半导体晶化的研究，综述对若干非晶态半导体与金属组成的薄膜（Ｇｅ－Ａｕ、Ｇｅ－Ａｇ、Ｇｅ－Ａｌ、Ｇｅ－Ｓｅ、Ｇｅ－ｐｄ、Ｓｉ－Ａｇ、Ｓｉ－Ａｌ、Ｓｉ－ｐｄ、Ｓｉ－Ｃｕ、ｓｉｃ－Ａｌ、Ｓｉ＿３Ｎ＿４－Ａ１）晶化后形成的图形进行的分形研究，内容包括分形形成的实验规律、根据微结构电镜观测结果提出的随机逐次成核模型、以及对分形晶化进行的计算机模拟。     

弹道电子发射显微术的研究进展

弹道电子发射显微镜（ＢＥＥＭ）是在扫描隧道显微镜基础上发展起来的用于界面无损探测的分析仪器。在描述这种仪器的基本工作原理的基础上，介绍了几种理论模型，并以Ａｕ－ｎ－ｓｉ（１００），Ａｕ／ｎ－ＧａＡ（１００）两种界面系统为例，对实验结果进行了解释，介绍了用这种仪器对金属／半导体界面势垒的探测方法和分析方法。     

非晶态半导体／金属薄膜的分形晶化

本文综述非晶态半导体／金属薄膜退火过程中金属诱导非晶态半导体晶化的研究,综述对若干非晶态半导体与金属组成的薄膜（Ｇｅ－Ａｕ、Ｇｅ－Ａｇ、Ｇｅ－Ａｌ、Ｇｅ－Ｓｅ、Ｇｅ－ｐｄ、Ｓｉ－Ａｇ、Ｓｉ－Ａｌ、Ｓｉ－ｐｄ、Ｓｉ－Ｃｕ、ｓｉｃ－Ａｌ、Ｓｉ＿３Ｎ＿４－Ａ１）晶化后形成的图形进行的分形研究,内容包括分形形成的实验规律、根据微结构电镜观测结果提出的随机逐次成核模型、以及对分形晶化进行的计算机模拟。     

丝光沸石的Monte Carla研究：Ⅱ.脱铝丝光沸石的骨架硅,铝分布

以马尔可夫链近似模拟线光沸石脱铝过程，用ＭｏｎｔｅＣａｒｌｏ方法计算脱铝丝光沸石中骨架Ｓｉ－Ａｌ近邻分布｛Ｓｉ（ｎ－Ａｌ）；ｎ＝０－４｝和Ａｌ－Ａｌ次部分布｛Ａｌ（ｍ－Ａｌ）；ｍ＝０－３｝随铝浓度的演化。为使Ｓｉ－Ａｌ近邻分布与对脱铝丝光沸石样品的＾２＾９ＳｉＭＡＳＮＭＲ观测相符，而得到丝光沸石弱酸铝易于解脱的结论，这个结构与八面沸石弱酸铝易于解脱相反。根据计算丝光沸石脱铝的开始阶段，强酸中心...     

电场对Au—Ag薄膜结构影响的AFM和VAXPS研究

利用原子力显微镜（ＡＦＭ）和变角Ｘ射线光电子谱（ＶＡＸＰＳ）技术研究了Ａｕ－Ａｇ／ＳｉＯ２体系在直流电场作用下，Ａｕ，Ａｇ电迁移的特点及所引起的薄膜结构的变化，观察到较低温度下Ａｕ，Ａｇ聚集状态的显著变化，发现电迁移过程中Ａｕ－Ａｇ薄膜与ＳｉＯ２基底之间存在界面化学反应，膜层中Ａｕ，Ａｇ，Ｓｉ等元素的化学状态发生了相应的变化，这些结构表明ＳｉＯ２表面上Ａｕ－Ａｇ复合薄膜电迁移不只是一个水平方向的扩     

掺铁InP肖特基势垒增强InGaAs MSM光电探测器

采用ＬＰ－ＭＯＶＰＥ方法及常规器件工艺制成了ＩｎＰ：Ｆｅ肖特基势垒增强ＩｎＧａＡｓＭＳＭ光电探测器。用自建测试系统对其直流和瞬态特性进行了测试，测试结果表明，器件的击穿电压大于１０Ｖ，２Ｖ偏压下暗电流为１７０ｎＡ，对应的暗电流密度约为３ｍＡ／ｃｍ２；瞬态响应中上升时间ｔｒ为２１ｐｓ，半高宽ＦＷＨＭ为７５ｐｓ。     

BiPbSbSrCaCuO非晶态及热处理对其影响

本工作用正电子湮没谱术（ＰＡＳ），Ｘ射线衍射谱（ＸＲＤ），示差热分析（ＤＴＡ），扫描电镜显微术（ＳＥＭ）和交流磁化率（Ｘａｃ）研究了Ｂｉ－Ｐｂ－Ｓｂ－Ｃａ－Ｃｕ－Ｏ非晶态和后续热处理的影响。结果表明：所研究的非晶态晶化温度Ｔｃ－４５０－４７０℃，当热处理温度Ｔａ＜Ｔｃ，非晶太经低温结构弛豫和高温弛豫。当Ｔａ＞Ｔｃ，在晶态多相体系中随温度升高发生低ｎ相向高ｎ相的转变，８５０℃退火可使超导转变温度...     

Y-123相超导体Cu位掺Sn的XPS研究

本文利用Ｘ射线光电子能谱实验技术（ＸＰＳ）研究了Ｙ－１２３相Ｃｕ位掺Ｓｎ超导体的电子结构．实验发现在掺杂量较小时，样品的芯能级谱都变化很小，特别是Ｃｕ２ｐ３／２谱，其卫星峰与主峰的强度比Ｉｓ／Ｉｍ还略有升高；但当掺杂量较大时，芯能级谱的变化方向与掺杂浓度较低时相反，Ｃｕ２ｐ３／２谱的Ｉｓ／Ｉｍ出现了明显下降．电子结构上的这种变化与Ｓｎ掺杂对超导转变温度的影响相一致．实验结果表明高价态的Ｃｕ确实有益于超导，杂质Ｓｎ主要占据在Ｃｕ－Ｏ链上Ｃｕ的格位上．     

少子陷阱特性和铍硅共注半绝缘GaAs空穴陷阱

用深能级瞬态谱（ＤＬＴＳ）技术测量了高温退火的Ｂｅ和Ｓｉ共注入的ＬＥＣ半绝缘ＧａＡｓ（无掺杂）。在多子脉冲作用下的Ａｌ／Ｂｅ－Ｓｉ共注ＬＥＣＳＩＧａＡｓ肖特基势垒中，观测到Ｅ₀₁（０．２９８），Ｅ₀₂（０．３４１），Ｅ₀₃（０．５５５）和Ｅ₀₄（０．８２１）等四个电子陷阱以及两个主要的少子（空穴）陷阱Ｈ＇₀₃（０．５４）和Ｈ″₀₃（０．５７）。两少子陷阱的ＤＬＴＳ信号具有若干特点，比如它们的ＤＬＴＳ·峰难于通过增宽脉冲达到最大高度；以及峰的高度强烈地依赖于温度等。这些现象可以用少子陷阱的少子俘获和热发射理论进行合理地解释。鉴于用ＤＬＴＳ技术测量这种陷阱的困难，我们用恒温电容瞬态技术测定它们的空穴表观激活能分别为０．５４和０．５７ｅＶ。它们是新观测到的和Ｂｅ－Ｓｉ共注ＳＩＧａＡｓ有关缺陷。 关键词：     

Investigation on the barrier height and inhomogeneity of nickel silicide Schottky

The apparent Schottky barrier height (SBH) of the nickel silicide Schottky contacts annealed at different temperatures was investigated based on temperature dependence of I-V characteristic. Thermionic emission-diffusion (TED) theory, single Gaussian and double Gaussian models were employed to fit I-V experimental data. It is found the single Gaussian and double Gaussian SB distribution model can give a very good fit to the I-V characteristic of apparent SBH for different annealing temperatures. Also, the apparent SBH and the leakage current increase with annealing temperatures under reverse voltage. In addition, the homogeneity of interfaces for the samples annealed at temperatures of 500 and 600 °C is much better than that of the samples annealed at temperatures of 400, 700, and 800 °C. This may result from the phase transformation of nickel silicide due to the different annealing temperatures and from the low Schottky barrier (SB) patches.     

Nonideality of Au/Si and Au/GaAs Schottky barriers due to process-induced defects

A mechanism of local lowering of the Schottky barrier height (SBH) is proposed, which causes nonideality in nearly ideal Au/n-Si and Au/n-GaAs Schottky barriers. Positively ionized defects generated by the process very close to the interface induce electrons in the metal-induced gap states (MIGS) and lower the SBH locally. The spatial density distribution of the ionized defects obtained from the SBH distribution is determined by the unique interaction with the MIGS. The defects are considered to have the negative-U property and are neutralized at very close positions to the MIGS. The potential distributions close to the interface have a considerable potential drop due to the large defect density. These inhomogeneous potentials are coincident with the energy level scheme of the defect identified as the defect causing the nonideality. This defect is Si self-interstitial in Au/Si SB, and As antisite in Au/n-GaAs SB. This MIGS with process-induced defect model supersedes the previously proposed two major Fermi level pinning models. The mystery of the T₀ effect is solved. The thermionic-field emission current taking place in the strong electric field has influence on the I-V characteristics at low temperatures. Regarding the C-V characteristics of Au/Si SB, the observed extra capacitance under the forward bias is an experimental evidence in accordance with the proposed model.     

Pt interlayer effects on Ni germanosilicide formation and contact properties

Ni and Ni(Pt) germanosilicide formation and their contact properties on n-type epitaxial Si_0.84Ge_0.16 have been studied in this work. It is revealed that compared to NiSi, NiSiGe has enhanced phase stability but worse morphology stability. It is also found that Pt incorporation in germanosilicidation improves the morphology of the germanosilicide film. The Schottky contact characteristics of NiSiGe and Ni(Pt)SiGe on n-SiGe were evaluated by current–voltage (I–V) technique at room temperature. NiSiGe/n-SiGe contact shows a Schottky barrier height (SBH) of 0.65 eV with little difference from that of NiSi/n-Si contact. However, the contact shows a reduced SBH with a markedly increased ideality factor and leakage current when annealing temperature increases to 650 °C, indicating thermal degradation of the contact quality. Pt incorporation increases the SBH to 0.73 eV. In addition, its diode parameters such as SBH, ideality factor, and reverse leakage show better conformity during the whole annealing temperature range (from 450 to 650 °C). Therefore, it is concluded that Pt interlayer between Ni and SiGe can modulate the barrier height of Ni germanosilicide and improve its contact properties.     

The effects of annealing on Au/pyronine-B/MD n-InP Schottky structure

Thin film of non-polymeric organic compound pyronine-B has been fabricated on moderately doped (MD) n-InP substrate as an interfacial layer using spin coating technique for the electronic modification of Au/MD n-InP Schottky contact. The electrical characteristics have been determined at room temperature. The barrier height and the ideality factor values for Au/pyronine-B/MD n-InP Schottky diode have been obtained from the forward bias I-V characteristics at room temperature as 0.60 eV and 1.041; 0.571 and 1.253 eV after annealing at 100 and 250 °C, respectively. An increase in annealing temperature at the Au/n-InP Schottky junction is shown to increase the reverse bias leakage current by about one order of magnitude and decrease the Schottky barrier height by 0.027 eV. Furthermore, the barrier height values for the Au/pyronine-B/MD n-InP Schottky diode have also been obtained from the C-V characteristics at room temperature as 1.001 and 0.709 eV after annealing at 100 and 250 °C, respectively. Finally, it was seen that the diode parameters changed with increase in the annealing temperature.     

Identity of defect causing nonideality in nearly ideal Au/n-Si Schottky barriers

We have proposed a mechanism of nonideality, i.e., the temperature dependence of the ideality factor, in nearly ideal Au/n-Si Schottky barriers. Because of the nature of metal-induced gap states, positively ionized defects close to the interface are considered to cause local lowering of the Schottky barrier height (SBH) due to downward bending of the energy band. These positively charged defects become neutralized in equilibrium with the Fermi level due to the band bending, when they are very close to the interface. However, because the SBH lowering disappears by the neutralization of donor, the energy level of donor with a usual energy level scheme rises above the Fermi level after the neutralization. This contradiction to the equilibrium neutralization is resolved by Si self-interstitial with a large negative-U property, which is generated by the fabrication process. The energy level of the donor estimated from the SBH lowering is in good agreement with that of theoretical calculation of Si self-interstitial. Thus, the defect is concluded to be the Si self-interstitial, which is distributed to more than 10 Å depth from the interface.     

钛－镍－硅固相反应形成的镍硅化物/n-硅(100)接触的I-V-T研究

在不同退火温度下，有一薄层钛覆盖层的镍－硅经过固相反应生成了镍硅化物/n-硅(100)接触，研究了其在80K到室温的电流－电压（I-V）特性。低温I-V曲线在低偏压区的电流显著地比传统的热电子发射（TE）模型预计的要大。用基于Tung的夹断模型简化得到的双肖特基势垒模型分析了实测的I-V曲线，从中可以得到肖特基势垒不均匀性的量度。较高温度退火导致较大的势垒不均匀性，意味着硅化物薄膜均匀性的变坏。钛覆盖薄层可以稍微提高硅化镍的相转变温度，以及形成的一硅化镍的热稳定性。     

Barrier lowering and leakage current reduction in Ni-AlGaN/GaN Schottky diodes with an oxygen-treated GaN cap layer

We report on the effect of oxygen annealing for GaN surface on the Schottky barrier configuration and leakage current in Ni-AlGaN/GaN Schottky barrier diodes. After oxygen annealing, their turn-on voltage and reverse-bias leakage current characteristics are significantly improved due to a reduction in the Schottky barrier height (SBH) and suppression in the surface states respectively. Interface state density extracted from the Terman method was reduced by 2 orders of magnitude. X-ray photoelectron spectroscopy measurements show that the oxygen annealing induces Ga₂O₃ on the GaN surface. The formation of Ga₂O₃ reduces the interface state density as well as lowers the SBH through the modification of hybridized metal induced gap states.     

Double threshold behaviour of I－V characteristics of CoSi2/Si Schottky contacts

The forward current－voltage (I－V) characteristics of polycrystalline CoSi₂/n-Si(100) Schottky contacts have been measured in a wide temperature range. At low temperatures (≤200K), a plateau-like section is observed in the I－V characteristics around 10^-4A·cm^-2. The current in the small bias region significantly exceeds that expected by the model based on thermionic emission (TE) and a Gaussian distribution of Schottky barrier height (SBH). Such a double threshold behaviour can be explained by the barrier height inhomogeneity, i.e. at low temperatures the current through some patches with low SBH dominates at small bias region. With increasing bias voltage, the Ohmic effect becomes important and the current through the whole junction area exceeds the patch current, thus resulting in a plateau-like section in the I－V curves at moderate bias. For the polycrystalline CoSi₂/Si contacts studied in this paper, the apparent ideality factor of the patch current is much larger than that calculated from the TE model taking the pinch-off effect into account. This suggests that the current flowing through these patches is of the tunnelling type, rather than the thermionic emission type. The experimental I－V characteristics can be fitted reasonably well in the whole temperature region using the model based on tunnelling and pinch-off.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.