宽带CDMA数字中频接收机

本文建立了宽带CDMA的阻塞模型,在此基础上,提出一种数字中接收机的实现方案,并对主要电路的性能要求作了分析,给出了关键器件设计与实现的方法。     

中频数字接收机的工程实现

介绍了一种数字中频接收机的工程实现办法,该数字接收机具有较大的动态范围,较高的I、Q输出精度,采用的是带通采样法进行单路中频采样,数字滤波法进行数字正交相干检波。介绍了传统模拟接收机的不足和数字接收机的优点,讨论了两种数字正交相干检波方法,研究了带通欠采样的原理;根据本课题的技术指标要求进行了设计工作,设计了中频放大电路和AGC控制电路,进行了AD采样和数字相干检波部分的设计工作。结果表明,两路信号幅度的误差≤0.5%,相位的正交误差≤0.5°,满足了设计指标要求,技术指标明显优于传统的模拟接收机。     

多路低中频数字化接收机并行处理设计

提出了一种多路低中频数字化接收机并行处理的实现方法。该方法以拓扑结构精致、工作时序简单的并行数字信号处理器子画列为基础,根据工作时序约束议程来计算DSP子阵列的处理能力,构建多路低中频数字化接收处理机,使接收机的设计得以简化,最后具体介绍了如何应用该方法。     

接收机直接中频采样的方法与实现

对传统中频信号处理进行分析,在窄带信号采样定理的基础上得出了利用现有的高速数字器件可以实现直接进行中频信号数字处理的几种结构,最后给出了在实际中可行的通用中频采样方案。     

数字接收机中频电路的研究

直接数字式频率合成（DDS）技术是一种全数字频率合成技术，其特殊的原理和结构使它具有多种调制能力。本文介绍了DDS在卫星通信数字接收机中频电路中的应用，并给出了其实际的设计方案。     

基于FPGA的中频数字化接收机系统实现

介绍了一种基于附的中频数字化接收机的硬件设计，给出总体设计方案，主要部件及参数的设计方法，讨论了高阶腿滤波器在附中采用分布式算法实现。最后测试结果表明此系统合理可靠且满足设计要求。     

中频接收机数字化设计中的几个关键问题

本文以短波数字化中频接收机为例,讨论中频数字化接收机设计的几个关键问题,包括收机前端增益的确定、数字和模拟AGC门限的选取、二中频频率与取样率的选择、以及接收机信噪比（SNR）的核算。     

低功耗接收机中频子系统芯片AD607

ＡＤ６０７为３Ｖ低功耗接收机中频子系统芯片,带有自动增益控制（ＡＧＣ）的接收信号强度指示（ＲＳＳＩ）功能。该器件可用于ＧＳＭ,ＣＤＭＡ,ＴＤＭＡ和ＴＥＴＲＡ等通信系统的接收机、卫星终端和便携式通信设备中,文中介绍了ＡＤ６０７的原理、特点与性能参数,并重点介绍了应用设计中的几个问题和典型应用电路．     

雷达数字中频接收机设计

本文首先介绍了目前较为流行的几种数字接收机结构，分析了中频采样数字接收机关键技术，并给出了基于目前器件技术水平的工程化数字中频接收机实现方案     

基于FPGA的某ISAR成像数字中频接收机实现

根据软件无线电理论设计了一种应用于逆合成孔径雷达成像系统的数字化中频接收机,提出了一种可变抽取因子的数字下变频方案,可以大大提高接收机系统的灵活性。该数字化中频接收机最终在Xilinx Virtex-6 FPGA上实现,可保证在不发生频谱混叠的情况下将中心频率为105 MHz,带宽0~20 MHz之间可变的中频信号下变频为低数据率的数字零中频信号。系统提供2~84之间共14种不同的抽取因子,可以根据输入信号带宽进行配置。测试结果表明,该系统设计正确且无虚假动态范围大于90 d B。     

电子组装中焊点的失效分析

焊点的失效分析是电子产品质量和可靠性保证体系的重要组成部分。本文首先概述了焊点的失效机理,主要包括热致失效、机械失效、电化学失效。在此基础之上,综述了焊点失效分析的基本流程与各类失效分析方法,并对无铅条件下该领域的研究作了简要评述。     

BGA焊点失效分析

文章通过对BGA焊点失效实例的分析,介绍了对BGA焊接失效的分析过程与分析方法,同时得出了引起该BGA焊点失效的主要原因,展现了失效分析对BGA封装的质量控制作用。     

细间距器件焊点桥接研究

根据能量最小原理建立SMT焊点形态预测的三维数学模型,模拟了焊点桥接成形过程并对模拟结果进行实验验证。通过分析模拟结果,对SMT焊点钎料桥接机理进行理论研究。     

一种用于GPS接收机的低噪声放大器

针对GPS接收机低功耗、低噪声、高增益的要求,采用功率限制下噪声匹配技术、阻抗匹配技术和电源复用技术,设计了一款可应用于GPS接收机的单端输入差分输出低噪声放大器,减少了巴伦损耗。采用SMIC 0.13 SymbolmAm CMOS RF工艺和全定制集成电路设计方法,工作频率为1575 GHz,对电路进行版图后仿真。仿真结果表明,该低噪声放大器在1.2 V电源电压下,功耗为4.8 mW,增益为22.65 dB,噪声系数为1.388 dB。     

A New Dynamic-Copula Based Correlated Degradation Feature for Remaining Useful Life Prediction

Feature extraction plays an important role in Remaining useful life (RUL) prediction. Feature extraction mainly depends on the performance degradation signal in the previous study, in which the dynamic correlations among different signals are ignored, and the RUL accuracy is affected. A new dynamic feature based on the correlations of the performance degradation signal is proposed. First, dynamic correlation coefficients are calculated by copula function as the multivariate correlation performance degradation features. Second, the random effect Wiener process is used for RUL prediction based on the new features, and the maximum likelihood estimation is adopted to calculate the unknown parameters of the Wiener process. Finally, the RUL estimation for solder joints under vibration load is carried out compared with the quantile and quantile-Principal component analysis (PCA) mixed feature extraction method. The research results show that the proposed method improved the prediction accuracy of RUL.     

Partially-constrained thermomechanical fatigue of eutectic tin-bismuth/copper solder joints

Small bimetallic load-frames with reference assembly stiffness, k′, and fully-constrained shear strain, γ_fc, were used to simulate the thermo-mechanical conditions experienced by eutectic Bi-42wt.%Sn-to-Cu solder joints. Shear stress and strain were induced in the solder joint by a 45-minute, 0 to 100°C temperature cycle and were calculated from the assembly temperature, joint configuration, and measured elastic strain in the load-frame. Early in cycling, a hysteresis loop representing the maximum stress range and minimum strain range was reached. As damage accumulated in the solder, the stress range decreased and the strain range increased. The TMF life of the joints, defined by the load range drop, Φ, as a function of k′ and γ_fc, can be determined, defining an effective plastic strain range which allows data for various stiffnesses and thermal expansion mismatches to be summarized on a single Coffin-Mansion plot. The effective plastic strain range also provides an important link to conventional low cycle fatigue (LCF) data taken from an infinitely stiff load-frame.     

电子封装与组装焊点钎料合金力学行为研究进展

随着面封装技术的持续发展,古老的软钎焊技术被赋予新使命,Sn基钎料焊点被广泛用于实现芯片与基板之间以及基板与印制电路板之间的电气互连。目前电子封装与组装焊点的失效成为了影响电子产品可靠性的关键问题。这就需要系统地表征焊点服役条件下Sn基钎料合金的力学行为,并刻画其本构关系。本文从本构模型、寿命预测模型及断裂机制三个角度回顾总结了焊点Sn基钎料合金的力学行为方面的研究结果。     

62Sn－36Pb－2Ag焊点的可靠性及热疲劳位错亚结构的演化分析

采用热疲劳试验分析了表面封装焊点的可靠性。讨论了不同的元器件及基片镀层工艺对焊点可靠性的影响，初步探讨了热疲劳过程中位错亚结构的变化及焊点的失效机理。结果表明：金属间化合物对焊点失效有重要影响．镀Ａｕ焊点热疲劳裂纹萌生于ＡｕＳｎ４金属间化合物并在其中扩展，镀Ｎｉ／Ａｕ焊点热疲劳过程中位错在ＡｕＳｎ４粒子处塞积，引起ＡｕＳｎ４／β－Ｓｎ界面应力集中，导致热疲劳裂纹沿ＡｕＳｎ４／β－Ｓｎ界面萌生，萌生后的裂纹在β－Ｓｎ相中扩展，ＴＥＭ观察也证明β－Ｓｎ相中位错密度较高。     

IGBT RBSOA失效分析及改善方案

一种绝缘栅双极晶体管模块在做反向偏置安全工作区测试时,器件在较低的关断电流下就发生了损坏。失效分析显示失效区的位置靠近栅极条区。模拟显示失效区处元胞结构并非对称,而正常元胞结构是对称的,由此造成了该处元胞的闩锁电流密度比对称结构元胞的闩锁电流密度低。因此,元胞结构的一致性不好是RBSOA关断电流低的原因。通过修改版图设计,使工作区元胞结构一致。对改版后的芯片封装后进行RBSOA测试,结果显示安全关断电流有明显提高。     

Influence of microstructure size on the plastic deformation kinetics, fatigue crack growth rate, and low-cycle fatigue of solder joints

The influence of microstructure size on the plastic deformation kinetics, fatigue crack growth rate and low-cycle fatigue of eutectic Sn-Pb solder joints is reviewed. The principal microstructure feature considered is the average eutectic phase size d=(d_Pb+d_Sn)/2. The effect of an increase in reflow cooling rate (which gave a decrease in d) on the flow stress and on fatigue life was irregular at 300K, depending on the stress or strain level and cooling rate. In contrast, a consistent increase in fatigue life with decrease in d occurred for thermomechanical cycling between −30° and 130°C. Constitutive equations for plastic deformation and fatigue crack growth rate are presented which include the microstructure size. It appears that the rate-controlling deformation mechanism is the intersection of forest dislocations in the Sn phase. The mechanism for both static and dynamic phase coarsening appears to be grain boundary diffusion with a t^1/4 time law. Some success has been achieved in predicting the cyclic stress-strain hysteresis loops and fatigue life, including the influence of the as-reflowed microstructure size and its coarsening. Additional definitive studies are however needed before we can accurately predict the fatigue life of solder joints over the wide temperature range and conditions experienced by electronic packages.