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本文介绍一种新型的取样锁定电压比较器ZJ03的设计。一般的电压比较器由多级直接耦合放大器组戒,其精度(灵敏度)主要取决于总电压增益,响应速度取决于总带宽,精度与响应速度是矛盾的,难以实现高速和高精度。ZJ03在体制上有重要的改进,它含有一级受控的正反馈放大器,使精度主要取决于输入失调电压,与总带宽几乎没有关系,可实现高速和高精度。在ZJ03的设计中,采用了容差扩展、中心设计和电平自适应技术,提高了产品性能的一致性和成品率。 相似文献
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Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator 总被引:1,自引:0,他引:1
A high-sensitivity voltage-to-frequency converter (VFC) using an all-MOS voltage window comparator is presented in this work. The circuit is composed of one voltage-to-current converter, one charge and discharge circuit, and one all-MOS voltage window comparator. The input voltage is converted into a current which in turn triggers the charge and discharge circuit, where a built-in capacitor is driven. The voltage window comparator monitors the variated voltage on the capacitor and generate an oscillated output of which the vibration frequency is linearly dependent to the input voltage. In this way, the worst-case linear range of the output frequency of the proposed VFC is 0-55.40 MHz verified by simulations given a 0-0.9 V input range. The physical measurement of the proposed VFC shows a 0-52.95 MHz output frequency given a 0-0.9 V input range. The error in linearity is better than 8.5% while the power dissipation is merely 0.218 mW. 相似文献
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设计一种中速高精度模拟电压比较器,该比较器采用3级前置放大器加锁存器和数字触发电路的多级结构,应用失调校准技术消除失调,应用共源共栅结构抑制回程噪声干扰;应用数字触发电路获得高性能数字输出信号,设计采用0.35μm5VCMOS工艺实现一个输入电压2.5V、速度1MS/s、精度12位的逐次逼近型MD转换器。Hspice仿真结果表明:在5V供电电压下,速度可达20MHz,准确比较0.2mV电压,有效校准20mV输入失调,功耗约1mW。 相似文献
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本文提出了一种基于平衡态的动态比较器失调电压分析设计技术。以两支路电压电流相等的平衡态为分析基础,通过在复位电压跳变时刻引入补偿电压的方法,逐一分析了动态比较器各晶体管参数对总体失调电压的影响,建立了失调电压的数学模型;采用Chartered 0.18um1P6M工艺对Lewis-Gray型动态比较器进行了电路和版图设计,并利用可快速提取失调电压的定步长仿真方法对其失调电压进行了仿真,结果表明所提出的分析方法可以相对准确的估算失调电压。以该分析方法为基础,本文还提出一种基于总体失调电压影响权重的晶体管分组优化方法,在保证总体面积不变的条件下,可将失调电压有效降低50%以上。经流片测试结果表明,本文所提出的分析和优化方法可应用于高速高精度系统中比较器的设计。 相似文献
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一种CMOS动态闩锁电压比较器的优化设计 总被引:3,自引:0,他引:3
提出了一种应用于Pipeline ADC和Sigma-Delta ADC中改进的动态闩锁电压比较器。采用0.35μm CMOS N阱工艺设计,工作于2.5V单电源电压。通过详细的分析和优化,使比较器具有较小的输入失调电压和踢回噪声,仿真结果表明它的输入失调电压分布范围为28.6mV,最高工作频率200MHz、功耗230μW。 相似文献
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The design and characterization of a low-voltage, high-speed CMOS analog latched voltage comparator based on the flipped voltage follower (FVF) cell and input signal regeneration is presented. The proposed circuit consists of a differential input stage with a common-mode signal detector, followed by a regenerative latch and a Set-Reset (S-R) latch. It is suitable for successive-approximation type’s analog-to-digital converters (ADC), but can also be adapted for use in flash-type ADCs. The circuit was fabricated using 0.18 μm CMOS technology, and its measured performance shows 12-bit resolution at 20 MHz comparison rate and 1 V single supply voltage, with a total power consumption of 63.5 μW. 相似文献
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一种中速高精度模拟电压比较器的设计 总被引:1,自引:0,他引:1
设计一种中速高精度模拟电压比较器,该比较器采用3级前置放大器加锁存器和数字触发电路的多级结构,应用失调校准技术消除失调,应用共源共栅结构抑制回程噪声干扰;应用数字触发电路获得高性能数字输出信号,设计采用0.35μm 5 V CMOS工艺实现一个输入电压2.5 V、速度1 MS/s、精度12位的逐次逼近型A/D转换器.Hspice仿真结果表明:在5 V供电电压下,速度可达20 MHz,准确比较0.2 mV电压,有效校准20 mV输入失调,功耗约1 mW. 相似文献
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近年来,国内的投运发电机组中单机容量在600MW以上的越来越多,配套的高压电动机容量呈急剧上升之势,大都在2000KW以上,甚至部分电动机超过10000KW,对周期检修工作提出了更高的要求。传统的周期性检修是在现场就地进行的,已无法满足检修质量的要求,一定程度上威胁了机组安全运行。本文介绍了新乡华新电力集团股份公司高压电动机精密检修与深度保养的应用,有效的提高了电动机的各项性能,实现了安全效益与经济效益的双提升。 相似文献
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文中介绍了一种基于Proteus的压控变色彩灯控制电路的开发过程,电路主要包括直流稳压电源、基准信号产生电路、电压放大比较电路3个部分,并对设计电路利用Proteus软件进行仿真调试,仿真结果显示可以实现变光变色彩灯功能. 相似文献
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Fadi Nessir Zghoul Suat U. Ay Ahmad Ababneh 《International Journal of Electronics》2016,103(12):1965-1983
Gain and offset represent two important measures to determine the accuracy of a comparator. Thus, analysis on these parameters is very important as they offer designers better understanding of the circuit and allow exploring trade-offs during design. In this paper, two methods were presented to derive a set of design equations that describe the gain, sensitivity, offset, and systematic mismatches observed in typical comparator circuits. A three-stage, fast complementary metal-oxide semiconductor (CMOS) comparator structure is analysed and simulated in order to validate the proposed methods. A 0.13 μm CMOS technology is used for simulations with 1.5 V supply voltage. Bisection theorem was used for gain and sensitivity analysis. Simulation results show that high gain improvement can be possible by using the design equations. The input offset voltage, due to mismatch in the width of the metal oxide semiconductor field-effect transistors (MOSFET) (W) and mismatches in the threshold voltages of the N and P type MOSFETs (VTHN, VTHP), is analysed using a proposed balanced method. The same comparator structure is used for the input offset voltage analysis. Simulations show that an offset improvement can be achieved following the design equations found through the proposed method. 相似文献
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目前的数模转换器本质上是基于权电流的工作原理,D/A信号电流均值Iave随其数字信号位数作几何级数增长,等于其最小权电流Iunit的2^(n-1)倍。而对偶权电阻链式DAC,用权电压的方式进行D/A转换,其D/A信号电流就恒等于链电流Icha,仅为权电流式DAC的信号电流均值的1/2^(n-1)数量级。其原理是: n对对偶权电阻组成的电阻链,保证了链电流恒定;令数字信号控制输出点至零电位的总权电阻,则可以直接控制输出点的总权电压,使数字信号直接变成权电压信号之和;由此实现了以下目标:①总电流小于0.2mA;②总功耗小于2mW;③可采用多级结构实现18位转换;④芯片面积比分段电流舵型DAC小一个数量级;⑤误差仅取决于单位电阻的误差,所以小于分段电流舵型 DAC的误差;⑥转换时间仅一次开或关的动作时间,速度不低于目前的DAC。 相似文献