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1.
In this paper, we present two nano-fabrication technologies that provide effective approaches for low-cost, large-scale manufacturing of nano-gratings. One grating is fabricated on polymethylmethacrylate (PMMA) with the pitch of 500 nm, and height of 2000 nm, and the other is fabricated on silicon wafer with the pitch of 666 nm, and height of 200 nm. High aspect ratio PMMA nanostructures which use X-ray lithography and electron beam lithography (EBL) are reported in this paper. These gratings can be used as molds, making it possible for industrial nano-imprinting technology to significantly cut cost and shorten process time.  相似文献   

2.
In this study we fabricated a silicon-based stamp with various microchannel arrays, and demonstrated successful replication of the stamp micro-structure on poly methyl methacrylate (PMMA) substrates. We used maskless UV lithography for the production of the micro-structured stamp. Thermal imprint lithography was used to fabricate microfeatured fluidic platforms on PMMA substrates, as well as to bond PMMA lids on the fluidic platforms. The microfeature in the silicon-based (silicon wafer coated with SU-8) stamp includes microchannel arrays of approximately 30 μm in depth and 5 mm in width. We produced various channels without pillars, as well as with SU-8 pillars in the range of 50–100 μm wide and 6 μm in height. PMMA discs of 1 mm thickness were utilized as the molding substrate. We found 10 kN applied force and 100 °C embossing temperature were optimum for transferring the micro-structure to the PMMA substrate.  相似文献   

3.
Nanoimprint lithography is a high-resolution, high-throughput and cost-effective nanopatterning technology. However, the overlay accuracy is lagging behind the resolution because of the high cost of mechanical precision. We have built an inexpensive stand-alone machine based on the wafer bowing nanoimprint process, and demonstrated single-point overlay of two transferred pattern layers with an accuracy of ≤60 nm.  相似文献   

4.
A simple and flexible technique aimed to generate large-area periodic nano-dot array features on metal thin films by laser interference lithography (LIL) has been demonstrated. In this paper, gold nano-dot arrays with a period of ∼450 nm and a dot diameter of ∼100 nm on quartz substrates coated with a gold film of 50 nm thick were fabricated. Multiple enhanced transmission peaks were observed in this patterned film. In addition to the characteristic peak of the gold surface plasmon resonance around 500 nm, multiple shoulder peaks that range from 550 to 700 nm were also observed in the nano-chain array structures. These shoulder peaks disappeared after thermal annealing. It was found that the nano-dots became smaller and well-separated nano-balls under the high temperature annealing process. These nano-structures have potential applications in solar cell, nano-lithography and biosensing.  相似文献   

5.
In order to investigate the interaction of organic molecules with metals by means of Raman spectroscopy, special substrates were designed which combine interference and surface-enhancement mechanisms. Triangular shaped silver nanostructures with an angle bisector and a height of about 80 nm were prepared by nanosphere lithography on silicon substrates with a 100-nm oxide layer. Utilizing these substrates the dependence of the Raman signal intensity on the thickness of copper phthalocyanine (CuPc) was studied in the range from few percentages of a monolayer coverage up to 80 nm using an in situ setup. At an excitation in resonance with the plasmons of the nanostructures (2.6 eV) an increase of the signal was observed during film growth. Contrary to that, excitation at 1.92 eV in resonance with the CuPc absorption band leads to a strongly enhanced Raman signal for submonolayer coverage which hardly changes with the CuPc film thickness in the ultra-low coverage regime.  相似文献   

6.
A new process in which near-field scanning optical lithography (NSOL) is combined with anisotropic wet-etching of (110) silicon is developed for the fabrication of high-aspect-ratio (HAR) nanochannels. In the proposed process, NSOL is applied to produce nanopatterns on a commercial positive photoresist as in an optical lithography. The use of a commercial photoresist is an advantage of this process because it allows the direct application of many photoresists currently available without pretreatment, saving cost and time. A bare (110) silicon wafer coated with a thin Si3N4 layer, of approximately 10 nm thickness, is used as the sample and the photoresist is spincoated on the Si3N4 layer to a thickness of about 50–80 nm. Nanopatterning of the photoresist using a contact mode NSOL, transfer of the photoresist pattern onto the Si3N4 layer by reactive ion etching, and anisotropic wet etching of the silicon wafer using the patterned Si3N4 layer as an etch mask, lead to the intended HAR nanostructures. Fabrication of silicon nanochannels with a channel width below 150 nm and an aspect ratio greater than 3 is demonstrated. PACS 81.16.Nd; 81.16.Rf; 85.40.Hp  相似文献   

7.
This study presents the wetting properties, including hydrophilicity, hydrophobicity and anisotropic behavior, of water droplets on the silicon wafer surface with periodical nanopatterns and hierarchical structures. This study fabricates one- and two-dimensional periodical nanopatterns using laser interference lithography (LIL). The fabrication of hierarchical structures was effectively achieved by combining photolithography and LIL techniques. Unlike conventional fabrication methods, the LIL technique is mainly used to control the large-area design of periodical nanopatterns in this study. The minimum feature size for each nanopattern is 100 nm. This study shows that the wetting behavior of one-dimensional, two-dimensional, and hierarchical patterns can be obtained, benefiting the development of surface engineering for microfluidic systems.  相似文献   

8.
22nm极紫外光刻物镜热和结构变形及其对成像性能影响   总被引:1,自引:0,他引:1  
杨光华  李艳秋 《光学学报》2012,32(3):322005-230
极紫外光刻技术(EUVL)是半导体制造实现22nm及其以下节点的下一代光刻技术。在曝光过程中,EUVL物镜的每一面反射镜吸收35%~40%的入射极紫外(EUV)能量,使反射镜发生热和结构变形,影响投影物镜系统的成像性能。基于数值孔径为0.3,满足22nm技术节点的产业化EUV投影物镜,采用有限元分析(FEA)的方法研究反射镜变形分布,再将变形导入光学设计软件CODE V中,研究反射镜变形其对成像特性的影响。研究结果表明:当达到硅片的EUV能量为321mW,产量为每小时100片时,反射镜最高升温9.77℃,通光孔径内的最大变形为5.89nm;若采用相干因子0.5的部分相干光照明,变形对22nm线宽产生6.956nm的畸变和3.414%的线宽误差。  相似文献   

9.
双工件台光刻机中的焦面控制技术   总被引:1,自引:0,他引:1  
李金龙  胡松  赵立新 《光学学报》2012,32(12):1223002
面对可用焦深日益缩短的趋势,高精度的焦面控制技术显得尤为重要。针对双工件台光刻机中采用的焦面控制技术,介绍了基于偏振调制的光栅检焦技术及其测量原理,研究了双工件台光刻机中的调平调焦技术。基于平面拟合、最小二乘法及坐标变换公式推导了曝光狭缝内离焦量计算公式;研究了一种离焦量解耦算法,该算法将曝光狭缝内离焦量解耦为调平调焦机构三个压电陶瓷的独立控制量,并使狭缝曝光场中心在调平调焦运动过程中不发生平移。经仿真分析表明,该算法可用于调平调焦精度优于10 nm 的高精度调焦调平系统, 能满足线宽小于100 nm 投影步进扫描光刻机的需要。  相似文献   

10.
Mao W  Wathuthanthri I  Choi CH 《Optics letters》2011,36(16):3176-3178
We have designed and analyzed a novel (to the best of our knowledge) two-beam interference lithography system for large-area (wafer-level) nanopatterning with enhanced tunability of pattern periodicities. The tunable feature has been achieved by placing two rotational mirrors in the expanded beam paths at regulated angles for a desired period. Theoretical analyses show that the effective pattern coverage area greater than a 4 in. (10 cm) wafer scale is attainable with a 325 nm (30 cm coherence length) HeCd laser and 4 in. (10 cm) mirrors, while the pattern coverage area is restrained by the overruling effects between the optical coherence and mirror size. The experimental results also demonstrate uniform nanopatterns at varying periods (250-750 nm) on 4 in. (10 cm) substrates, validating the theoretical analyses. The tunable two-mirror interferometer will offer a convenient and robust way to prepare large-area nanostructures on a wafer scale with superior tunability in their pattern periodicities.  相似文献   

11.
A study of fused silica micro/nano patterning by focused-ion-beam   总被引:1,自引:0,他引:1  
A dual-beam scanning electron microscopy (SEM)/focused-ion-beam (FIB) system was used to pattern fused silica substrates coated with a 15 nm thin Cr layer. The dimensions of fabricated features together with their surface morphology and profiles were investigated by SEM and atomic force microscopy (AFM). The study demonstrated that with the increase of the ion beam fluence the sputtering rate of the fused silica decreased non-linearly. Also, it was found that initially the sputtering rate increased with the increase of the beam current, after reaching a maximum value, it started decreasing when further beam current increment was performed. Compared with unprocessed areas, the surface finish of the features fabricated by FIB exhibited a significant improvement, and the ion fluence influence on the surface roughness of trenches with low aspect ratios could be considered as negligible. Using a fine beam probe, nano-gratings in the form of grooves with a width down to 54 nm and an aspect ratio higher than three were fabricated. The study showed that FIB machining could be an alternative technology to e-beam lithography for producing fused silica templates for UV nanoimprinting.  相似文献   

12.
Two-dimensional nickel nanodots were prepared using a simple polymer based lithography process on silicon substrates. The nanoporous polysulfone membranes were fabricated using a phase inversion polymerization process. Nickel nanodots were then grown using the polysulfone membrane as a mask. The structures were written by depositing a certain thickness of nickel using electron beam evaporation. After lift off, the structural properties of the samples were studied using atomic force microscopy and grazing incidence X-ray diffractometry. The dots were found to have diameters in the range of 75–120 nm and heights of 3–5 nm. The magnetization and magnetic domain arrangement of the Ni nanodots were analyzed using vibrating sample magnetometer and magnetic force microscopy respectively. The nanodots were found to exhibit excellent soft ferromagnetic properties with a preferred easy axis of magnetization.  相似文献   

13.
This paper presents the optimization of 2D photonic crystals (PCs) onto Si wafers to improve the performance of c-Si PV cells. The objective is to find a structure capable of minimizing the reflectance of the Si wafer in the spectral range between 400 nm and 1000 nm. The study has been limited to PCs that can be fabricated and characterized with the tools and technology available and to dimensions in the same order as the visible light wavelength. PCs with different shapes and dimensions have been simulated and finally the optimum structure has been fabricated by a process based on laser interference lithography (LIL) and reactive ion etching (RIE). This optimized PC presents an average reflectance of 3.6% in the selected wavelength range, without any other material used as antireflective coating. This result means a drastic reduction in comparison with reflectance obtained out of the standard wet etch texturization used in current solar cell manufacturing lines.  相似文献   

14.
We propose a surface long-period grating (LPG) based on a D-shaped photonic crystal fiber (PCF). The D-shaped PCF is fabricated by a side-polishing technique. The surface LPG based on periodic patterns of photoresist (PR) is formed by using the spin-coating and the standard contact lithography methods. Resonant coupling is created by the surface PR-LPG in the D-shaped PCF. The resonant peak shifts to longer wavelength as the ambient index is increased and shifts to shorter wavelength as the temperature is increased. The total wavelength shift is measured to be 122 nm in the refractive index range from 1 to 1.45 and the temperature sensitivity is measured to be −0.3 nm/°C in the temperature range from 30 to 100°C.  相似文献   

15.
In this work patterned ZnO films were prepared at room-temperature by deposition of ∼5 nm size ZnO nanoparticles using confined dewetting lithography, a process which induces their assembly, by drying a drop of ZnO colloidal dispersion between a floating template and the substrate. Crystalline ZnO nanoparticles exhibit a strong visible (525 nm) light emission upon UV excitation (λ = 350 nm). The resulting films were characterized by scanning electron microscopy (SEM) and atomic force microscope (AFM). The method described herein presents a simple and low cost method to prepare crystalline ZnO films with geometric patterns without additional annealing. Such transparent conducting films are attractive for applications like light emitting diodes (LEDs). As the process is carried out at room temperature, the patterned crystalline ZnO films can even be deposited on flexible substrates.  相似文献   

16.
We prepared high quality Au(1 1 1) film on Si wafer through the spin coating and thermal decomposition of a gold ink, spin-coated-and-fired (SCAF) Au film. The X-ray measurements, XRD and pole-figure analysis, showed that the SCAF Au film has a (1 1 1) out-of-plane orientation with a random in-plane orientation. In order to confirm the chemical activity of the SCAF Au film, we demonstrate the formation of patterned structures with the film by using soft lithography technique. The chemical activities of this physically stable SCAF Au film to the alkanethiols were at least equivalent those of physically deposited the Au films. The possibility of the mass production of micro patterned structure with the SCAF Au film was also demonstrated over the wide region on Si wafer by the microcontact lithography. These suggest that the Au film will help the easy fabrication of various nanosized devices on Si wafer and other substrates.  相似文献   

17.
Accurate layer-to-layer alignment, which is of prime importance for the fabrication of multilayer nanostructures in integrated circuits, is one of the main obstacles for imprint lithography. Current alignment measurement techniques commonly involve an image detection process for coarse alignment followed by a grating interference process for fine alignment. Though this kind of two-level alignment system is reasonable for measurement, when it is used in real imprint lithography, it is inconvenient because of the existence of a complex loading system that needs space for alignment. In this study, we propose a fine alignment method using only image detection using grating images and digital moiré fringe technology. In this method, though the gratings are also selected as alignment marks for accurate measurement, they do not interfere with the physics. The grating images captured from the template and wafer are used to measure angular displacement and to form parallel digital moiré fringes. The relative linear displacement between the template and wafer is determined by detecting the spatial phase of parallel digital moiré fringes. Owing to the magnification effect of digital moiré fringes, this method is capable of generating accurate measurements. According to the experimental results, this digital moiré fringe technique is accurate to less than 10 nm. In addition, without a complex grating interference system, this method has the advantage of being easy to operate.  相似文献   

18.
19.
We report a bottom-up process for the fabrication of freestanding nanoscale gratings on silicon-on-insulator (SOI) wafer. Freestanding membrane devices suffer deflection due to the residual stress of the buried oxide layer of SOI wafer. The deflection will affect the device shape and result in the fracture problem for devices fabricated on thin silicon membrane. The bottom-up process is developed to overcome the fabrication issue for thin silicon membrane gratings. The silicon handle layer is removed through back wafer etching of silicon, where the buried oxide layer acts as an etch stop layer. The grating structures are then defined on thin silicon device layer by electron beam lithography and generated by fast atom beam etching. The grating structures are finally released in vapor HF to form the freestanding nanoscale gratings. The freestanding linear/circular gratings, 1,500-nm period grating with the grating width of 200- and 850-nm period grating with the grating width of 100 nm, are successfully achieved on 260-nm silicon device layer.  相似文献   

20.
Direct wafer bonding between high-density-plasma chemical vapour deposited (HDP-CVD) oxide and thermal oxide (TO) has been investigated. HDP-CVD oxides, about 230 nm in thickness, were deposited on Si(0 0 1) control wafers and the wafers of interest that contain a thin strained silicon (sSi) layer on a so-called virtual substrate that is composed of relaxed SiGe (∼4 μm thick) on Si(0 0 1) wafers. The surfaces of the as-deposited HDP-CVD oxides on the Si control wafers were smooth with a root-mean-square (RMS) roughness of <1 nm, which is sufficiently smooth for direct wafer bonding. The surfaces of the sSi/SiGe/Si(0 0 1) substrates show an RMS roughness of >2 nm. After HDP-CVD oxide deposition on the sSi/SiGe/Si substrates, the RMS roughness of the oxide surfaces was also found to be the same, i.e., >2 nm. To use these wafers for direct bonding the RMS roughness had to be reduced below 1 nm, which was carried out using a chemo-mechanical polishing (CMP) step. After bonding the HDP-CVD oxides to thermally oxidized handle wafers, the bonded interfaces were mostly bubble- and void-free for the silicon control and the sSi/SiGe/Si(0 0 1) wafers. The bonded wafer pairs were then annealed at higher temperatures up to 800 °C and the bonded interfaces were still found to be almost bubble- and void-free. Thus, HDP-CVD oxide is quite suitable for direct wafer bonding and layer transfer of ultrathin sSi layers on oxidized Si wafers for the fabrication of novel sSOI substrates.  相似文献   

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