钝化层对背沟道刻蚀型IGZO薄膜晶体管的影响

本文制备了氧化硅、聚酰亚胺以及氧化硅-聚酰亚胺堆叠结构钝化层的非晶铟镓锌氧背沟道刻蚀型薄膜晶体管.与传统氧化硅钝化层薄膜晶体管相比,聚酰亚胺钝化层薄膜晶体管的电学特性大幅提高,场效应迁移率从4.7提升至22.4 cm²/(V·s),亚阈值摆幅从1.6降低至0.28 V/decade,电流开关比从1.1×10⁷提升至1.5×10¹⁰,负偏压光照稳定性下的阈值电压偏移从–4.8 V下降至–0.7 V.电学特性的改善可能是由于氢向聚酰亚胺钝化层扩散减少了背沟道的浅能级缺陷.     

高负偏光照稳定性的溶液法像素级IZTO TFT

采用溶液法制备了铟锌锡氧化物(indium-zinc-tin-oxide, IZTO)有源层薄膜和铪铝氧化物(hafnium-aluminum oxide, HAO)绝缘层薄膜,并成功应用于背沟道刻蚀结构(back-channel etched, BCE)IZTO薄膜晶体管(thinfilm transistor, TFT)像素阵列.利用N2O等离子体表面处理钝化IZTO缺陷态,提升溶液法像素级IZTO TFT器件性能,特别是光照负偏压稳定性.结果表明,经N2O等离子体处理后,器件饱和迁移率提升了接近80%,达到51.52 cm~2·V^–1·s^–1.特别是3600 s光照负偏压稳定性从–0.3 V提升到–0.1 V,满足显示驱动的要求.这进一步说明经N₂O等离子体处理后能够得到良好的溶液法像素级IZTO TFT阵列.     

单壁碳纳米管薄膜光电器件研究

制备了单壁碳纳米管薄膜光电器件, 在偏压和激光器照射条件下可产生净光电流。分别研究了偏置电压、激光功率、照射位置对净光电流的影响。实验表明, 激光照射薄膜中点, 净光电流随着偏压的增大而增大, 随激光功率的增大而趋于饱和, 偏压为0.2 V, 激光功率为22.7 mW时, 净光电流达到0.24 μA;无偏压, 激光照射薄膜不同位置时, 净光电流值关于器件中心对称分布, 照射两端点输出最大光电流, 照射中点输出趋于“0”。经分析, 在偏压和激光照射薄膜中心位置的条件下, 器件因内光电效应可产生净光电流;在无偏压和激光照射的条件下, 因光热电效应可产生净光电流, 并建立了温度模型, 根据单壁碳纳米管的热电势特性推导出了净光电流与光照位置的关系, 其符合实验结果;内光电和光热电效应是光电流产生、变化的原因, 在偏压和激光照射的一般条件下, 净光电流应是两种效应的叠加结果。器件所具有的光电特性使其在光伏器件、光传感器有应用的潜力。     

单壁碳纳米管薄膜光电器件研究

制备了单壁碳纳米管薄膜光电器件,在偏压和激光器照射条件下可产生净光电流。分别研究了偏置电压、激光功率、照射位置对净光电流的影响。实验表明,激光照射薄膜中点,净光电流随着偏压的增大而增大,随激光功率的增大而趋于饱和,偏压为0.2 V,激光功率为22.7 mW时,净光电流达到0.24 μA;无偏压,激光照射薄膜不同位置时,净光电流值关于器件中心对称分布,照射两端点输出最大光电流,照射中点输出趋于“0”。经分析,在偏压和激光照射薄膜中心位置的条件下,器件因内光电效应可产生净光电流;在无偏压和激光照射的条件下,因光热电效应可产生净光电流,并建立了温度模型,根据单壁碳纳米管的热电势特性推导出了净光电流与光照位置的关系,其符合实验结果;内光电和光热电效应是光电流产生、变化的原因,在偏压和激光照射的一般条件下,净光电流应是两种效应的叠加结果。器件所具有的光电特性使其在光伏器件、光传感器有应用的潜力。     

IGZO薄膜溅射功率对IGZOTFT栅电压不稳定性的影响

采用不同溅射功率制备的铟镓氧化锌(IGZO)薄膜作为薄膜晶体管(TFT)的有源层,通过扫描电镜、霍尔效应测试仪,分析了溅射功率对IGZO薄膜形貌及电特性的影响,研究了不同IGZO溅射功率对IGZO-TFT栅偏压不稳定性的影响。结果表明,在一定范围内,低溅射功率使得IGZO薄膜的表面粗糙,缺陷较多,载流子浓度较低;在正栅极偏压作用下,低IGZO薄膜溅射功率导致较大的IGZO-TFT阈值电压漂移;在负偏压作用下不产生阈值电压漂移。     

低温透明非晶IGZO薄膜晶体管的光照稳定性

采用室温射频磁控溅射非晶铟镓锌氧化合物(a-IGZO), 在相对低的温度(<200 ℃)下成功制备底栅a-IGZO 薄膜晶体管器件, 其场效应迁移率10 cm^-2·V^-1·s^-1, 开关比大于10⁷, 亚阈值摆幅 SS为0.4 V/dec, 阈值电压为3.6 V. 栅电压正向和负向扫描未发现电滞现象. 白光发光二极管光照对器件的输出特性基本没有影响, 表明制备的器件可用于透明显示器件. 研究了器件的光照稳定性, 光照10000 s后器件阈值电压负向偏移约0.8 V, 这种漂移是由于界面电荷束缚所致. 关键词： 非晶铟镓锌氧化合物 薄膜晶体管 光照稳定性 电滞现象     

表面修饰纳米TiO2的贮氢合金电极的光充电行为

采用水解-沉淀法制备了锐钛矿结构的纳米级TiO2,研究了表面修饰TiO2的贮氢合金电极的光充电、循环伏安及交流阻抗特性.结果表明,表面未修饰TiO2的贮氢合金电极在光照下电极电位基本无变化,而表面修饰TiO2的贮氢合金电极在光照下,电极电位向负方向偏移,可达-0.835V,表明在光照射条件下电极表面有氢原子形成.电化学阻抗谱的结果也表明,表面修饰电极在光照时表面有吸附氢存在,并存在氢原子向贮氢合金内部的扩散过程.扫描电镜观察表明,表面修饰TiO2的贮氢合金电极在光充电后产生的氢原子被贮氢合金吸收引起膨胀,导致表面出现大量微裂纹.     

瞬态光电流对有机薄膜光伏器件中肖特基接触的研究

制备了结构为氧化铟锡(ITO)/有机半导体/金属的有机薄膜光伏器件,电流--电压曲线显示其具有整流特性但有机半导体和电极间肖特基接触的内建电场方向很难判定.为了研究有机半导体和电极的肖特基接触特性,分别制备了结构为ITO/有机绝缘层/有机半导体/金属和ITO/有机半导体/有机绝缘层/金属的器件,通过调制激光照射下器件的瞬态光电流方向可容易判断有机半导体和电极间肖特基接触的内建电场方向,外加偏压下瞬态光电流的强度变化进一步证实了判断的正确性.     

容性耦合电负性氧等离子体的激光诱导光致剥离技术诊断研究

采用波长532nm的高能脉冲激光束照射40.68MHz激发的容性耦合氧等离子体,并给处于激光束中央的探针施加一定的正偏压,由此诊断氧等离子体的空间电位和电负度。实验结果表明,探针偏压从0V逐渐增加时,探针搜集的电流波形从V型向倒U型转变,转变电压点正是电负性等离子体的空间电位。尝试着给出了运用激光诱导光致剥离技术诊断电负性等离子体空间电位的经验方法。另外,探针上施加的正偏压高于等离子体空间电位时,等离子体的电负度基本保持不变。实验还表明,氧等离子体的电负度随着射频输入功率的增加而呈现下降的趋势。     

等离子体CVD生长金刚石薄膜中衬底负偏压增强成核机制

 提出了近年来实验发现的在等离子体化学气相沉积（PCVD）金刚石薄膜中衬底负偏压增强成核效应的理论模型，给出了偏压增强成核效应与沉积参数诸如反应压强和碳源浓度等的关系，解释了在负偏压增大时，反应压强和碳源浓度的变化对成核增强强度的影响，并且讨论了阈值负偏压问题。本模型得到的理论结果与文献中的实验结果基本一致。     

Influence of white light illumination on the performance of a-IGZO thin film transistor under positive gate-bias stress

The influence of white light illumination on the stability of an amorphous In GaZnO thin film transistor is investigated in this work. Under prolonged positive gate bias stress, the device illuminated by white light exhibits smaller positive threshold voltage shift than the device stressed under dark. There are simultaneous degradations of field-effect mobility for both stressed devices, which follows a similar trend to that of the threshold voltage shift. The reduced threshold voltage shift under illumination is explained by a competition between bias-induced interface carrier trapping effect and photon-induced carrier detrapping effect. It is further found that white light illumination could even excite and release trapped carriers originally exiting at the device interface before positive gate bias stress, so that the threshold voltage could recover to an even lower value than that in an equilibrium state. The effect of photo-excitation of oxygen vacancies within the a-IGZO film is also discussed.     

Time-dependent degradation of threshold voltage in AlGaN/GaN high electron mobility transistors

This paper gives a detailed analysis of the time-dependent degradation of the threshold voltage in AlGaN/GaN high electron mobility transistors(HEMTs) submitted to off-state stress. The threshold voltage shows a positive shift in the early stress, then turns to a negative shift. The negative shift of the threshold voltage seems to have a long recovery time. A model related with the balance of electron trapping and detrapping induced by shallow donors and deep acceptors is proposed to explain this degradation mode.     

Degradation characteristics and mechanism of PMOSFETs under NBT--PBT--NBT stress

Degradation characteristics of PMOSFETs under negative bias temperature--positive bias temperature--negative bias temperature (NBT--PBT--NBT) stress conditions are investigated in this paper. It is found that for all device parameters, the threshold voltage has the largest shift under the first NBT stress condition. When the polarity of gate voltage is changed to positive, the shift of device parameters can be greatly recovered. However, this recovery is unstable. The more severe degradation appears soon after reapplication of NBT stress condition. The second NBT stress causes in linear drain current to degrade greatly, which is different from that of the first NBT stress. This more severe parameter shift results from the wear out of silicon substrate and oxide interface during the first NBT and PBT stress due to carrier trapping/detrapping and hydrogen related species diffusion.     

超深亚微米PMOS器件的NBTI退化机理

对超深亚微米PMOS器件的负栅压温度不稳定性(NBTI)退化机理进行了研究.主要集中在对器件施加NBT和随后的PBT应力后器件阈值电压的漂移上.实验证明反型沟道中空穴在栅氧中的俘获以及氢分子在栅氧中的扩散是引起NBTI退化的主要原因.当应力条件变为PBT时，陷落的空穴可以快速退陷，但只有部分氢分子可以扩散回栅氧与衬底界面钝化硅悬挂键，这就导致了PBT条件下阈值电压只能部分恢复. 关键词： 超深亚微米PMOS器件 负偏压温度不稳定性 界面陷阱 氢气     

Negative and positive lateral shift of a light beam reflected from a grounded slab

We consider the lateral shift (LS) of a light beam reflecting from a dielectric slab backed by a metal. It is found that the LS of the reflected beam can be negative while the intensity of reflected beam is almost equal to the incident one under a certain condition. The explanation for the negativity of the LS is given in terms of the interference of the reflected waves from the two interfaces. It is also shown that the LS can be enhanced or suppressed under some other conditions. The numerical calculation on the LS for a realistic Gaussian-shaped beam confirms our theoretical prediction.     

Experimental evaluation of interface states during time-dependent dielectric breakdown of GaN-based MIS-HEMTs with LPCVD-SiN_x gate dielectric

We experimentally evaluated the interface state density of Ga N MIS-HEMTs during time-dependent dielectric breakdown(TDDB). Under a high forward gate bias stress, newly increased traps generate both at the Si Nx/Al Ga N interface and the Si Nx bulk, resulting in the voltage shift and the increase of the voltage hysteresis. When prolonging the stress duration, the defects density generated in the Si Nx dielectric becomes dominating, which drastically increases the gate leakage current and causes the catastrophic failure. After recovery by UV light illumination, the negative shift in threshold voltage(compared with the fresh one) confirms the accumulation of positive charge at the Si Nx/Al Ga N interface and/or in Si Nx bulk, which is possibly ascribed to the broken bonds after long-term stress. These results experimentally confirm the role of defects in the TDDB of Ga N-based MIS-HEMTs.     

Effect of channel thickness on electrical performance of amorphous IGZO thin-film transistor with atomic layer deposited alumina oxide dielectric

We have investigated the electrical performance of amorphous indium–gallium–zinc oxide (α-IGZO) thin-film transistors with various channel thicknesses. It is observed that when the α-IGZO thickness increases, the threshold voltage decreases as reported at other researches. The intrinsic field-effect mobility as high as 11.1 cm²/Vs and sub threshold slope as low as ∼0.2 V/decade are independent on the thickness of α-IGZO channel, which indicate the excellent interface between α-IGZO and atomic layer deposited Al₂O₃ dielectric even for the case with α-IGZO thickness as thin as 10 nm. However, the source and drain series resistances increased with increasing of α-IGZO channel thickness, which results in the apparent field-effect mobility decreasing. The threshold voltage shift (ΔV_th) under negative bias stress (NBS) and negative bias illumination stress (NBIS) were investigated, also. The hump-effect in the sub threshold region under NBS and threshold voltage shift to negative position under NBIS were enhanced with decreasing of α-IGZO channel thickness, owing to the enhancement of vertical electrical field in channel.     

Degradation and its fast recovery in a-IGZO thin-film transistors under negative gate bias stress

A new type of degradation phenomena featured with increased subthreshold swing and threshold voltage after negative gate bias stress (NBS) is observed for amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs), which can recover in a short time. After comparing with the degradation phenomena under negative bias illumination stress (NBIS), positive bias stress (PBS), and positive bias illumination stress (PBIS), degradation mechanisms under NBS is proposed to be the generation of singly charged oxygen vacancies ($V_{\mathrm{o}}^{+}$) in addition to the commonly reported doubly charged oxygen vacancies ($V_{\mathrm{o}}^{2+}$). Furthermore, the NBS degradation phenomena can only be observed when the transfer curves after NBS are measured from the negative gate bias to the positive gate bias direction due to the fast recovery of $V_{\mathrm{o}}^{+}$ under positive gate bias. The proposed degradation mechanisms are verified by TCAD simulation.     

Bias stress effect in low-voltage organic thin-film transistors

The bias stress effect in pentacene organic thin-film transistors has been investigated. The transistors utilize a thin gate dielectric based on an organic self-assembled monolayer and thus can be operated at low voltages. The bias stress-induced threshold voltage shift has been analyzed for different drain-source voltages. By fitting the time-dependent threshold voltage shift to a stretched exponential function, both the maximum (equilibrium) threshold voltage shift and the time constant of the threshold voltage shift were determined for each drain-source voltage. It was found that both the equilibrium threshold voltage shift and the time constant decrease significantly with increasing drain-source voltage. This suggests that when a drain-source voltage is applied to the transistor during gate bias stress, the tilting of the HOMO and LUMO bands along the channel creates a pathway for the fast release of trapped carriers.