GaN发光二极管表观电阻极值分析

利用正向交流(ac)小信号方法对GaN发光二极管的电容-电压特性进行测量,可以观察到GaN发光二极管中的负电容现象。利用LED串联等效电路对表观电容和表观电阻进行了测量,表观电阻-正向电压曲线出现了一个极值点。通过对相关文献分析,提出负电容现象的根本原因是在较高的正偏下微分电容dQ/dU<0;推论出pn结的微分电容先随正向偏压的增大而急剧增大,当出现复合发光后随正向偏压的增大而减小,直到随正向偏压的增大而出现负值;正向偏置电压较大时,结电导电流的变化率根据I-V特性曲线取极大值,此时微分电容由于强复合效应已快速变小,表观电阻有极大值;得到了表观电阻极大值表达式。表观电阻与正向电压曲线的极值点与理论模型相吻合,证明了该理论模型的正确性。     

激光剥离技术实现垂直结构GaN基LED

为改善GaN基发光二极管(Light-emitting diode,LED)的电学特性和提高其输出光功率,采用激光剥离技术,在KrF准分子激光器脉冲激光能量密度为400mJ/cm2的条件下,将GaN基LED从蓝宝石衬底剥离,结合金属熔融键合技术,在300℃中将GaN基LED转移至高电导率和高热导率的硅衬底,制备出了具有垂直结构的GaN基LED,并对其电学和光学特性进行了测试。结果表明:在110mA注入电流下,垂直结构器件的开启电压由普通结构的3.68V降低到了3.27V;在560mA注入电流下,器件输出光功率没有出现饱和现象;采用高电导率和高热导率的硅衬底能有效地改善GaN基LED的电学和光学特性。     

GaN-based light-emitting diode with ZnO nanotexture layer prepared using hydrogen gas

ZnO films were deposited on indium tin oxide (ITO), which formed the transparent conductive layer (TCL) of a GaN-based light-emitting diode (LED), by ultrasonic spraying pyrolysis to increase the light output power. The ZnO nanotexture was formed by treating the as-deposited ZnO films with hydrogen. The root mean square (RMS) roughness increased from 4.47 to 7.89 nm before hydrogen treatment to 10.82-15.81 nm after hydrogen treatment for 20 min. Typical current-voltage (I-V) characteristics of the GaN-based LEDs with a ZnO nanotexture layer have a forward-bias voltage of 3.25 V at an injection current of 20 mA. The light output power of a GaN-based LED with a ZnO nanotexture layer improved to as much as about 27.5% at a forward current of 20 mA.     

GaN基LED低温空穴注入层的MOCVD生长研究

针对GaN基LED空穴注入效率低的问题,在量子阱与电子阻挡层之间插入低温空穴注入层（LT-HIL）,实验研究了MOCVD生长LT-HIL时二茂镁（Cp₂Mg）流量和生长温度的影响。结果表明：随着Cp₂Mg流量的增加,外延薄膜晶体质量下降,外延片表面平整度和均匀性降低;而受Mg掺杂时补偿效应的影响,主波长先红移后蓝移,芯片的输出光功率先升高后降低,正向电压先降低后升高。相比于无LT-HIL的样品,在20 mA工作电流下,Cp₂Mg流量为1.94 μmol/min时制备的芯片的输出光功率提升20.3%,而正向电压降低0.1 V。在Cp₂Mg流量较大时,LT-HIL的渐变式生长温度对外延质量有所改善,但不是主要影响因素。     

Oblique-angle sputtered AlN nanocolumnar layer as a buffer layer in GaN-based LED

This work presents an aluminum nitride (AlN) nanocolumnar layer sputtered at various oblique angles and its application as a buffer layer for GaN-based light-emitting diodes (LEDs) that are fabricated on sapphire substrates. The OA-AlN nanocolumnar layer has a diameter of about 30-60 nm. The GaN-based LED structure is perpendicularly extended from the OA-AlN nanocolumnar layer. Then, the nanocolumnar structure is merged into p-GaN layer to form a mesa structure with a diameter of about 200-600 nm on the surface of the GaN-based LED. Moreover, optical characteristics of the LED were studied using photoluminescence, along with the blue-shifts observed as well.     

高反射率p-GaN欧姆接触电极

根据光学薄膜原理计算了GaN/Ti/Ag、GaN/Al和GaN/Ni/Au/Ti/Ag、GaN/Ni/Au/Al多层电极结构的反射率,得出Ag基和Al基反射电极均能在全角范围内提供较高的反射率。实验测量结果表明,反射率能高于80%的Ag基反射电极,具有低欧姆接触的电学特性。并将GaN/Ni/Au/Ti/Ag多层反射电极应用在上下电极结构的GaN基LED中。实验上采用两步合金法获得了低接触电阻、高反射率的电极结构,并引入Ni/Au覆盖层克服了Ag高温时的团聚和氧化现象。解决了Ag电极的稳定性问题,显著地提高了LED的出光效率,成功制备了具有上下电极结构的GaN基LED管芯。     

Improved light extraction of GaN-based light-emitting diodes with surface-patterned ITO

The surface patterning of the indium tin oxide (ITO) transparent current layer has been investigated to improve the light extraction efficiency of GaN-based light-emitting diodes (LEDs). LEDs with periodic micro-hexagon patterned ITO have been fabricated utilizing standard lithography techniques and inductively coupled plasma (ICP) technology. The luminance intensity of the LED chips with patterned ITO following 160 s ICP etching was enhanced by about 50% compared to the LED chips with unpatterned ITO. Detailed processing parameters are provided. scanning electron microscopy (SEM) and atomic force microscopy (AFM) are used to examine the micro-structures. The results indicate that the surface-patterned ITO technique could have potential applications in high-power GaN-based LEDs.     

激光诱导p-GaN掺杂对发光二极管性能改善的分析

采用激光诱导掺锌的方法提高了常规GaN基外延片p-GaN层的空穴浓度,并将它制备成小功率白光发光二极管(LED).对其光电性能做了详细的测量并进行了加速老化实验和分析.结果表明,与常规LED相比,经过激光诱导p-GaN层掺锌LED的光电性能获得了明显改善:正向工作电压VF从3.33V降到3.13V,串联电阻从30.27Ω降到20.27Ω,室温下衰退系数从1.68×10-4降到1.34×10-4,老化1600h后的反向漏电流从超过0.2μA降为不超过0.025μA,器件的预测寿命延长了41%.器件光电性能改善的主要原因是激光诱导掺锌使LED的p-型欧姆接触改善和热阻降低所致.     

利用单层密排的纳米球提高发光二极管的出光效率

在发光二极管(LED)的透明电极层上制作单层六角密排的聚苯乙烯(polystyrene, PS) 纳米球, 研究提高GaN基蓝光LED的出光效率. 采用自组装的方法在透明电极铟锡氧化物层上制备了直径分别约为250, 300, 450, 600和950 nm的PS纳米球, 并且开展了电致发光的研究. 结果表明, 在LED的透明电极层上附有PS纳米球能有效地提高LED的出光效率; 当PS纳米球的直径与出射光的波长比较接近时, LED的出光效率最优. 与参考样品相比, 在20 mA和150 mA工作电流下, 附有PS纳米球的样品的发光效率分别增加1.34倍和1.25倍. 三维时域有限差分方法计算表明, 该出光增强主要归因于附有PS纳米球的LED结构可以增大LED结构的光输出临界角, 从而提高LED的出光效率. 因此, 这是一种低成本的实现高效率LED的方法.     

基于不同衬底材料高出光效率LED芯片研究进展

提高LED芯片的出光效率是解决LED光源大功率化和可靠性的根本。根据LED芯片所用衬底材料的不同,总结了近年来提高GaN基LED出光效率的研究进展,介绍了新的设计思路、工艺结构与制备方法。并从材料结构和衬底选取方面,对LED芯片未来的发展趋势进行了展望。     

GaN基LED倒装芯片蓝宝石衬底半球型图形优化设计

为了提高GaN基LED芯片的光提取效率,以GaN基LED芯片为研究对象,建立了在蓝宝石衬底出光面和外延生长面上具有半球型图形的LED倒装芯片模型,并利用光学仿真软件对图形参数进行优化设计。实验结果表明:在蓝宝石衬底的出光面和外延生长面双面都制作凹半球型图形对芯片光提取效率的提高效果最好,并且当半球的半径为3 m,周期间距为7 m时,GaN基LED倒装芯片的最大光提取效率为50.8%,比无图形化倒装芯片的光提取效率提高了115.3%。     

Enhanced light extraction of GaN-based light-emitting diodes with periodic textured SiO_2 on Al-doped ZnO transparent conductive layer

We report an effective enhancement in light extraction of Ga N-based light-emitting diodes(LEDs) with an Al-doped Zn O(AZO) transparent conductive layer by incorporating a top regular textured SiO_2 layer. The 2 inch transparent throughpore anodic aluminum oxide(AAO) membrane was fabricated and used as the etching mask. The periodic pore with a pitch of about 410 nm was successfully transferred to the surface of the SiO_2 layer without any etching damages to the AZO layer and the electrodes. The light output power was enhanced by 19% at 20 m A and 56% at 100 m A compared to that of the planar LEDs without a patterned surface. This approach offers a technique to fabricate a low-cost and large-area regular pattern on the LED chip for achieving enhanced light extraction without an obvious increase of the forward voltage.     

GaN-based light-emitting diodes directly grown on sapphire substrate with holographically generated two-dimensional photonic crystal patterns

As an approach to enhance light extraction from GaN-based light-emitting diodes (LEDs), we inserted a submicron period photonic crystal (PC) pattern at the interface between GaN epilayer and sapphire substrate. A two-dimensional square-lattice pillar array of 600-nm period was produced directly onto the sapphire substrate by a combination of laser holography and inductively-coupled-plasma etching. A standard GaN LED heterostructure was grown on top of the nano-patterned substrate, which was then processed to conventional bottom-emitting LED chips. At the drive current of 20 mA, the PC-LED produced surface-normal output power about 40% higher than that of the reference LED (with no PC integrated). Temperature-dependent photoluminescence measurement indicated that the emission enhancement was solely a structural effect by the integrated PC pattern.     

注入电流对绿光高压LED光电特性的影响

设计并制备了12 V 的GaN基绿光高压发光二极管（LED）,并对其进行了变电流测试。研究了绿光高压LED的正向电压、峰值波长、光功率以及光效等重要参数随注入电流的变化关系,电流变化范围为3~50 mA,测试温度为25 ℃。实验结果表明：电流对绿光高压LED的光电特性有很大影响。在驱动电流为20 mA时,对应电压为14 V。随着注入电流的增大,峰值波长蓝移了2 nm。随着电流的增大,光功率近似于线性增加。在注入电流从3 mA增大到20 mA的过程中,光效降低了约61%;在注入电流从20 mA增大到50 mA的过程中,光效降低了约39%。这说明高压LED在大电流驱动时,光效降低的幅度比较缓慢。上述结果对 GaN基绿光高压 LED 的改进优化具有一定的参考价值。     

发光二极管放电实验现象分析

利用直流电源对发光二极管(LED)的结电容充电,切断直流电源后对LED的电压-时间特性进行测量。当充电电压低于LED复合发光的门槛电压,LED的电压-时间特性与普通二极管的相似。当充电电压高于LED复合发光的门槛电压,首次观察到:开始放电的瞬间会出现一个快速下降过程,快速下降到门槛电压以下;LED上的电压越高,快速下降到的电压越低。对该现象进行分析,得到一些新的结论。当LED的正偏电压高于复合发光的门槛电压后,出现了注入到扩散区的非平衡载流子随正偏电压的提高而减小的现象,即dQ/du<0。     

InGaN green light emitting diodes with deposited nanoparticles

We grew an InGaN/GaN-based light-emitting diode (LED) wafer by metal–organic chemical vapor deposition (MOCVD), fabricated devices by optical lithography, and successfully deposited ellipsoidal Ag nano-particles by way of e-beam lithography on top. The diodes exhibited good device performance, in which we expected an enhancement of the radiated intensity by the simulations and emission measurements. The obtained results showed the feasibility of plasmon-assisted LED emission enhancement.     

Improved light extraction of GaN-based light-emitting diodes with surface-textured indium tin oxide electrodes by nickel nanoparticle mask dry-etching

GaN-based light-emitting diodes (LEDs) with surface-textured indium tin oxide (ITO) as a transparent current spreading layer were fabricated.The ITO surface was textured by inductively coupled plasma (ICP) etching technology using a monolayer of nickel (Ni) nanoparticles as the etching mask.The luminance intensity of ITO surface-textured GaN-based LEDs was enhanced by about 34% compared to that of conventional LED without textured ITO layer.In addition,the fabricated ITO surface-textured GaN-based LEDs would present a quite good performance in electrical characteristics.The results indicate that the scattering of photons emitted in the active layer was greatly enhanced via the textured ITO surface,and the ITO surface-textured technique could have a potential application in improving photoelectric characteristics for manufacturing GaN-based LEDs of higher brightness.     

GaN发光二极管表观电容极值分析

利用正向交流(ac)小信号方法对GaN发光二极管的电容-电压特性进行测量,可以观察到GaN发光二极管中的负电容现象。正向偏压越大,测试频率越低,负电容现象越明显。测量到的负电容现象是表象,不存在负电容;提出GaN发光二极管p-n结的结电容在特定的正向电压范围内等效于可变电容。分析可变电容对正向交流小信号响应得到:特定参数的可变电容使结电容电流相位落后于交流小信号电压相位π/2,使得在测量中表现为负电容。发现表观电容-正向电压曲线的极值点与理论模型相吻合,证明了该理论模型的正确性。     

V形坑尺寸对硅衬底InGaN/AlGaN近紫外LED光电性能的影响

使用MOCVD在图形化Si衬底上生长了InGaN/AlGaN近紫外LED,通过改变低温GaN插入层的厚度调控V形坑尺寸,系统地研究了V形坑尺寸对InGaN/AlGaN近紫外LED(395 nm)光电性能的影响。结果表明,低温GaN插入层促进了V形坑的形成,并且V形坑尺寸随着插入层厚度的增加而增大。在电学性能方面,随着V形坑尺寸的增大,-5 V下的漏电流从5.2×10~(-4)μA增加至6.5×10~2μA;350 mA下正向电压先从3.55 V降至3.44 V,然后升高至3.60 V。在光学性能方面,随着V形坑尺寸的增大,35 A/cm~2下的归一化外量子效率先从0.07提高至最大值1,然后衰退至0.53。对V形坑尺寸影响InGaN/AlGaN近紫外LED光电性能的物理机理进行了分析,结果表明:InGaN/AlGaN近紫外LED的光电性能与V形坑尺寸密切相关,最佳的V形坑尺寸为120~190 nm,尺寸太大或者太小都会降低器件性能。     

Enhanced ESD properties of GaN-based light-emitting diodes with various MOS capacitor designs

High electrostatic discharge (ESD) protection of GaN-based light-emitting diodes (LEDs) has been developed using a metal–oxide semiconductor (MOS) capacitor. This structure is realized by adopting various metal electrode patterns. The MOS capacitor can be implemented by extending the metal line directly from the p-type electrode to the top surface of an SiO₂-capped n-GaN layer near the vicinity of the n-type electrode. By connecting a MOS capacitor in parallel with the GaN-based LED, the negative ESD strike could be significantly increased from 385 to 1075 V of human body mode (HBM).