双极型晶体管高功率微波的损伤机理

在模拟集成电路的抗高功率微波加固研究中,对电路中的单个晶体管进行高功率微波损伤机理研究。对晶体管进行洲入微波损伤效应实验和失效分析,得到了双极型晶体管损伤的基本规律。损伤效应实验采用注入法,分别从晶体管的三极注入微波,得到了损伤结果。对样品进行的失效分析探明了器件的损伤部位和失效机理。结果表明,高功率微波注入主要造成B-E结的退化和损伤;从基极注入微波最易损伤晶体管,而从集电极注入则相反。     

不同样式的高功率微波对双极晶体管的损伤效应和机理

结合Si基n⁺-p-n-n⁺ 外延平面双极晶体管, 通过分析器件内部的温度分布变化以及电流密度和烧毁时间随信号幅值的变化关系, 研究了其在三角波信号、正弦波信号和方波脉冲信号等三种样式的高功率微波信号作用下的损伤效应和机理. 研究表明, 三种高功率微波信号注入下器件的损伤部位都是发射结, 在频率和信号幅值相同的情况下方波脉冲信号更容易使器件损伤; 位移电流密度和烧毁时间随信号幅值的增大而增大, 而位移电流在总电流所占的比例随信号幅值的增大而减小; 相比于因信号变化率而引起的位移电流, 信号注入功率在高幅值信号注入损伤过程中占主要作用. 利用数据分析软件, 分别得到了三种信号作用下器件烧毁时间和信号频率的变化关系式. 结果表明, 器件烧毁时间随信号频率的增加而增加, 烧毁时间和频率都符合t= af^b的关系式. 关键词： 双极晶体管 高功率微波 损伤机理 信号样式     

带有n+深阱的三阱CMOS工艺中寄生NPN双极效应及其对电荷共享的影响

基于三维TCAD器件模拟, 研究了带有 n⁺深阱的90 nm三阱CMOS器件在重离子辐照下产生的电荷共享效应. 研究结果表明在重离子辐照时, n⁺深阱会导致寄生的NPN双极型晶体管触发, 显著增强NMOS间的电荷共享, 其放大因子达到双阱工艺中寄生PNP晶体管放大因子的2---4倍. 进而分别研究了n阱接触和p 阱接触对寄生NPN双极放大的影响, 结果表明增大p阱接触的面积和减小 n 阱接触的距离将抑制NPN晶体管的放大作用, 而增大n 阱接触的面积将增强NPN的放大作用.     

未耗尽载流子对P-N结反向特性的影响

本文研究了P⁺-N结中载流子未耗尽时的二极管反向伏安特性和在大电流密度下合金晶体管集电极特性。首先,对雪崩击穿的机构,推导了载流子未耗尽时的P⁺-N结反向电流与电压的关系式。结果指出,倍增因子M不仅和加在结上的电压大小有关系,而且和流过结的电流J有关系。理论分析可以证明,当二极管几何结构满足一定条件时,可以观察到由于载流子对空间电荷的贡献不能忽略时所导致的等效电阻对P⁺-N结反向伏安特性的影响。用脉冲方法测量了锗合金二极管反向击穿后的伏安特性,实测结果和理论值很符合。其次,从理论上考虑了集电结中未耗尽载流子作用后,推导了P-N-P合金晶体管在大电流密度下集电结的雪崩倍增特性。由结果可见,晶体管在大电流密度下,集电结的倍增因子M不仅和电压有关系,而且和发射极的电J_e有关系。分析指出,由于P-N结中未耗尽载流子的作用,在共发射极线路、基极断路时,若合金管电流放大系数α₀在1/2.3～1范围内将会出现负阻。这个负阻已经被实验所证实。实验得至的整个负阻范围内的伏安特性与理论值符合较好。实验是在脉冲电流下进行的。并且在不同的环境温度下进行了测量。实验结果表明,随温度的升高整个负阻区的伏安曲线向电压高的方向有很微小的移动。这说明负阻的产生不是由于热效应引起,而是由于在大电流密度下的合金管的集电结中载流子不耗尽的结果。     

微波低噪声晶体管电磁脉冲敏感端对研究

 在研究电磁脉冲对微电子器件作用效应的过程中,针对三种不同型号的微波低噪声硅半导体器件进行了电磁脉冲（静电放电和方波电磁脉冲）直接注入的试验,结果发现该类器件对电磁脉冲最敏感的端对并不是EB结（发射极-基极）,而是CB结（集电极-基极）。通过对器件结构与放电过程的分析,分别得出了CB结、EB结的损伤机理：随放电电压的增大,热载流子撞击界面,使流经界面处的少数载流子复合速度增加,少数载流子在界面处及界面附近被复合,从而降低了器件的电流放大系数。而无论从哪个结注入,器件完全失效均是由热二次击穿造成。从而更进一步地证明了CB结比EB结更敏感。     

外电路在电磁脉冲对双极型晶体管作用过程中的影响

 借助自主开发的2维半导体器件-电路联合仿真器，研究了电磁脉冲从发射极注入双极型晶体管时，外电路的影响，分析了共基极接法晶体管的电流分配系数，然后在此基础上研究了3种典型外电路元件的影响。结果表明：当脉冲从发射极注入时，基极外接电阻对器件烧毁过程影响不大；集电极外接正电压源等效于削减电磁脉冲的幅度，有延缓器件烧毁的作用；集电极外接电阻能明显提高器件对电磁脉冲的耐受性。     

高功率微波作用下高电子迁移率晶体管的损伤机理

本文针对高电子迁移率晶体管在高功率微波注入条件下的损伤过程和机理进行了研究,借助SentaurusTCAD仿真软件建立了晶体管的二维电热模型,并仿真了高功率微波注入下的器件响应.探索了器件内部电流密度、电场强度、温度分布以及端电流随微波作用时间的变化规律.研究结果表明,当幅值为20 V,频率为14.9 GHz的微波信号由栅极注入后,器件正半周电流密度远大于负半周电流密度,而负半周电场强度高于正半周电场.在强电场和大电流的共同作用下,器件内部的升温过程同时发生在信号的正、负半周内.又因栅极下靠近源极侧既是电场最强处,也是电流最密集之处,使得温度峰值出现在该处.最后,对微波信号损伤的高电子迁移率晶体管进行表面形貌失效分析,表明仿真与实验结果符合良好.     

重离子导致的锗硅异质结双极晶体管单粒子效应电荷收集三维数值模拟

针对国产锗硅异质结双极晶体管(SiGe HBTs), 采用半导体器件模拟工具, 建立SiGe HBT单粒子效应三维损伤模型, 研究影响SiGe HBT单粒子效应电荷收集的关键因素. 分析比较重离子在不同位置入射器件时, 各电极的电流变化和感生电荷收集情况, 确定SiGe HBT电荷收集的敏感区域. 结果表明, 集电极/衬底结内及附近区域为集电极和衬底收集电荷的敏感区域, 浅槽隔离内的区域为基极收集电荷的敏感区域, 发射极收集的电荷可以忽略. 此项工作的开展为下一步采用设计加固的方法提高器件的抗辐射性能打下了良好的基础. 关键词： 锗硅异质结双极晶体管 单粒子效应 电荷收集 三维数值仿真     

高电子迁移率晶体管微波损伤仿真与实验研究

针对AlGaAs/InGaAs型高电子迁移率晶体管,利用TCAD半导体仿真工具,从器件内部空间电荷密度、电场强度、电流密度和温度分布变化分析出发,研究了从栅极注入1 GHz微波信号时器件内部的损伤过程与机理。研究表明,器件的损伤过程发生在微波信号的正半周,负半周器件处于截止状态;器件内部损伤过程与机理在不同幅值的注入微波信号下是不同的。当注入微波信号幅值较低时,器件内部峰值温度出现在栅极下方靠源极侧栅极与InGaAs沟道间,由于升温时间占整个周期的比例太小,峰值温度很难达到GaAs的熔点;但器件内部雪崩击穿产生的栅极电流比小信号下栅极泄漏电流高4个量级,栅极条在如此大的电流下很容易烧毁熔断。当注入微波信号幅值较高时,在信号正半周的下降阶段,在栅极中间偏漏极下方发生二次击穿,栅极电流出现双峰现象,器件内部峰值温度转移到栅极中间偏漏极下方,峰值温度超过GaAs熔点。利用扫描电子显微镜对微波损伤的高电子迁移率晶体管器件进行表面形貌失效分析,仿真和实验结果符合较好。     

双极晶体管在强电磁脉冲作用下的损伤效应与机理

针对典型n⁺-p-n-n⁺结构的双极晶体管,从器件内部电场强度、电流密度和温度分布变化的分析出发,研究了在强电磁脉冲(electromagnetic pulse,EMP)作用下其内在损伤过程与机理.研究表明,双极晶体管损伤部位在不同幅度的注入电压作用下是不同的,注入电压幅度较低时,发射区中心下方的集电区附近首先烧毁,而在高幅度注入电压作用下,由于基区-外延层-衬底构成的PIN结构发生击穿,导致靠近发射极一侧的基极边缘处首先发生烧毁.利用数据分析软件,对不同注入电 关键词： 双极晶体管 强电磁脉冲 器件损伤 损伤功率     

Microwave damage susceptibility trend of bipolar transistor as a function of frequency

We conduct a theoretical study of the damage susceptibility trend of a typical bipolar transistor induced by high-power microwave (HPM) as a function of frequency. The dependences of the burnout time and the damage power on the signal frequency are obtained. Studies of the internal damage process and the mechanism of the device are carried out from the variation analysis of the distribution of the electric field, current density, and temperature. The investigation shows that the burnout time linearly depends on the signal frequency. The current density and the electric field at the damage position decrease with increasing frequency. Meanwhile, the temperature elevation occurs in the area between the p-n junction and the n-n⁺ interface due to the increase of the electric field. Adopting the data analysis software, the relationship between the damage power and the frequency is obtained. Moreover, the thickness of the substrate has a significant effect on the burnout time.     

强电磁干扰对达林顿管的损伤效应与机理

建立了PNP型达林顿管的二维电热模型,对处于有源放大区的达林顿管的集电极注入高功率微波(HPM)和强电磁脉冲(EMP)时的瞬态响应进行了仿真。结果表明:HPM注入下,器件内部的峰值温度呈周期性的“下降-上升”,温度升高过程发生在信号的正半周,靠近达林顿管发射极的晶体管发射结边缘是最易毁伤处;EMP注入下,其损伤机理与HPM注入时的正半周时相似,器件内部峰值温度一直上升,易毁伤部位与HPM注入时相同。得到了损伤功率阈值和损伤能量阈值与损伤脉宽的关系,这两种干扰注入下的损伤能量阈值-脉宽关系和损伤功率阈值-脉宽关系公式相似,并且在相同脉宽下,HPM注入下的损伤能量阈值大于EMP注入下的损伤能量阈值。     

中带电压法分离栅控横向pnp双极晶体管辐照感生缺

设计并制作了一种新型双极测试结构,即在常规横向pnp双极晶体管基区表面氧化层上淀积一栅电极,通过扫描栅极所加电压,获得漏极(集电极)电流随栅极电压的变化特性,利用中带电压法分离栅控横向pnp双极晶体管 在辐照过程中感生的氧化物陷阱电荷和界面陷阱电荷.本文对设计的晶体管测试结构和采用 的测试方法做了具体介绍.     

Control of the Interface Between Electron‐Hole and Electron‐Ion Plasmas: Hybrid Semiconductor‐Gas Phase Devices as a Gateway for Plasma Science

Coupling electron‐hole (e^–‐ h⁺) and electron‐ion plasmas across a narrow potential barrier with a strong electric field provides an interface between the two plasma genres and a pathway to electronic and photonic device functionality. The magnitude of the electric field present in the sheath of a low temperature, nonequilibrium microplasma is sufficient to influence the band structure of a semiconductor region in immediate proximity to the solid‐gas phase interface. Optoelectronic devices demonstrated by leveraging this interaction are described here. A hybrid microplasma/semiconductor photodetector, having a Si cathode in the form of an inverted square pyramid encompassing a neon microplasma, exhibits a photosensitivity in the ～420–1100 nm region as high as 3.5 A/W. Direct tunneling of electrons into the collector and the Auger neutralization of ions arriving at the Si surface appear to be facilitated by an n ‐type inversion layer at the cathode surface resulting from bandbending by the microplasma sheath electric field. Recently, an npn plasma bipolar junction transistor (PBJT), in which a low temperature plasma serves as the collector in an otherwise Si device, has also been demonstrated. Having a measured small signal current gain h_fe as large as 10, this phototransistor is capable of modulat‐ing and extinguishing the collector plasma with emitter‐base bias voltages <1 V. Electrons injected into the base when the emitter‐base junction is forward‐biased serve primarily to replace conduction band electrons lost to the collector plasma by secondary emission and ion‐enhanced field emission in which ions arriving at the base‐collector junction deform the electrostatic potential near the base surface, narrowing the potential barrier and thereby facilitating the tunneling of electrons into the collector. Of greatest significance, therefore, are the implications of active, plasma/solid state interfaces as a new frontier for plasma science. Specifically, the PBJT provides the first opportunity to control the electronic properties of a material at the boundary of, and interacting with, a plasma. By specifying the relative number densities of free (conduction band) and bound (valence band) electrons at the base‐collector interface, the PBJT's emitter‐base junction is able to dictate the rates of secondary electron emission (including Auger neutralization) at the semiconductor‐plasma interface, thereby offering the ability to vary at will the effective secondary electron emission coefficient for the base surface (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

高电子迁移率晶体管放大器高功率微波损伤机理

在TCAD半导体仿真环境中,建立了0.25 m栅长的AlGaAs/InGaAs高电子迁移率晶体管(HEMT)低噪声放大器与微波脉冲作用的仿真模型,基于器件内部的电场强度、电流密度和温度分布的变化,研究了1 GHz的微波从栅极和漏极注入的损伤机理。研究结果表明,从栅极注入约40.1 dBm的微波时,HEMT内部峰值温度随着时间的变化振荡上升,最终使得器件失效,栅下靠源侧电流通道和强电场的同时存在使得该位置最容易损伤;从漏极注入微波时,注入功率的高低会使器件内部出现不同的响应过程,注入功率存在一个临界值,高于该值,器件有可能在第一个周期内损伤,损伤位置均在漏极附近。在1 GHz的微波作用下,漏极注入比栅极注入更难损伤。     

Effects of microwave pulse-width damage on a bipolar transistor

This paper presents a theoretical study of the pulse-width effects on the damage process of a typical bipolar transistor caused by high power microwaves (HPMs) through the injection approach. The dependences of the microwave damage power, P, and the absorbed energy, E, required to cause the device failure on the pulse width τ are obtained in the nanosecond region by utilizing the curve fitting method. A comparison of the microwave pulse damage data and the existing dc pulse damage data for the same transistor is carried out. By means of a two-dimensional simulator, ISE-TCAD, the internal damage processes of the device caused by microwave voltage signals and dc pulse voltage signals are analyzed comparatively. The simulation results suggest that the temperature-rising positions of the device induced by the microwaves in the negative and positive half periods are different, while only one hot spot exists under the injection of dc pulses. The results demonstrate that the microwave damage power threshold and the absorbed energy must exceed the dc pulse power threshold and the absorbed energy, respectively. The dc pulse damage data may be useful as a lower bound for microwave pulse damage data.     

Microwave damage susceptibility trend of a bipolar transistor as a function of frequency

We conduct a theoretical study of the damage susceptibility trend of a typical bipolar transistor induced by a high-power microwave (HPM) as a function of frequency. The dependences of the burnout time and the damage power on the signal frequency are obtained. Studies of the internal damage process and the mechanism of the device are carried out from the variation analysis of the distribution of the electric field, current density, and temperature. The investigation shows that the burnout time linearly depends on the signal frequency. The current density and the electric field at the damage position decrease with increasing frequency. Meanwhile, the temperature elevation occurs in the area between the p-n junction and the n-n + interface due to the increase of the electric field. Adopting the data analysis software, the relationship between the damage power and frequency is obtained. Moreover, the thickness of the substrate has a significant effect on the burnout time.     

Pulsed microwave damage trend of bipolar transistor as a function of pulse parameters

In the present paper we conduct a theoretical study of the thermal accumulation effect of a typical bipolar transistor caused by high power pulsed microwave (HPM), and investigate the thermal accumulation effect as a function of pulse repetition frequency (PRF) and duty cycle. A study of the damage mechanism of the device is carried out from the variation analysis of the distribution of the electric field and the current density. The result shows that the accumulation temperature increases with PRF increasing and the threshold for the transistor is about 2 kHz. The response of the peak temperature induced by the injected single pulses indicates that the falling time is much longer than the rising time. Adopting the fitting method, the relationship between the peak temperature and the time during the rising edge and that between the peak temperature and the time during the falling edge are obtained. Moreover, the accumulation temperature decreases with duty cycle increasing for a certain mean power.     

Investigation of an InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with reduced potential spike

In this work, an improved InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with an InGaP wide-bandgap collector is investigated. In the emitter–base region, the thin narrow bandgap n-type GaAs layer is sandwiched between a wide-bandgap N-type InGaP confinement layer and a narrow-bandgap p-type GaAs base layer. In the collector–base structure, an undoped 30 Å-thick GaAs spacer and a heavily doped 30 Å-thick GaAs are inserted between the base and collector. Due to the absence of a potential spike both at the base–emitter and base–collector junctions, the studied device shows lower offset and saturation voltages. In addition, not only are the excellent current–voltage characteristics observed, but also the undesired effects, e.g. the electron blocking effect, are completely eliminated.