Double-Side Crystallization Tuning to Achieve over 1 µm Thick and Well-Aligned Block-Like Narrow-Bandgap Perovskites for High-Efficiency Near-Infrared Photodetectors

Solution-processed narrow-bandgap Sn–Pb perovskites have shown their potential in near-infrared (NIR) photodetection as a promising alternative to traditional silicon and inorganic compounds. To achieve efficient NIR photodetection, high-quality Sn–Pb perovskite thick films with well-packed, smooth, and pinhole/void-free features are highly desirable for boosting the spectral absorption. Understanding the crystallization kinetics and tuning the crystallization are fundamentally important to reach such high-quality thick Sn–Pb perovskite films, and have been limitedly explored. Herein, an approach of double-side crystallization tuning through low-temperature space-restricted annealing in methylammonium-free Sn–Pb perovskite films with over 1 µm thickness is proposed. More specifically, through simultaneously retarding the crystallization in the top of precursor films and promoting the crystal growth of the bottom of precursor films, high-quality and block-like thick FA_0.85Cs_0.15Sn_0.5Pb_0.5I₃ perovskite films with improved crystallinity, preferred out-of-plane orientation, and reduced trap density are achieved. Finally, photovoltaic-mode Sn–Pb perovskite NIR photodetectors show a high external quantum efficiency of ≈80% at 760–900 nm, a recorded responsivity of 0.53 A W⁻¹, and a high specific detectivity of 6 × 10¹² Jones at 940 nm. This study offers the fundamental understanding of the crystallization kinetics of thick perovskite films and paves the way for perovskite-based emerging NIR photodetection and imaging applications.     

High-Yield Exfoliation of Large MXene with Flake Sizes over 10 µm Using Edge-Anchored Carbon Nanotubes

The exceptional properties of 2D transition metal carbides and nitrides (MXene) have led to numerous promising applications. However, the performance of MXene is often dependent on the size of the flakes, and obtaining large-sized, high-quality MXene flakes remains challenging. Herein, a carbon nanotube (CNT)-assisted exfoliation strategy is introduced, which significantly improves the yield of large-flake MXene while entirely transforming the centrifugation residues into small-flake MXene, resulting in waste-free synthesis of MXene. The average size of the obtained MXene flakes can reach over 10 and 0.7 µm for the two populations, respectively. Additionally, the capacitive performance of MXene can be greatly enhanced with a small amount of CNTs. As a proof of concept, a planar interdigital micro-supercapacitor with heterogeneous layers assembled by large- and small-flake MXene simultaneously exhibits outstanding synergistic enhancement in volumetric capacitance (1072 F cm⁻³) and energy density (53.5 mWh cm⁻³). This CNT-assisted method provides explicit directions for achieving the ideal utilization of MXene, improving the yield of large flakes while making judicious use of waste, to meet specific application needs.     

Silicon-on-Insulator Low-Noise Amplifier Fabricated Using the 0.18-μm Technology

A silicon-on-insulator CMOS low-noise amplifier has been designed, fabricated using the 0.18-μm topology, and tested. The following key characteristics of this amplifier have been determined: parameter S₂₁ is no lower than 11 dB in the frequency range from 500 MHz to 1.5 GHz, and the noise factor is no higher than 4 dB at 2 GHz.     

A broadband Low Noise Amplifier with built-in linearizer in 0.13-µm CMOS process

A linearized ultra-wideband (UWB) CMOS Low Noise Amplifier (LNA) is presented in this paper. The linearity performance is enhanced by exploiting PMOS–NMOS common-gate (CG) inverter as a built-in linearizer which leads to cancel out both the second- and third-order distortions. Two inductors are placed at the drain terminals of CG transistors in the built-in linearizer to adjust the phase and magnitude of the third-order distortion. A second-order band-pass Chebyshev filter is utilized in the input port of common-source (CS) configuration to provide broadband input matching at 3.1–10.6 GHz frequency range to a 50-Ω antenna. Series and shunt peaking techniques are employed to extend the bandwidth (BW) and to flatten the gain response. Simulated in 0.13 µm CMOS technology, the CMOS LNA exhibits state of the art performance consuming 17.92 mW of dc power. The CMOS LNA features a maximum gain of 10.24 dB, 0.9–4.1 dB noise figure (NF), and a third-order input intercept point (IIP3) of 6.8 dBm at 6.3 GHz.     

Photo-and electroluminescence in the 1.3-µm wavelength range from quantum-dot structures grown on GaAs substrates

A method is proposed to increase the emission wavelength from structures grown on GaAs substrates by inserting a strained InAs quantum dot array into an external InGaAs quantum well. The dependence of the luminescence peak position on the active region design was investigated for structures grown by this method. Room-temperature photo-and electroluminescence spectra in the 1.3-μm wavelength range are compared. Fiz. Tekh. Poluprovodn. 33, 180–183 (February 1999)     

A 12-bit 250 MS/s pipeline ADC with 78 dB SFDR in 0.13-µm CMOS

A 12-bit 250 MS/s pipeline ADC is presented and implemented in 0.13 µm CMOS process. To reduce the load capacitance of each pipeline stage and save area, the inter-metal capacitors are adopted as input sampling capacitors of the comparators. A fully integrated reference buffer associated with a simulation scheme is proposed to improve the settling speed and PSRR of the differential reference voltage. To reduce the overall power a low cost foreground calibration for capacitor mismatches is employed. The single-stage telescopic with gain-boosting amplifiers and an improved bias is applied in each stage due to its high power efficiency. Additionally, the timing in the sampling phase is optimised to achieve high sampling linearity. Even harmonics induced by parasitic capacitance are analysed profoundly and mitigated at the level of layout. The measured SNDR and SFDR are 63 and 78 dB with 38.1 MHz input, respectively, and remain 63 and 77 dB with Nyquist input. The ADC core area is 1.6 mm² and consumes 165 mW (reference buffer included, LVDS excluded) at 250 MS/s under 1.3 V.     

High-efficiency GaInAsSb/GaAlAsSb photodiodes for 0.9-to 2.55-µm spectral range with a large-diameter active area

The results of a study aimed at the fabrication of high-sensitivity photodiodes for the 0.9-to 2.55-µm spectral range with a photosensitive area diameter as large as 1–3 mm are presented. A large range of photodiodes based on GaSb/GaInAsSb/GaAlAsSb heterostructures with a long-wavelength edge of spectral sensitivity λ=2.4 and λ=2.55 µm have been developed. The special features of the photodiodes are their high monochromatic current sensitivity in the spectral peak, high operating speed, and low reverse dark current density. The detectivity of photodiodes estimated from the measured noise level and monochromatic current sensitivity in the spectral peak reaches D*(λ_max, 1000, 1)=(0.8–1.0)×10¹¹ Hz^1/2 cm W^?1.     

A 1.1-mW 10-bit 50-MSample/s hybrid two-step ADC in 0.13-µm CMOS technology

This paper presents a hybrid two-step analog-to-digital converter (ADC) that employs a successive approximation register (SAR) ADC and a time-to-digital converter (TDC)-based ADC as coarse and fine converters, respectively. By exploiting the respective advantages of the SAR and TDC architectures, the two-step ADC is realized without a high-gain amplifier for high linearity of a multiplying digital-to-analog converter. Thus, the proposed architecture can implement a low-power ADC without compromising operational speed. In addition, two digital error corrections are used to compensate for TDC error and the final ADC output, respectively. A 10-bit 50 MS/s ADC is fabricated in a 0.13-μm complementary metal–oxide–semiconductor process and occupies a 0.12-mm² die area. Furthermore, it consumes only 1.1 mW and achieves a signal-to-noise distortion ratio and spurious-free dynamic range of 53.67 and 60 dB, respectively, resulting in a 53.7 fJ/conversion-step at a 25-MHz full-scale input.     

A 0.13-µm implementation of 5 Gb/s and 3-mW folded parallel architecture for AES algorithm

A new architecture for encrypting and decrypting the confidential data using Advanced Encryption Standard algorithm is presented in this article. This structure combines the folded structure with parallel architecture to increase the throughput. The whole architecture achieved high throughput with less power. The proposed architecture is implemented in 0.13-µm Complementary metal–oxide–semiconductor (CMOS) technology. The proposed structure is compared with different existing structures, and from the result it is proved that the proposed structure gives higher throughput and less power compared to existing works.     

All Optical Wavelength Conversion from 1.3μm to 1.55μm Using Two-segment DFB Lasers

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台积电跨进0．15μm联电0．18μm工艺接单

台积电、联电陆续进入双Φ300ram晶圆厂时代，在Φ300mm厂产能持续扩充，IC设计客户工     

All Optical Wavelength Conversion from 1.3μm to 1.55μm Using Two—segment DFB Lasers^①

All-optical wavelength converters are expected to become key components in the future broadband networks.Here a two-segment DFB laser for the first time is used as an all-optical wavelength converter.Using this laser,all-optical wavelength conversion from1.3μm tp 1.55μm is demonstrated。     

Spectral characteristics of lasers based on InGaAsSb/InAsSbP double heterostructures (λ=3.0–3.6 µm)

It is shown that an increase in the internal losses beyond the lasing threshold in the lasers based on InGaAsSb/InAsSbP double heterostructures (wavelength range λ=3.0–3.6 µm, temperature T=77 K) causes the current-related shift of the laser mode to shorter wavelengths. This shift is as large as 80 cm^?1/A and can explain the broadening of the laser line from 5 to 7 MGz as the pump current increases.     

Influence of rapid high-temperature anneals on the photoluminescence of erbium-doped GaN in the wavelength interval 1.0–1.6 µm

The influence of rapid-anneal conditions and subsequent coimplantation of oxygen ions on the photoluminescence of erbium ions implanted with an energy of 1 MeV and dose of 5×10¹⁴ cm⁻² in MOCVD-grown GaN films is investigated. The erbium photoluminescence intensity at a wavelength ∼ 1.54 μm increases as the fixed-time (15 s) anneal temperature is raised from 700 °C to 1300 °C. The erbium photoluminescence intensity can be increased by the coimplantation of oxygen ions at anneal temperatures in the indicated range below 900 °C. The transformation of the crystal structure of the samples as a result of erbium-ion implantation and subsequent anneals is investigated by Raman spectroscopy. Fiz. Tekh. Poluprovodn. 33, 3–8 (January 1999)     

LTC2389-18：模数转换器

凌力尔特公司推出业界最陕的18位无周期延迟SARADC（模数转换器）LTC2389-18。在采样率高达2．5Msps时,LTC2389．18实现了无与伦比的99．8dBSNR和．116dBTHD。LTC2389．18采用单5V电源工作,支持3种可通过引脚配置的模拟输入范围,从而非常容易通过单一器件与多个信号链路连接。     

High purity InxGa1−xSb single crystals with cutoff wavelength of 7–8 µm grown by melt epitaxy

For the first time, InGaSb single crystals with a cutoff wavelength of 7–8 μm were successfully grown on GaAs substrates by a new growth technique named melt epitaxy. The band gap of InGaSb layers obviously narrowed compared with those with the same compositions grown by ordinary methods and the longest cutoff wavelength reached 8.3 μm. High electron mobility of 8.05×10⁴ cm²/Vs and low carrier density of 1×10¹⁵ cm⁻³ at 77 K were obtained indicating high purity of InGaSb epilayers.     

0．18μm锗硅3G WCDMA射频芯片组

广晟微电子有限公司采用捷智半导体公司0．18μm锗硅BiCMOS工艺成功开发出中国首次可供商用的3GWCDMA手机射频收发芯片组。广晟微电子的WCDMA射频收发芯片组包括零中频接收芯片（RS1007W）和发射芯片（RS1007RF），广晟微电子拥有该芯片组的全部知识产权。RS1007W和RS1007RF为3GWCDMA手机射频前端芯片组提供了一套完整的方案。RS1007W使用先进的零中频结构，片内集成了低噪声放大器，下变频混频器，自动增益放大器，低通滤波器，∑-△小数分频锁相环，压控振荡器，直流偏移校准电路，RC校准电路和I／Q不平衡校准电路。