Preparation of size controllable copper nanocrystals for nonvolatile memory applications

A method of fabricating Cu nanocrystals embedded in SiO2 dielectric film for nonvolatile memory applications by magnetron sputtering is introduced in this paper. The average size and distribution density of Cu nanocrystal grains are controlled by adjusting experimental parameters. The relationship between nanocrystal floating gate micro-structure and its charge storage capability is also discussed theoretically.     

LaTiON/LaON as band-engineered charge-trapping layer for nonvolatile memory applications

Charge-trapping characteristics of stacked LaTiON/LaON film were investigated based on Al/Al₂O₃/LaTiON-LaON/SiO₂/Si (band-engineered MONOS) capacitors. The physical properties of the high-k films were analyzed by X-ray diffraction, transmission electron microscopy and X-ray photoelectron spectroscopy. The band profile of this band-engineered MONOS device was characterized by investigating the current-conduction mechanism. By adopting stacked LaTiON/LaON film instead of LaON film as charge-trapping layer, improved electrical properties can be achieved in terms of larger memory window (5.4 V at ±10-V sweeping voltage), higher program speed with lower operating gate voltage (2.1 V at 100-μs +6 V), and smaller charge loss rate at 125 °C, mainly due to the variable tunneling path of charge carriers under program/erase and retention modes (realized by the band-engineered charge-trapping layer), high trap density of LaTiON, and large barrier height at LaTiON/SiO₂ (2.3 eV).     

Bionanodot monolayer array fabrication for nonvolatile memory application

A polyelectrolyte thin film which was simply spin-coated on a substrate showed the high-density adsorption of bionanodot-accommodated ferritins through electrostatic interaction. Solution pH adjustment facilitated the control of adsorption density to a value grater than 80% of the theoretical maximum density. The formed polyelectrolyte film was very thin and vulnerable like protein, therefore, only the array with densely adsorbed bionanodot was left on the substrate after organic component removal. The floating nanodot gate type MOS capacitor fabricated with this bionanodot array showed a memory effect, and no negative influences of polymer such as carrier trapping on the capacitance-voltage characteristics was observed.     

Rapid thermal oxygen annealing formation of nickel silicide nanocrystals for nonvolatile memory

Discrete NiSi nanocrystals were synthesized by rapid thermal oxygen annealing of very thin Si/Ni/Si films on a SiO₂ tunneling layer. They were used to fabricate metal?Coxide?Csemiconductor capacitor memory. Electrical properties of the memory device such as programming, erasing and retention were characterized and good performance was achieved.     

MgO(001) barrier based magnetic tunnel junctions and their device applications

Spintronics has received a great attention and significant interest within the past decades,and provided considerable and remarked applications in industry and electronic information etc.In spintronics,the MgO based magnetic tunnel junction(MTJ) is an important research advancement because of its physical properties and excellent performance,such as the high TMR ratio in MgO based MTJs.We present an overview of more than a decade development in MgO based MTJs.The review contains three main sections.(1) Research of several types of MgO based MTJs,including single-crystal MgO barrier based-MTJs,double barrier MTJs,MgO based MTJs with interlayer,novel electrode material MTJs based on MgO,novel barrier based MTJs,novel barrier MTJs based on MgO,and perpendicular MTJs.(2) Some typical physical effects in MgO based MTJs,which include six observed physical effects in MgO based MTJs,namely spin transfer torque(STT) effect,Coulomb blockade magnetoresistance(CBMR) effect,oscillatory magnetoresistance,quantum-well resonance tunneling effect,electric field assisted magnetization switching effect,and spincaloric effect.(3) In the last section,a brief introduction of some important device applications of MgO based MTJs,such as GMR & TMR read heads and magneto-sensitive sensors,both field and current switching MRAM,spin nano oscillators,and spin logic devices,have been provided.     

Amphoteric trap modeling of multidielectric scaled SONOS nonvolatile memory structures

We have characterized multidielectric scaled SONOS nonvolatile memory structures with the quasi-static linear voltage ramp (LVR) technique and dynamic pulse measurements. We have formulated physically-based ERASE/WRITE and retention methods with deep level amphoteric traps which capture and emit carriers to the bands in the silicon nitride film. Amphoteric trap parameters are extracted by the LVR technique. ERASE/WRITE and retention amphoteric trap model simulations agree well with the experimental dynamic pulse measurements. Experimental scaled SONOS structures have been fabricated with tunnel oxide X_OT=20 Å, nitride X_N=30 Å and blocking oxide X_OB=55 Å and demonstrated a static flatband shift of 3.6 V with ±5 V programming voltages. These structures may be used as the nonvolatile memory element in high density VLSI circuits.     

Biaxial anisotropy for memory applications

This paper discusses the behaviour of pure biaxial and mixed uniaxial and biaxial films and its application for design of memories. Experimental results of a special type of NDRO system utilizing a unique bit reversal phenomenon have also been described.Submitted for publication, not presented at the IVth ICMTF.     

Temperature and frequency dependence of the ferroelectric characteristics of BaTiO<Subscript>3</Subscript> thin films for nonvolatile memory applications

Ferroelectric thin films of BaTiO₃ were successfully deposited on SiO₂/Si substrate under the optimal rf magnetron sputtering conditions, and their electrical and ferroelectric characteristics were discussed. The memory window, capacitance, threshold voltage and leakage current density of MFIS structure under different frequencies and temperatures were also reported. The variations of ferroelectric capacitance and threshold voltage would be attributed to the as-deposited BaTiO₃ films of MFIS structure as the temperature and frequency increased. Besides, the memory window, threshold voltage and leakage current density would be degraded from 4 V, 5 V and 8×10^-10 A/cm² to 2.5 V, 10 V and 5×10^-4 A/cm², respectively, as the temperature increased from 25 to 90 °C. PACS 77.84.-s; 81.15.Cd; 73.40.Qv; 51.50.+v; 67.80.Gb     

Numerical simulation study of organic nonvolatile memory with polysilicon floating gate

A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated,in which polysilicon is sandwiched between oxide layers as a floating gate.Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed.The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing(P/E) operations at various P/E voltages are discussed.The simulated results show that present memory exhibits a large memory window of 57.5 V,and a high read current on/off ratio of ≈ 10~3.Compared with the reported experimental results,these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects,which shows great promise in device designing and practical application.     

Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

Based on the charge storage mode,it is important to investigate the scaling dependence of memory performance in silicon nanocrystal(Si-NC) nonvolatile memory(NVM) devices for its scaling down limit.In this work,we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor(CMOS) technology.It is found that the memory windows of eight kinds of test key cells are almost the same of about1.64 V @ ±7 V/1 ms,which are independent of the gate area,but mainly determined by the average size(12 nm) and areal density(1.8×10~(11)/cm~2) of Si-NCs.The program/erase(P/E) speed characteristics are almost independent of gate widths and lengths.However,the erase speed is faster than the program speed of test key cells,which is due to the different charging behaviors between electrons and holes during the operation processes.Furthermore,the data retention characteristic is also independent of the gate area.Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration.     

Cobalt metal nanoparticles embedded in SiO2 dielectric layer for the application of nonvolatile memory

Metal–oxide–semiconductor structures (MOS) with the embedded Co nanoparticles (NPs) were efficiently fabricated by utilizing an external laser irradiation technique for the application of nonvolatile memory. Images of high resolution transmission electron microscopy measurements exhibited that the Co NPs of 5 nm in diameter were clearly embedded in SiO₂ gate oxide. Capacitance–voltage measurements certainly exhibited flat-band voltage shift of 2.2 V from 2 V to −8 V in sweeping range. The retention characteristics of MOS capacitors with the embedded Co NPs were also studied as a function of tunnel oxide thickness to confirm the suitability of nonvolatile memory devices with metal NPs. The experimental results reveal that our unique laser process will give possible promise for experimental efficient formation or insertion of metal NPs inside the gate oxide.     

TiO_x-based self-rectifying memory device for crossbar WORM memory array applications

Resistive switching with a self-rectifying feature is one of the most effective solutions to overcome the crosstalk issue in a crossbar array. In this paper, a memory device based on Pt/TiO_x/W structure with self-rectifying property is demonstrated for write-once-read-many-times(WORM) memory application. After programming, the devices exhibit excellent uniformity and keep in the low resistance state(LRS) permanently with a rectification ratio as high as 10⁴ at ±1 V. The self-rectifying resistive switching behavior can be attributed to the Ohmic contact at TiO_x/W interface and the Schottky contact at Pt/TiO_x interface. The results in this paper demonstrate the potential application of TiO_x-based WORM memory device in crossbar arrays.     

The charge storage characteristics of ZrO2 nanocrystallite-based charge trap nonvolatile memory

ZrO2 nanocrystallite-based charge trap flash memory capacitors incorporating a(ZrO2)0.6(SiO2)0.4 pseudobinary high-k oxide film as the charge trapping layer were prepared and investigated.The precipitation reaction in the charge trapping layer,forming ZrO2 nanocrystallites during rapid thermal annealing,was investigated by transmission electron microscopy and X-ray diffraction.It was observed that a ZrO2 nanocrystallite-based memory capacitor after post-annealing at 850℃ for 60s exhibits a maximum memory window of about 6.8V,good endurance and a low charge loss of ～25% over a period of 10 years(determined by extrapolating the charge loss curve measured experimentally),even at 85℃.Such 850℃-annealed memory capacitors appear to be candidates for future nonvolatile flash memory device applications.     

Physical and electrical characteristics of Ba(Zr0.1Ti0.9)O3 thin films under oxygen plasma treatment for applications in nonvolatile memory devices

In this study, the effects of oxygen gas plasma treatment on the surface of Ba(Zr_0.1Ti_0.9)O₃ (BZT) films are investigated. The influence of oxygen plasma treatment on the crystal structure is developed by X-ray diffraction patterns and on the electrical characteristics are measured by the Al/BZT/Pt capacitor (metal–dielectric–metal) structure. Experimental results show that the capacitance increases and the leakage current density decreases as the oxygen plasma is treated on the BZT films. These results clearly indicate that the electrical characteristics of BZT films have effectively improved by means of the oxygen plasma surface treatment process. PACS 77.84.-s; 81.15.Cd; 73.40.Qv; 77.22.Ej; 51.50.+v     

Self‐formed Schottky barrier induced selector‐less RRAM for cross‐point memory applications

We propose a selector‐less Pr_0.7Ca_0.3MnO₃ (PCMO) based resistive‐switching RAM (RRAM) for high‐density cross‐point memory array applications. First, we investigate the inhomogeneous barrier with an effective barrier height (Φ_eff), i.e., self‐formed Schottky barrier. In addition, a scalable 4F² selector‐less cross‐point 1 kb RRAM array has been successfully fabricated, demonstrating set, reset, and read operation for high cell efficiency and high‐density memory applications. (© 2012 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Resistance of a tunnel barrier with a pinhole

Transport properties of a system composed of two conducting ferromagnetic layers connected through a cylindrical nanowire are studied. The system models a tunnel barrier in which the conducting layers are connected through a pinhole. The resistance and the tunnel magnetoresistance are calculated as a function of the pinhole radius and the diffuse resistance of the conducting layers. The ratio between the contributions of the diffuse resistance of the layers and the ballistic resistance of the pinhole to the total resistance is studied.     

Low voltage program-erasable Pd-Al_2O_3-Si capacitors with Ru nanocrystals for nonvolatile memory application

Pd-Al2O3-Si capacitors with Ru nanocrystals are fabricated and electrically characterized for nonvolatile memory application.While keeping the entire insulator Al2O3thickness fixed,the memory window has a strong dependence on the tunneling layer thickness under low operating voltages,whereas it has weak dependence under high operating voltages.As for the optimal configuration comprised of 6-nm tunneling layer and 22-nm blocking layer,the resulting memory window increases from 1.5 V to 5.3 V with bias pulse increasing from 10 5s to 10 2s under±7 V.A ten-year memory window as large as 5.2 V is extrapolated at room temperature after±8 V/1 ms programming/erasing pulses.     

Effect of F-inclusion in nm-thick MgO tunnel barrier

We investigated the electrical characteristics of MgO tunnel barriers while we add F during oxidation process of nm-thick Mg layer. Specifically we measured dI/dV and d²I/dV² data of MgO tunnel barriers as we add F. When comparing the data of magnesium oxyfluoride tunnel barriers to those of aluminum oxyfluoride data, we have found that effect of F-inclusion in MgO is different from that in AlO_x; F-inclusion in MgO barrier makes the barrier more symmetric while F-inclusion in AlO_x barrier makes the barrier more asymmetric. However, the d²I/dV² data of MgO did not change much even after F-inclusion, suggesting a very small amount of F-doping can make significant change in oxidation process of nm-thick Mg layer. We believe this result from the fact the oxidation process of nm-thick Mg layer is reaction-limited while the oxidation process of Al layer is diffusion-limited.     

Photonic integrated device for chaos applications in communications

A novel photonic monolithic integrated device consisting of a distributed feedback laser, a passive resonator, and active elements that control the optical feedback properties has been designed, fabricated, and evaluated as a compact potential chaotic emitter in optical communications. Under diverse operating parameters, the device behaves in different modes providing stable solutions, periodic states, and broadband chaotic dynamics. Chaos data analysis is performed in order to quantify the complexity and chaoticity of the experimental reconstructed attractors by applying nonlinear noise filtering.