埋置元件PCB的发展和无源元件结构的变化

概述了新的安装结构的变化，埋置元件PBC的发展，无源元件结构的变化和今后的方向。     

3DIC集成与硅通孔(TSV)互连

介绍了3维封装及其互连技术的研究与开发现状,重点讨论了垂直互连的硅通孔（TSV）互连工艺的关键技术及其加工设备面临的挑战．提出了工艺和设备开发商的应对措施并探讨了3DTSV封装技术的应用前景。     

集成无源元件技术和产品的最新动向

集成无源元件(IPD)的产品在1980年代后期开始面市，早期的封装采用双列直插的通孔式结构，如DIP、SOIC塑料封装，1990年代后期推出尺寸更小的表贴封装，如SOP、SOT等产品。     

Si基芯片光互连研究进展

综述了近年来Si基光互连,尤其是和微电子工艺兼容程度较高的芯片间和芯片内的光互连的进展。Luxtera公司已经率先实现了除光源外的所有光子器件的单片集成,IBM也提出并开始实施微电子学领域的片内光互连的技术方案,但Si基光互连大部分还停留在各构建单元器件性能提高的阶段,例如Si基发光、Si波导、Si波导耦合器、Si基调制器及光开关、Si基探测器以及用于光波导器件阵列的WDM技术。此外,还对Si基光源、光纤耦合、偏振敏感性以及光子器件的热稳定性提出了看法。总之,随着各种构建单元器件的综合性能、CMOS工艺兼容度、制备成品率的提高以及光电融合单片集成工艺的突破,光互连最终会成为现实,并引发微电子技术和IC行业的下一场革命。     

使用在有机基板中埋置无源元件的方法设计集成低噪声放大器

低噪声放大器(LNA)的噪声指数是由电感器的品质因数Q决定的。由于S中高Q电感器的缺乏，在例如GSM和W-CDMA等高灵敏度应用中，完全集成的CMOS LNA的发展已受到很大限制。目前，高Q电感器设计(埋置于低成本的IC封装中)的发展使得射频(RF)前端的单管封装集成成为可能。这些埋置无源元件提供了一个使分立元件或芯片上的低Q无源元件灵活变化、以达到完全集成的方法。与芯片上的低Q电感器和具有固定Qs的分立元件比较而言，这些埋置无源元件的使用同样会引起无源Q作为一个新的变量在电路设计中的应用。然而，高Q同样会引起新的调整，特别是在器件尺寸方面。本文为使用埋置无源元件来设计完全集成的CMOS LNA提供了新的优化战略。为较高Q值所做的电感器尺寸调整已经能够适应LNA的设计方案。文章还介绍了在封装基板中多个埋置元件应用的设计，特别涉及到了无源元件和基准接地布线之间的相互耦合。     

与半导体IC相融合的互连板的电镀技术动向

概述了IC芯片的铜镶嵌构造和高端电子安装领域中与半导体IC相融合的互连板的电镀技术动向。     

基于双面TSV互连技术的超厚硅转接板制备

为了满足异质集成应用中对转接板机械性能方面的需求,提出了一种基于双面硅通孔(TSV)互连技术的超厚硅转接板的制备工艺方案。该方案采用Bosch工艺在转接板正面形成300μm深的TSV,通过结合保型性电镀工艺和底部填充电镀工艺进行TSV填充。在转接板背面工艺中首先通过光刻将双面TSV的重叠部分控制在一个理想的范围内,然后经深反应离子刻蚀(DRIE)工艺形成深度为20μm的TSV并完成绝缘层开窗,最后使用保型性电镀完成TSV互连。通过解决TSV刻蚀中侧壁形貌粗糙、TSV底部金属层过薄和光刻胶显影不洁等关键问题,最终得到了双面互连电阻约为20Ω、厚度约为323μm的硅转接板。     

埋入无源元件集成的高密度印制板

概述了Motorola的埋入PTF电阻、CFP电容和螺旋电感等无源集成的高密度印制板和埋入无源集成技术。     

基于硅桥芯片互连的芯粒集成技术研究进展

在后摩尔时代,通过先进封装技术将具有不同功能、不同工艺节点的异构芯粒实现多功能、高密度、小型化集成是延长摩尔定律寿命的有效方案之一。在众多先进封装解决方案中,在基板或转接板中内嵌硅桥芯片不仅能解决芯粒间局域高密度信号互连问题,而且相较于TSV转接板方案,其成本相对较低。因此,基于硅桥芯片互连的异构芯粒集成技术被业内认为是性能和成本的折中。总结分析了目前业内典型的基于硅桥芯片互连的先进集成技术,介绍其工艺流程和工艺难点,最后展望了该类先进封装技术的发展。     

硅通孔互连技术的可靠性研究

随着电子封装持续向小型化、高性能的方向发展,基于硅通孔的三维互连技术已经开始应用到闪存、图像传感器的制造中,硅通孔互连技术的可靠性问题越来越受到人们的关注。将硅通孔互连器件组装到PCB基板上,参照JEDEC电子封装可靠性试验的相关标准,通过温度循环试验、跌落试验和三个不同等级的湿度敏感性测试研究了硅通孔互连器件的可靠性。互连器件在温度循环试验和二、三级湿度敏感试验中表现出很好的可靠性,但部分样品在跌落试验和一级湿度敏感性测试中出现了失效。通过切片试验和扫描电子显微镜分析了器件失效机理并讨论了底部填充料对硅通孔互连器件可靠性的影响。     

Si电光调制器与GeSi／Si异质结探测器的集成

提出了一种调制器与探测器集成的方案。它是在＜１００＞ｎ＾＋－Ｓｉ衬底上用外延、两次扩散等常规工艺先制作Ｓｉ脊表波导光调制器，接着在调制器光输出端的波导上用分子束外延和反应离子刻蚀制作ｐ－Ｇｅ０．６Ｓｉ０．４／ｐ－Ｓｉ探测器。     

Large area depositon of Cd1-xZnxTe on GaAs and Si substrates by metalorganic chemical vapor deposition

Results of large-area (up to 1000 cm²/run) Cd_1-xZn_xTe heteroepitaxy on both GaAs and GaAs/Si substrates by metalorganic chemical vapor deposition (MOCVD) are presented. Cd_1-xZn_xTe (x = 0-0.1) films exhibited specular surface morphology, 1% thickness uniformity (standard deviation), and compositional uniformity (Δx) of ±0.002 over 100 mm diam substrates. For selected substrate orientations and deposition conditions, the only planar defects exhibited by (lll)B Cd_1-xZn_xTe/GaAs/Si films were lamella twins parallel to the CdTe/GaAs interface; these do not propagate through either the Cd_1-xZn_xTe layer or subsequently deposited liquid phase epitaxy (LPE) HgCdTe layer(s). Background Ga and As-impurity levels for Cd_1-xZn_xTe on GaAs/Si substrates were below the secondary ion mass spectroscopy detection limit. Preliminary results of HgCdTe liquid phase epitaxy using a Te-rich melt on Si-based substrates resulted in x-ray rocking curve linewidths as narrow as 72 arc-sec and etch-pit densities in the range 1 to 3 x 10⁶ cm².     

Potential of asymmetrical Si/Ge and Ge/Si based hetero-junction transit time devices over homo-junction counterparts for generation of high power

Static and dynamic properties of both complementary n-Ge/p-Si and p-Ge/n-Si hetero-junction Double-Drift IMPATT diodes have been investigated by an advanced and realistic computer simulation technique, developed by the authors, for operation in the Ka-, V- and W-band frequencies. The results are further compared with corresponding Si and Ge homo-junction devices. The study shows high values of device efficiency, such as 23%, 22% and 21.5%, for n-Ge/p-Si IMPATTs at the Ka, V and W bands, respectively. The peak device negative conductances for n-Si/p-Ge and n-Ge/p-Si hetero-junction devices found to be 50.7 ? 10⁶ S/m² and 71.3 ? 10⁶ S/m², which are ～3-4 times better than their Si and Ge counterparts at the V-band. The computed values of RF power-density for n-Ge/p-Si hetero-junction IMPATTs are 1.0 ? 10⁹, 1.1 ? 10⁹ and 1.4 ? 10⁹ W/m², respectively, for Ka-, V- and W-band operation, which can be observed to be the highest when compared with Si, Ge and n-Si/p-Ge devices. Both of the hetero-junctions, especially the n-Ge/p-Si hetero-junction diode, can thus become a superior RF-power generator over a wide range of frequencies. The present study will help the device engineers to choose a suitable material pair for the development of high-power MM-wave IMPATT for applications in the civil and defense-related arena.     

Potential of asymmetrical Si/Ge and Ge/Si based hetero-junction transit time devices over homo-junction counterparts for generation of high power

Static and dynamic properties of both complementary n-Ge/p-Si and p-Ge/n-Si hetero-junction Double-Drift IMPATT diodes have been investigated by an advanced and realistic computer simulation technique,developed by the authors,for operation in the Ka-,V- and W-band frequencies.The results are further compared with corresponding Si and Ge homo-junction devices.The study shows high values of device efficiency,such as 23%, 22%and 21.5%,for n-Ge/p-Si IMPATTs at the Ka,V and W bands,respectively.The peak device negative conductances for n-Si/p-Ge and n-Ge/p-Si hetero-junction devices found to be 50.7×10~6 S/m~2 and 71.3×10~6 S/m~2, which are～3-4 times better than their Si and Ge counterparts at the V-band.The computed values of RF power-density for n-Ge/p-Si hetero-junction IMPATTs are 1.0×10~9,1.1×10~9 and 1.4×10~9 W/m~2,respectively,for Ka-,V- and W-band operation,which can be observed to be the highest when compared with Si,Ge and n-Si/p-Ge devices.Both of the hetero-junctions,especially the n-Ge/p-Si hetero-junction diode,can thus become a superior RF-power generator over a wide range of frequencies.The present study will help the device engineers to choose a suitable material pair for the development of high-power MM-wave IMPATT for applications in the civil and defense-related arena.     

High quality AIN and GaN grown on compliant Si/SiC substrates by gas source molecular beam epitaxy

Epitaxial layers of AlN and GaN were grown by gas source molecular-beam epitaxy on a composite substrate consisting of a thin (250 nm) layer of silicon (111) bonded to a polycrystalline SiC substrate. Two dimensional growth modes of AlN and GaN were observed. We show that the plastic deformation of the thin Si layer results in initial relaxation of the AlN buffer layer and thus eliminates cracking of the epitaxial layer of GaN. Raman, x-ray diffraction, and cathodoluminescence measurements confirm the wurtzite structure of the GaN epilayer and the c-axis crystal growth orientation. The average stress in the GaN layer is estimated at 320 MPa. This is a factor of two less than the stress reported for HVPE growth on 6H-SiC (0001).     

The separation of generation lifetimes of Si and SiGe using capacitance-transient measurements on MOS capacitors formed by plasma anodisation of Si:Si0.9Ge0.1:Si substrates

A simple technique leading to the measurement of minority carrier lifetimes of UHV compatible LPCVD Si and SiGe by C–t depth profiling of Metal:Oxide:Si:SiGe:Si structures is reported. A high quality gate oxide is realised by low temperature (<100°C) plasma anodisation thereby reducing any oxidation effects on the underlying epitaxial layer quality. Capacitance response times were observed for an impurity concentration of 2.5×10¹⁷ cm⁻³, giving rise to generation lifetimes of the Si and Si_0.9Ge_0.1 of >0.55 and 2.6 μs respectively, reflective of very high quality epitaxial semiconductor material.     

Structural and photoelectrical characteristics of Si/6H-SiC heterojunctions prepared by hot-wall chemical vapor deposition

Based on a potential application for the Si/SiC heterojunction to realize light control of SiC devices, structures and electrical properties of boron-doped silicon layer deposited on the n-type 6H-SiC substrate by hot-wall chemical vapor deposition were investigated in this paper.X-ray diffraction analysis and scanning electronic microscopy were used to characterize the crystal structure and morphology of the deposited silicon layer. Results of I–V and C–V measurements indicated that the heterojunction was abrupt manifesting obvious p–n junction properties. During the I–V measurement, the Si/SiC heterojunction developed a remarkable photovoltaic effect under illumination condition.     

Growth and fabrication of AlGaN/GaN HEMT based on Si(1 1 1) substrates by MOCVD

AlGaN/GaN high electron mobility transistor (HEMT) hetero-structures were grown on the 2-in Si (1 1 1) substrate using metal-organic chemical vapor deposition (MOCVD). Low-temperature (LT) AlN layers were inserted to relieve the tension stress during the growth of GaN epilayers. The grown AlGaN/GaN HEMT samples exhibited a maximum crack-free area of 8 mm×5 mm, XRD GaN (0 0 0 2) full-width at half-maximum (FWHM) of 661 arcsec and surface roughness of 0.377 nm. The device with a gate length of 1.4 μm and a gate width of 60 μm demonstrated maximum drain current density of 304 mA/mm, transconductance of 124 mS/mm and reverse gate leakage current of 0.76 μA/mm at the gate voltage of −10 V.     

Microstructural and optical characterization of CdTe(211)B/ZnTe/Si(211) grown by molecular beam epitaxy

CdTe layers have been grown by molecular beam epitaxy on 3 inch nominal Si(211) under various conditions to study the effect of growth parameters on the structural quality. The microstructure of several samples was investigated by high resolution transmission electron microscopy (HRTEM). The orientation of the CdTe layers was affected strongly by the ZnTe buffer deposition temperature. Both single domain CdTe(133)B and CdTe(211)B were obtained by selective growth of ZnTe buffer layers at different temperatures. We demonstrated that thin ZnTe buffer layers (<2 nm) are sufficient to maintain the (211) orientation. CdTe deposited at ∼300°C grows with its normal lattice parameter from the onset of growth, demonstrating the effective strain accommodation of the buffer layer. The low tilt angle (<1°) between CdTe[211] and Si[211] indicates that high miscut Si(211) substrates are unnecessary. From low temperature photoluminescence, it is shown that Cd-substituted Li is the main residual impurity in the CdTe layer. In addition, deep emission bands are attributed to the presence of As_Te and Ag_Cd acceptors. There is no evidence that copper plays a role in the impurity contamination of the samples.     

Growth and characterization of GaAs films deposited on Ge/Si composite substrates by metalorganic chemical vapor deposition

We report the results of studies which have been made on heteroepitaxial layers of GaAs and AlGaAs grown by metalorganic chemical vapor deposition on composite substrates that consist of four different types of heteroepitaxial layered structures of Ge and Ge-Si grown by molecular beam epitaxy on (100)-oriented Si substrates. It is found that of the four structures studied, the preferred composite substrate is a single layer of Ge ∼1 μm thick grown directly on a Si buffer layer. The double-crystal X-ray rocking curves of 2 μm thick GaAs films grown on such substrates have FWHM values as small as 168 arc sec. Transmission electron micrographs of these Ge/Si composite substrates has shown that the number of dislocations in the Ge heteroepitaxial layer can be greatly reduced by an anneal at about 750° C for 30 min which is simultaneously carried out during the growth of the GaAs layer. The quality of the GaAs layers grown on these composite substrates can be greatly improved by the use of a five-period GaAs-GaAsP strained-layer superlattice (SLS). Using the results of these studies, low-threshold optically pumped AlGaAs-GaAs DH laser structures have been grown by MOCVD on MBE Ge/Si composite substrates.