Spin cast self-assembled monolayer field effect transistors

Top-contact self-assembled monolayer field-effect transistors (SAMFETs) were fabricated through both spin-coating and solution assembly of a semiconducting phosphonic acid-based molecule (11-(5?-butyl-[2,2′;5′,2″;5″,2?;5?,2?]quinquethiophen-5-yl)undecylphosphonic acid) (BQT-PA). The field-effect mobilities of both spin-cast and solution assembled SAMFETs were 1.1-8.0 × 10⁻⁶ cm² V⁻¹ s⁻¹ for a wide range of channel lengths (between 12 and 80 μm). The molecular monolayers were characterized by atomic force microscopy (AFM), attenuated total reflectance-Fourier transform infrared spectroscopy (ATR-FTIR), and near edge X-ray absorption fine structure (NEXAFS) spectroscopy. It was found that the BQT-PA monolayer films exhibit dense surface coverage, bidentate binding, and tilt angles of ∼32° and ∼44° for the thiophene rings and alkyl chain, respectively. These results indicate that rapid throughput of fabricating SAMFETs is possible even by spin-coating.     

1 Volt organic transistors with mixed self-assembled monolayer/Al2O3 gate dielectrics

Control of the threshold voltage and the subthreshold swing is critical for low voltage transistor operation. In this contribution, organic field-effect transistors (OFETs) operating at 1 V using ultra-thin (∼4 nm), self-assembled monolayer (SAM) modified aluminium oxide layers as the gate dielectric are demonstrated. A solution-processed donor–acceptor semiconducting polymer poly(3,6-di(2-thien-5-yl)-2,5-di(2-octyldodecyl)-pyrrolo[3,4-c]pyrrole-1,4-dione)thieno[3,2-b]thiophene) (PDPP2TTT) is used as the active layer. It is shown that the threshold voltage of the fabricated transistors can be simply tuned by carefully controlling the composition of the applied SAM. The optimised OFETs display threshold voltages around 0 V, low subthreshold slopes (150 ± 5 mV/dec), operate with negligible hysteresis and show average saturated field-effect mobilities in excess of 0.1 cm²/V s at 1 V.     

Fast detection of blood gases by solution gated organic field effect transistors

We characterize the electrochemical stability of the organic semiconductor Dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) in aqueous solutions. Electrochemical stability of DNTT in solution is validated by cyclic voltammetry and demonstrated by solution gating of DNTT organic field effect transistors (OFETs). Then, we investigate the response time of DNTT OFETs to ammonia, a common blood gas. For bare OFETs, the response time to ammonia is 1–2s only. The exact response time depends on the DNTT film morphology; the fastest response is obtained for pronounced 3D (Volmer-Weber) growth. By comparing OFETs with and without a semipermeable parylene-C encapsulation layer, the influence of the capping on the response time is investigated. An encapsulation layer of 86 nm prolongs the response time to 100s, indicating that parylene-C acts as an efficient diffusion barrier for ammonia.     

Stabilization of space charge polarization in ion-dispersed gate dielectric layer of organic transistors by ultraviolet illumination for write-once read-many memory

In this work, a new type organic field effect transistor (OFET) based write-once read-many memory (WORM) device was developed. The device uses an ultraviolet (UV) cross-linkable matrix polymer mixed with ionic compounds to form an ion-dispersed gate dielectric layer. Under an applied gate voltage bias, migration of cations and anions in opposite directions forms space charge polarization in the gate dielectric layer, resulting in change of the electrical characteristics. It is shown that, with UV illumination to cross-link the matrix polymer, the formed space charge polarization can be stabilized. Therefore, the OFET can be operated as a WORM with the applied voltage bias to define the polarization and in turn the stored data, and the UV illumination to stabilize the stored data.     

Mobility enhancement of DNTT and BTBT derivative organic thin-film transistors by triptycene molecule modification

Interface modification with a particular triptycene molecule that spontaneously forms a highly uniform molecule layer is a promising technique for realizing high-performance flexible organic thin-film transistors (OTFTs). Previous studies have shown that the triptycene-modified polymer surface enhances the crystallinity of the small-molecule organic semiconductor (OSC), DNTT (dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene), resulting in improved mobility. However, to date, the effectiveness of triptycene modification for the other OSCs has not been confirmed. Here, we report on the positive effect of triptycene layers on four different thienoacene-based OSCs (C₁₀-DNTT, DPh-DNTT, C₈-BTBT ([1]benzothieno[3,2-b][1]benzothiophene), and DPh-BTBT) in OTFTs. Regardless of the OSC type, triptycene-modified OTFTs are found to improve the field-effect mobility. A maximum effective mobility enhancement of 20-fold was obtained for C₁₀-DNTT OTFTs. Furthermore, detailed observations of the surface morphology of the OSCs via scanning electron microscopy revealed that the crystal grain size of the OSC thin films can be increased when triptycene modification is conducted.     

Simultaneous control of molecular orientation and patterning of small-molecule organic semiconductors for organic transistors

Triethylsilylethynyl anthradithiophene (TES-ADT) has been shown to be a promising soluble semiconductor for the active layer of organic field-effect transistors (OFETs) due to its solution processability, chemical stability and excellent electrical properties. However, there are still some problems that need to be resolved for the utilization of TES-ADT in OFETs. One of these problems is a patterning issue to minimize crosstalk between neighboring TES-ADT FETs. To this end, TES-ADT crystals of various shapes need to be patterned at the desired positions. Here, we demonstrated a simple method to fabricate patterned TES-ADT crystals by using a PDMS mold containing 1,2–dichloroethane (DCE) solvent. This method serves the dual purpose of preparing a variety of pattern shapes while simultaneously changing as-spun TES-ADT thin films into crystal patterns. The top-contact OFETs with the TES-ADT crystal patterns exhibited high performance, reaching a field-effect mobility of ∼0.3 cm² V⁻¹s⁻¹.     

Improvement of n-type OTFT electrical stability by gold electrode modification

N-type organic thin film transistors (OTFT) containing modified gold electrodes have been fabricated to investigate the influence of the self assembled monolayer on the transistor characteristics. We report on the effect of drain/source modification by thiol derivatives on the performances, electrical parameters uniformity and electrical stability of C₆₀ transistors. In the literature, electrical instability is often attributed to organic semiconductor (OSC), OSC-insulator interface and insulator. We found here that OSC-metal interfaces affect dramatically the operational stability for bottom gate/bottom contact structure. These effects have been attributed to morphological evolution at the interface metal-OSC induced by the self-assembled monolayers.     

Impact of injection limitations on the contact resistance and the carrier mobility of organic field effect transistors

The contact resistance as well as the mobility have developed to key performance indicators for benchmarking organic field-effect transistors. Typically, conventional methods for silicon transistors are employed for their extraction thereby ignoring the peculiarities of organic transistors. This work outlines the required conditions for using conventional extraction techniques for the contact resistance and the mobility based on TCAD simulations and experimental data. Our experimental data contain both staggered and coplanar structures fabricated by exploiting different optimization techniques like SAM treated electrodes, different shearing speeds, PS blending and silicon oxide functionalization. In addition, the work clarifies how injection limited current–voltage characteristics can affect high-performance organic field-effect transistors. Finally, we introduce a semi-physical model for the contact resistance to accurately interpret extracted benchmark parameters by means of the transfer length method (TLM). Guidelines to use conventional extraction techniques with special emphasis on TLM are also provided.     

Low operational voltage and high performance organic field effect memory transistor with solution processed graphene oxide charge storage media

Low voltage organic field effect memory transistors are demonstrated by adapting a hybrid gate dielectric and a solution processed graphene oxide charge trap layer. The hybrid gate dielectric is composed of aluminum oxide (AlO_x) and [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) plays an important role of both preventing leakage current from gate electrode and providing an appropriate surface energy to allow for uniform spin-casting of graphene oxide (GO). The hybrid gate dielectric has a breakdown voltage greater than 6 V and capacitance of 0.47 μF/cm². Graphene oxide charge trap layer is spin-cast on top of the hybrid dielectric and has a resulting thickness of approximately 9 nm. The final device structure is Au/Pentacene/PMMA/GO/PhO-19-PA/AlO_x/Al. The memory transistors clearly showed a large hysteresis with a memory window of around 2 V under an applied gate bias from 4 V to −5 V. The stored charge within the graphene oxide charge trap layer was measured to be 2.9 × 10¹² cm⁻². The low voltage memory transistor operated well under constant applied gate voltage and time with varying programming times (pulse duration) and voltage pulses (pulse amplitude). In addition, the drain current (I_ds) after programming and erasing remained in their pristine state after 10⁴ s and are expected to be retained for more than one year.     

Effects of semiconductor/dielectric interfacial properties on the electrical performance of top-gate organic transistors

We investigated the effects of varying the properties of the interface between a semiconductor P3HT layer and a dielectric Cytop™ layer on the performances of the resulting transistor devices by comparing the mobilities of devices prepared with bottom gate/bottom contact or top gate/bottom contact architectures. The reduced channel roughness that arose from the thermal annealing step dramatically enhanced the field-effect mobility, yielding the highest mobility yet obtained for a top-gate transistor: 0.12 cm²/V s. High-performance OFETs may be fabricated by controlling the channel roughness and the properties of the interface between the semiconductor and the gate dielectric.     

Improved pentacene growth continuity for enhancing the performance of pentacene-based organic thin-film transistors

This study proposes an alternative planar bottom-contact (pBC) structure to enhance the electrical performance of pentacene-based organic thin-film transistors (OTFTs). This pBC structure uses a bilayer dielectric to control planarization with a precise etch depth and introduces a bilayer photoresist lift-off method to ensure that planarization produces an optimum flatness. Because of the improved growth continuity of pentacene near the edge of the source/drain electrodes, the contact resistance between the source/drain and the pentacene was reduced significantly, thereby enhancing the electrical performance of OTFTs. The mechanism for the enhanced performance was also verified by a physics-based numerical simulation.     

Copper phthalocyanine based vertical organic field effect transistor with naturally patterned tin intermediate grid electrode

We report on low voltage vertical organic field effect transistors using crosslinked poly(vinyl alcohol) (cr-PVA) as gate insulator and copper phthalocyanine (CuPc) as channel semiconductor. Al is used as gate and drain electrode. Sn thin films deposited under proper conditions are used as intermediate grid electrode (source), since the Sn film morphology simultaneously shows pinholes and lateral intergrain connectivity, allowing in-plane charge transport. Our Al/cr-PVA/Sn/CuPc/Al VOFET operates at low voltages, presents specific transconductance of ∼0.45 S m⁻² and a linear source-drain current on gate voltage dependence.     

Small-signal characteristics of fully-printed high-current flexible all-polymer three-layer-dielectric transistors

All-polymer, semi-transparent, three-layer-dielectric (3L) organic field effect transistors (OFETs) are fabricated on polyethylene terephthalate plastic substrate, using high-throughput printing techniques. Analog small-signal characteristics of the 3L OFET are presented and are compared against the previous version of this technology, which was based on a single-layer dielectric and a metal gate electrode. The 3L transistor withstands 50 V, can continuously drive 50 μA/mm, reaches an excellent intrinsic-gain (A_v0) of 43 dB, an equivalent mobility of 0.85 cm²/V, and a transit frequency (f_T) of 68 kHz, well suited for applications such as driving printed piezoelectric loudspeakers and flexible audio systems. The effects of the relaxor-ferroelectric high-k layer in the 3L stack on the gate capacitance, g_m, and A_v0 are measured in the frequency domain. In addition, it is observed that PEDOT:PSS makes a better interface with polymer dielectric comparing to copper particle ink. Five-hour small- and large-signal bias stress tests are performed. A novel direct A_v0 measurement technique, and an improved transconductance extraction method are also presented.     

Micro-scale twistable organic field effect transistors and complementary inverters fabricated by orthogonal photolithography on flexible polyimide substrate

We fabricated micro-scale organic field effect transistors (OFETs) and complementary inverters on a twistable polyimide (PI) substrate by applying orthogonal photolithography. By applying a highly fluorinated photoresist and development solvent, it becomes possible to create organic electronic devices with a micro-scale channel length without damaging the underlying polymer films. The 3 μm-channel twistable pentacene OFET devices and complementary inverters created using p-type pentacene and n-type copper hexadecafluorophthalocyanine exhibited stable electrical characteristics from flat to twist configurations (angle of up to ∼50°). The realization of twistable micro-scale OFETs and inverter devices on a PI substrate may enable the production of functioning organic devices in practical, flexible configurations.     

C60场效应晶体管的制备及修饰层对器件性能影响的研究

以重掺杂Si片作为衬底,SiOe／聚甲基丙烯酸甲酯（PMMA）为双栅绝缘层,C60为有源层,制备了不同修饰层的有机场效应晶体管（OFETs）;研究了不同修饰层的器件对于场效应性能的影响。实验表明,与未加修饰层的器件相比,经过修饰的器件性能有一定的提高,其中Alqa／LiF双修饰层器件的场效应迁移率达到最大,为1．6×1...     

Preparation and properties of thin parylene layers as the gate dielectrics for organic field effect transistors

We report on the fabrication and characterization of parylene C thin layers for organic electronic devices passivation and gate dielectric of organic field effect transistors (OFETs) development. The investigated thin parylene layers were deposited from the vapour phase in thickness ranging from 3 to 800 nm at room temperature. The thickness and surface morphology of parylene layers were characterized by ellipsometry and AFM technique. The quality of parylene structures were analysed by X-ray reflectivity and diffraction as well as micro-Raman spectroscopy. The measurements confirmed perfect homogeneity and structural properties of parylene layers. Two types of pentacene OFETs were prepared on the silicone dioxide and parylene surface with bottom contact structures. The results demonstrated that using parylene, as the gate dielectric layer is an effective method to fabricate OFETs with improved electric characteristics.     

Fabrication of a planar water gated organic field effect transistor using a hydrophilic polythiophene for improved digital inverter performance

A planar water gated OFET (WG-OFET) structure is fabricated by patterning gate, source and drain electrodes on the same plane at the same time. Transistor output characteristics of this novel structure employing commercial regioregular poly(3-hexylthiophene) (rr-P3HT) as polymer semiconductor and deionized (DI) water as gate dielectric show successful field effect transistor operation with an on–off current ratio of 43 A/A and transconductance of 2.5 μA/V. These output characteristics are improved using P3HT functionalized with poly(ethylene glycol) (PEG) (P3HT-co-P3PEGT), which is more hydrophilic, leading to on–off ratio of 130 A/A and transconductance of 3.9 μA/V. Utilization of 100 mM NaCl solution instead of DI water significantly increases the on–off ratio to 141 A/A and transconductance to 7.17 μA/V for commercial P3HT and to 217 A/A and to 11.9 μA/V for P3HT-co-P3PEGT. Finally, transistors with improved transconductances are used to build digital inverters with improved characteristics. Gain of the inverters employing P3HT and P3HT-co-P3PEGT are measured as 2.9 V/V and 10.3 V/V, respectively, with 100 mM NaCl solution.     

Surface modification of printed silver electrodes for efficient carrier injection in organic thin-film transistors

The modification of printed silver electrode surfaces for use as the bottom-contact electrodes of organic thin-film transistors (OTFTs) is reported. Printed silver electrodes fabricated using the surface photoreactive nanometal printing (SuPR-NaP) technique are inevitably covered with an inert surface layer of alkylamines that is originally used for encapsulation of the silver nanoparticles (AgNPs). However, it may act as a built-in protective layer against carrier injections. We demonstrate that a simple vapor exposure method is sufficient for converting the protective layer into a layer that assists carrier injection. As modifiers, we used various types of fluorinated benzenethiols that exhibit a stronger coordination with the silver surfaces than the alkylamimes. We detected the chemical conversion from alkylamine encapsulation to thiol coordination by surface enhanced Raman spectroscopy (SERS) and evaluated the improvement in the carrier injection using a transfer length method (TLM) for the OTFTs. Among the modifiers, the pentafluorobenzenethiol (PFBT) treatment significantly improves the device performance and stability of the OTFTs.     

Comparison of Mg and Zn gate implants for GaAs n-channel junction field effect transistors

Zinc and magnesium implants into GaAs were profiled with secondary ion mass spectroscopy and etching capacitance-voltage to measure the as-implanted and annealed profiles for the eventual formation of shallow p⁺/n junction gates for junction field effect transistors (JFETs). The larger mass of the zinc ions results in shorter projected range with significantly less tailing than magnesium implants. High dose, shallow zinc implants annealed under tungsten gate metal showed good activation with negligible diffusion. The improved profile of the zinc implant, as compared to a similar magnesium implant, allowed a tighter JFET design with increased performance. Zn gated n-channel enhancement mode GaAs JFETs with 0.9 μm gate lengths showed transconductances up to 200 mS/ mm with a f_t of 18 GHZ and a f_max of 37 GHz. The performance of these self-aligned fully implanted JFETs compare favorably with comparably sized implanted MESFETs.     

Carbon nanotube field effect transistors for high performance analog applications: An optimum design approach

There is a need to explore circuit designs in new emerging technologies for their rapid commercialization to extend Moore’s law beyond 22 nm technology node. Carbon nanotube based transistor (CNFET) has significant potential to replace CMOS in the future due to its better electrostatics and higher mobility. This paper presents a complete optimal design of an inverting amplifier in CMOS, CNFET and hybrid technologies. We investigate and conceptually explain the performance measure of the amplifier at 32 nm technology node in terms of operating voltage, number of carbon nanotubes (CNT), diameter and pitch (inter-nanotube distance) variations of carbon nanotubes in a CNFET transistor in pure and hybrid technologies for area, power and performance optimization. This paper also explores the scope, possibilities and challenges associated with pure CNFET and hybrid amplifiers. We have found that pure CNFET amplifier provided good amplification while hybrid pCNFET-nMOS amplifier offered excellent frequency response and pMOS-nCNFET amplifier gave better transient performance compared with planar CMOS.