耦合电感在交错并联断续Buck变换器中的应用研究

文中将耦合电感应用于断续Buck变换器,分析了耦合系数对电流纹波和动态性能的影响,给出了参数设计方法,并进行了仿真实验研究。结果表明,通过合理的设计,耦合电感能够改善电路的稳态和动态性能,同时降低了损耗,提高了电路的效率。     

用于宽输入Buck变换器的高速栅驱动电路

设计了一种混合型的栅极驱动电路,用于宽范围电压输入Buck变换器的高低侧功率管驱动。将闭环的线性稳压器与短脉冲电流源结合,在有效缩短功率管栅极充电时间的同时确保了驱动电压精度。根据典型应用的仿真结果,该结构电路在整个输入电压范围内将功率管开启速度提升了至少41%,提升了电路的最大工作频率。     

Buck变换器拓扑指数改进算法及脆弱性分析

基于拓扑指数的概念,考虑到Buck变换器在连续工作模式(CCM)下的开关状态和占空比,提出并计算了Buck变换器的广义拓扑指数。通过对Buck变换器拓扑指数的改进计算,量化电路拓扑的不同支路以及变换器占空比对变换器脆弱性的影响,进而将脆弱性分析拓展到电力电子电路拓扑的结构性故障的研究。利用Matlab软件仿真分析,此方法的计算结果与仿真结果相符,验证了此方法的有效性。     

基于多频脉冲序列控制Buck变换器的研究

针对开关变换器双频率控制技术存在的输出电压纹波大、输出功率范围窄等缺点,研究电压型多频率脉冲序列控制方法,该方法通过四组预设控制脉冲,实现开关变换器输出电压的调节。对多脉冲序列控制Buck变换器在电感电流连续导电模式（Continuous Conduction Mode,CCM）和电感电流断续导电模式（Discontinuous Conduction Mode,DCM）下的工作特性进行分析,重点研究了在DCM 模式下Buck变换器多频率控制。最后,分析了DCM Buck变换器工作在稳态时脉冲序列的组合方式,并通过实验验证了理论分析的正确性。     

基于耦合电感的四相交错Buck变换器研究

基于耦合电感的四相交错Buck变换器是由4个同步Buck变换器通过磁耦合技术并联组成。在分析其工作原理、软开关条件以及设计耦合电感的基础上,以TMS320F28035作为控制核心,搭建了一台16 kW的实验样机。实验结果表明,该变换器在移相（PS）PWM控制策略下,开关管电流应力小,电流纹波明显减小,可在全负载范围内实现零电压开关（ZVS）,适用于低压大电流、大功率应用场合。     

基于峰值电流模式的同步Buck变换器的数字控制

研究同步Buck变换器的连续时间模型和离散时间模型,分析了变换器工作于峰值电流模式控制下负载恒定和负载动态变化的闭环系统,应用全状态反馈设计闭环系统的控制策略,使用PSPICE软件对设计电路进行搭建,仿真结果表明,设计的动态跟踪系统不仅能实现闭环极点的任意配置,而且能跟踪参考给定值并实现零稳态误差。最后,用Matlab分析了与负载变化相关的闭环极点灵敏度。     

双向Buck/Boost变换器的教学探析

本文针对现有“电力电子技术”相关教材中存在的对双向变换器的分析不完善和各知识点之间缺乏联系等问题,探析了双向Buck/Boost变换器的拓扑生成原理,并且详细分析了变换器运行于电感电流过零模式下实现零电压开关的具体过程,并推导出了软开关的实现条件。本文有助于学生理解并加深双向变换器与基本Buck和Boost变换器之间的联系和差别,并了解软开关技术在基本变换器中的应用,具有一定的教学指导意义。     

Buck型变换器电路结构及其演化过程

文中论述了基于Buck型变换器的DC-DC、DC-AC、AC-DC和AC-AC变换器电路结构及其演化过程,给出了各类变换器的电路-拓扑实例和原理试验结果。理论分析和原理试验结果表明,Buck型变换器在中大容量的DC—DC、DC-AC、AC-DC和AC-AC电能变换中具有重要的应用价值。     

多相Buck变换器及其关键技术研究综述

随着5G、人工智能及物联网等技术的蓬勃发展和半导体工艺尺寸的不断缩小,终端设备处理器和服务器的数据处理能力及其他性能快速提升,这对电源管理芯片提出了新的需求。而多相并联结构变换器在低压大电流应用、快速瞬态响应等方面具有极大的优势,被公认为处理器电源的最佳解决方案之一。文章从多相Buck变换器的原理及优势出发,研究和探讨了多相Buck变换器设计中的多相电流均衡方法、控制模式及效率提升等关键技术的发展和最新的研究进展,进而明确多相Buck变换器的关键发展趋势和面临的挑战。     

二次型CCM Buck变换器的电流应力及效率分析

二次型DC-DC变换器拓宽了变换器输入到输出电压的传输比,提高了高传输比场合下的传输效率,与传统变压器相比因为储能元件的增加电路功耗也会增大。为具体分析其工作过程中的功耗,文中考虑了储能元件的内阻等因素,通过计算各元器件电流应力推导出功耗,并研究了变换器工作效率及各个工作参数之间的关系,并通过仿真验证了理论分析的正确性。     

Input-Current Distortion of CCM Boost PFC Converters Operated in DCM

When power-factor correction (PFC) converters designed for operation in continuous-conduction mode (CCM) at full power are operated at reduced load, operation in discontinuous-conduction mode (DCM) occurs in a zone that is close to the crossover of the line voltage. This zone will gradually expand with decreasing load to finally encompass the entire line cycle. Whereas, in CCM, the parasitic capacitances of the switches only cause switching losses, in DCM, they are a source of converter instability, resulting in significant input-current distortion. In this paper, this source of input-current distortion is analyzed, and a solution is proposed. Experimental results are obtained using a digitally controlled boost PFC converter, which is designed to operate in CCM for 1 kW     

Multifrequency Small-Signal Model for Buck and Multiphase Buck Converters

To investigate the high-frequency behaviors of buck and multiphase buck converters, this paper develops a modeling method based on the harmonic-balance approach. Because the nonlinear pulse-width modulator generates sideband components, the sideband effect occurs in a closed-loop converter. Taking this effect into account, the multifrequency small-signal model is proposed, which is applicable beyond half of the switching frequency. In a voltage-mode-controlled buck converter, the introduced model predicts the measured phase delay of the loop gain, while the conventional average model fails to explain this phenomenon. Furthermore, this model is extended to the case of the multiphase buck converter. The influence from the interleaving technique is discussed and the frequency-domain characteristics are clearly explained. Simulation and experimental results are provided to verify the achievements of the proposed model.     

电流环控制的降压PWM 开关电源系统的建模分析

PWM开关电源系统普遍采用电流、电压双闭环控制。在建立PWM降压开关电源功率级模型的基础上，得出基于平均电流控制的降压PWM开关电源的系统传递函数框图，并用Madab对电流环增益进行了分析。     

Interleaved Buck Converters Based on Winner-Take-All Switching

This paper studies basic interleaved buck converters using a switching rule based on a winner-take-all principle. As the parameters are selected suitably, the system can realize multiphase synchronization automatically which is convenient for the ripple reduction of the output current. As the parameters vary, the system exhibits a variety of synchronous phenomena. Using the piecewise-constant model, we give the parameter condition theoretically for existence and stability of the synchronous phenomena. The simple test circuit is presented and typical synchronous phenomena are confirmed experimentally.     

Phase Current Unbalance Estimation in Multiphase Buck Converters

A method for estimating the phase current unbalance in a multiphase buck converter is presented. The method uses the information contained in the voltage drop at the input capacitor's effective series resistance (ESR) to estimate the average current in each phase. Although the absolute estimation of the currents depends on the value of the ESR and is therefore not absolutely accurate, the relative estimates of the currents with respect to one other are shown to be very accurate. The method can be implemented with a low-rate down-sampling A/D converter and is not computationally intensive. Experimental results are presented, showing good agreement between the estimates and the measured values.     

Simple Low-Cost Hysteretic Controller for Single-Phase Synchronous Buck Converters

This paper presents a simple low-cost control architecture for low-voltage hysteretic regulators supplying loads with low-to-medium current consumption. Only two sensed voltages, a passive filter network and a hysteretic comparator are required to implement the main control functions: the output voltage regulation and the adaptive voltage positioning. This paper also shows that other previously reported low-cost control solutions have an important design tradeoff between load transient response and efficiency. In the proposed controller, the closed-loop output impedance can be designed to be resistive and the switching frequency can be adjusted to be independent of the output impedance requirement so that the load transient response and the efficiency can be optimized separately. Experimental results validate the performance of the proposed controller (i.e., a load transient response with insignificant output voltage overshoot and selectable switching frequency independent of the output impedance requirement).     

集成于电流模降压型DC-DC变换器的电流采样电路

针对电流模降压型DC-DC变换器,提出了一种新颖的CMOS片上电流采样电路.该电路结构简单,易于集成,功率损耗小,且通过MOSFET的匹配使采样比例几乎不受温度、模型以及电源电压变化影响.并通过进一步的优化设计,使得响应速度更快,工作电压进一步降低.提出的采样电路在一款基于0.5μm CMOS工艺没计的单片电流模降压型DC-DC变换器中进行了验证.在2.5～5.5V的电压范围,0～2A的负载范围内芯片工作稳定,瞬态响应良好,且效率高达96%.     

用于降压型DC-DC转换器的短路保护电路设计

设计了一套用于降压型DC-DC转换器的隔断触发模式短路保护方案。除了具有基本的峰值限流功能,该方案还能使转换器在输出短路时触发周期性的休眠与软启动。通过对软启动信号的控制,将短路下的休眠时间设计为软启动时间的2倍。在软启动被触发时,当电感电流峰值达到限流门限时,转换器开关频率将降低到原来的四分之一,较好地控制了电感峰值电流。采用0.5 μm BCD工艺进行仿真,结果表明,当峰值限流为3.6 A时,平均输出短路电流仅1.06 A,低于传统的逐周期降频限流方案。     

集成于电流模降压型DC-DC变换器的电流采样电路

针对电流模降压型DC-DC变换器,提出了一种新颖的CMOS片上电流采样电路.该电路结构简单,易于集成,功率损耗小,且通过MOSFET的匹配使采样比例几乎不受温度、模型以及电源电压变化影响.并通过进一步的优化设计,使得响应速度更快,工作电压进一步降低.提出的采样电路在一款基于0.5μm CMOS工艺没计的单片电流模降压型DC-DC变换器中进行了验证.在2.5～5.5V的电压范围,0～2A的负载范围内芯片工作稳定,瞬态响应良好,且效率高达96%.