共查询到19条相似文献,搜索用时 62 毫秒
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利用二维器件模拟器MEDICI提取出重掺杂外延型衬底的电阻宏简化模型,所需的6个参数均可通过器件模拟得到,能够精确表征混合信号集成电路中的衬底噪声特性。基于0.25μm CMOS工艺所建立的电阻宏模型,设计了简单的混合信号电路进行应用验证,证明了该模型能够有效表征混合信号集成电路的衬底噪声。 相似文献
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提出了一种基于二维器件模拟的深亚微米工艺外延型衬底的电阻宏模型.该宏模型通过器件模拟与非线性拟合相结合的方法建立,使衬底寄生参数的提取更加方便,同时保障了深亚微米电路特性的模拟精度.此外,该宏模型结构简单,可以得到与器件模拟基本一致的模拟结果,并可以方便地嵌入SPICE中进行一定规模的电路模拟. 相似文献
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讨论分析了混合信号集成电路衬底噪声耦合的机理,及对模拟电路性能的影响。提出了一种混合信号集成电路衬底耦合噪声分析方法,基于TSMC 0.35μm 2P4M CMOS工艺,以14位高速电流舵D/A转换器为例,给出了混合信号集成电路衬底耦合噪声分析方法的仿真结果,并与实际测试结果进行比较,证实了分析方法的可信性。 相似文献
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重掺杂型混合信号集成电路衬底的噪声模型研究 总被引:3,自引:2,他引:1
应用器件模拟软件SILVACO模拟三种结构重掺杂型衬底中注入高频电流的分布,根据模拟结果分析得出重掺杂型衬底的简化模型为一单节点,进而将简化模型与实际的混合信号集成电路结合,建立起重掺杂型衬底的噪声模型,并给出了参数估算式。 相似文献
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现代电子系统既要处理数字信号又要处理模拟信号。越来越多的应用要求把数字电路和模拟电路集成在同一芯片上。数字电路追求的是高速度,而模拟电路对精度要求又很高。在数模混合电路中,串扰噪声是影响数字电路的主要噪声,而数字电路产生的噪声会通过衬底耦合到模拟电路,影响模拟电路关键器件的衬底电位,导致模拟电路的特性变坏,甚至使模拟电路不能正常工作;随着芯片特征尺寸的缩小和工作频率的提高,噪声干扰成为数模混合电路设计时必须考虑的一个关键问题。 相似文献
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Makie-Fukuda K. Kikuchi T. Matsuura T. Hotta M. 《Solid-State Circuits, IEEE Journal of》1995,30(2):87-92
This paper proposes a method of measuring the influence of digital noise on analog circuits using wide-band voltage comparators as noise detectors. Noise amplitude and r.m.s voltage are successfully measured by this method. A test chip is fabricated to measure the digital noise influence. From the experimental results, it is shown that the digital noise influence can be considerably reduced by using a differential configuration in analog circuits for mixed-signal IC's. The digital noise influence can be further reduced by lowering the digital supply voltage. These results show that the voltage-comparator-based measuring method is effective in measuring the influence of digital noise on analog circuits 相似文献
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在设计电子产品时,除了满足特定的功能要求外,还必须考虑产品的电磁兼容性,这对产品的质量和性能技术指标起着非常关键的作用。本文主要介绍了PCB设计时一些常用的解决电磁兼容性问题的措施,主要包括PCB布局、PCB布线、电源与地、时钟信号等方面的电磁兼容设计。并结合具体的工程实例进行说明分析。 相似文献
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TSV-TSV耦合会对三维集成电路的性能造成影响,主要的负面效应就是引入了耦合噪声。为了能够在初期设计阶段准确的估计TSV间的耦合强度,本文首先提出了存在于TSV间的基于二端口网络的阻抗级耦合通道模型,然后推导出了TSV间的耦合强度公式用来描述TSV-TSV耦合效应。通过与三维全波仿真结果的对比,公式的准确度得到了验证。另外,本文提出了一种减小TSV间耦合强度的设计方法。通过SPICE仿真,所提出设计方法不仅可以应用在简单TSV-TSV的电路结构中,还可以应用在含有多个TSV的复杂电路结构中,从而体现了所提出设计方法的可行性,并且为设计者提供了改善三维集成电路电学性能的可能性。 相似文献
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In this paper we have investigated a unified and simultaneous fault detection method for mixed-signal integrated circuits. The method is based on the analysis of the power-supply current through the circuit under test. The analysis has been done paying attention to the dynamic behaviour of the power-supply current, in order to avoid measurement problems related to the large amount of quiescent current drop across many analog blocks.The analysis of the dynamic power-supply current entails certain problems related to the complexity of the measurement process, especially those due to the high speed of the current transients. These problems have been addressed by considering a design for test procedure based on the use of built-in dynamic current sensors.The goal of the design for test methodology proposed is to represent the Iddt through the mixed-signal IC under test by a digital signature. The paper presents some advantages of this approach such as a good tolerance to cross-talk noise and the need for only a conventional digital tester on the complete mixed-signal IC for fault detection. The analysis is illustrated with some test results. 相似文献
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Makie-Fukuda K. Anbo T. Tsukada T. Matsuura T. Hotta M. 《Solid-State Circuits, IEEE Journal of》1996,31(5):726-731
This paper describes measurement of substrate noise waveforms in mixed-signal integrated circuits. This method uses wide-band chopper-type single-ended voltage comparators as on-chip noise detectors. By analyzing equivalently sampled comparator outputs in synchronized operation, the noise voltage in the auto-zero and compare modes can be measured separately, and noise waveforms were experimentally reconstructed to within 0.5-ns accuracy. The noise transmission path was analyzed, and this showed that the noise sampled at the auto-zero mode of the comparator can be used to reconstruct substrate noise waveforms with high resolution. The results also explain the influence of noise coupling on analog circuits widely used in on-chip analog-to-digital converters 相似文献
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Miguel A. Méndez José Luis González Diego Mateo Antonio Rubio 《Microelectronics Journal》2005,36(1):77-84
Digital power supply noise is a key issue in the design of mixed-signal and radio frequency (RF) integrated circuits (IC). In this paper, we have evaluated the impact of different digital design alternatives and technological parameters on the noise power spectral density. Related rules guiding designers to minimise the effect of digital noise on the analogue RF section conclude the work. 相似文献
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为了研究双存储像素的读出噪声对混合域实现图像块矩阵变换的CMOS图像传感器(CIS)产生的误差影响,对其进行噪声分析。结合双存储像素的工作时序,对实现图像块矩阵变换过程中由于多次采样和双路存储而增加的kTC噪声、源跟随器的1/f噪声和热噪声进行分析并建立数学模型,总结出双存储像素读出噪声对一次块矩阵变换的误差影响。以二维离散余弦变换为例,通过CHRT 0.35 m标准CMOS工艺电路仿真并结合matlab/simulink对比验证,得出增大存储电容、减小源跟随器宽长比可以降低由于像素读出噪声引起的误差。结果证明,此方法可以有效降低噪声,指导电路设计。 相似文献