14 nm FinFET和65 nm平面工艺静态随机存取存储器中子单粒子翻转对比

使用中国散裂中子源提供的宽能谱中子束流,开展14 nm FinFET工艺和65 nm平面工艺静态随机存取存储器中子单粒子翻转对比研究,发现相比于65 nm器件,14 nm FinFET器件的大气中子单粒子翻转截面下降至约1/40,而多位翻转比例从2.2%增大至7.6%,源于14 nm FinFET器件灵敏区尺寸(80 nm×30 nm×45 nm)、间距和临界电荷(0.05 fC)的减小.不同于65 nm器件对热中子免疫的现象,14 nm FinFET器件中M0附近10B元素的使用导致其表现出一定的热中子敏感性.进一步的中子输运仿真结果表明,高能中子在器件灵敏区中产生的大量的射程长、LET值大的高Z二次粒子是多位翻转的产生诱因,而单粒子翻转主要来自于p,He,Si等轻离子的贡献.     

Strategy to mitigate single event upset in 14-nm CMOS bulk FinFET technology

Three-dimensional (3D) TCAD simulations demonstrate that reducing the distance between the well boundary and N-channel metal-oxide semiconductor (NMOS) transistor or P-channel metal-oxide semiconductor (PMOS) transistor can mitigate the cross section of single event upset (SEU) in 14-nm complementary metal-oxide semiconductor (CMOS) bulk FinFET technology. The competition of charge collection between well boundary and sensitive nodes, the enhanced restoring currents and the change of bipolar effect are responsible for the decrease of SEU cross section. Unlike dual-interlock cell (DICE) design, this approach is more effective under heavy ion irradiation of higher LET, in the presence of enough taps to ensure the rapid recovery of well potential. Besides, the feasibility of this method and its effectiveness with feature size scaling down are discussed.     

Temperature and drain bias dependence of single event transient in 25-nm FinFET technology

In this paper,we investigate the temperature and drain bias dependency of single event transient(SET) in 25-nm fin field-effect-transistor(FinFET) technology in a temperature range of 0-135°C and supply voltage range of 0.4 V-1.6 V.Technology computer-aided design(TCAD) three-dimensional simulation results show that the drain current pulse duration increases from 0.6 ns to 3.4 ns when the temperature increases from 0 to 135°C.The charge collected increases from 45.5 fC to 436.9 fC and the voltage pulse width decreases from 0.54 ns to 0.18 ns when supply voltage increases from 0.4 V to 1.6 V.Furthermore,simulation results and the mechanism of temperature and bias dependency are discussed.     

Impact of neutron-induced displacement damage on the single event latchup sensitivity of bulk CMOS SRAM

Since the displacement damage induced by the neutron irradiation prior has negligible impact on the performance of the bulk CMOS SRAM, we use the neutron irradiation to degrade the minority carrier lifetime in the regions responsible for latchup. With the experimental results, we discuss the impact of the neutron-induced displacement damage on the SEL sensitivity and qualitative analyze the effectiveness of this suppression approach with TCAD simulation.     

Pattern dependence in synergistic effects of total dose on single-event upset hardness

The pattern dependence in synergistic effects was studied in a 0.18 μm static random access memory(SRAM) circuit.Experiments were performed under two SEU test environments:3 Me V protons and heavy ions.Measured results show different trends.In heavy ion SEU test,the degradation in the peripheral circuitry also existed because the measured SEU cross section decreased regardless of the patterns written to the SRAM array.TCAD simulation was performed.TIDinduced degradation in n MOSFETs mainly induced the imprint effect in the SRAM cell,which is consistent with the measured results under the proton environment,but cannot explain the phenomena observed under heavy ion environment.A possible explanation could be the contribution from the radiation-induced GIDL in pMOSFETs.     

Impact of energy straggle on proton-induced single event upset test in a 65-nm SRAM cell

This paper presents a simulation study of the impact of energy straggle on a proton-induced single event upset(SEU)test in a commercial 65-nm static random access memory cell. The simulation results indicate that the SEU cross sections for low energy protons are significantly underestimated due to the use of degraders in the SEU test. In contrast, using degraders in a high energy proton test may cause the overestimation of the SEU cross sections. The results are confirmed by the experimental data and the impact of energy straggle on the SEU cross section needs to be taken into account when conducting a proton-induced SEU test in a nanodevice using degraders.