Investigation of interface characteristics of Al2O3/Si under various O2 plasma exposure times during the deposition of Al2O3 by PA-ALD

Plasma-assisted atomic layer deposition (PA-ALD) is more suitable than thermal atomic layer deposition (ALD) for mass production because of its faster growth rate. However, controlling surface damage caused by plasma during the PA-ALD process is a key issue. In this study, the passivation characteristics of Al₂O₃ layers deposited by PA-ALD were investigated with various O₂ plasma exposure times. The growth per cycle (GPC) during Al₂O₃ deposition was saturated at approximately 1.4?Å/cycle after an O₂ plasma exposure time of 1.5?s, and a refractive index of Al₂O₃ in the range of 1.65–1.67 was obtained. As the O₂ plasma exposure time increased in the Al₂O₃ deposition process, the passivation properties tended to deteriorate, and as the radio frequency (RF) power increased, the passivation uniformity and the thermal stability of the Al₂O₃ layer deteriorated. To study the Al₂O₃/Si interface characteristics, the capacitance-voltage (C-V) and the conductance-voltage (G-V) were measured using a mercury probe, and the fixed charge density (Q_f) and the interface trap density (D_it) were then extracted. The Q_f of the Al₂O₃ layer deposited on a Si wafer by PA-ALD was almost unaffected, but the D_it increased with O₂ plasma exposure time. In conclusion, as the O₂ plasma exposure time increased during Al₂O₃ layer deposition by PA-ALD, the Al₂O₃/Si interface characteristics deteriorated because of plasma surface damage.     

Synthesis and photoluminescence of aligned SiO<Subscript>x</Subscript> nanowire arrays

Aligned SiO_x nanowire arrays standing on a Si substrate were successfully synthesized using a simple method by heating a single-crystalline Si slice covered with SiO₂ nanoparticles at 1000 °C in a flowing Ar atmosphere. The SiO_x nanowire arrays were characterized by scanning electron microscopy and transmission electron microscopy. The SiO_x nanowires become progressively thinner from bottom to top. The formation process of the SiO_x nanowire arrays is closely related to a vapor–solid mechanism. Room-temperature photoluminescence measurements under excitation at 260 nm showed that the SiO_x nanowire arrays had a strong blue–green emission at 500 nm (about 2.5 eV), which may be related to oxygen defects. Received: 29 April 2002 / Accepted: 30 April 2002 / Published online: 10 September 2002 RID="*" ID="*"Corresponding author. Fax: +86-551-559-1434, E-mail: gwmeng@mail.issp.ac.cn     

THE INTERACTION OF Au AND THE Si/SiO2 INTERFACE DEFECT Hit(0.494)

The defects at the Si/SiO₂ interface have been studied by the deep-level transient spectroscopy (DLTS) technique in p-type MOS structures with and without gold diffusion. The experimental results show that the interaction of gold and Si/SiO₂ interface defect,H_it(0.494), results in the formation of a new interface de-fect, Au-H_it(0.445). Just like the interface defect, H_it(0.494), the new interface defect possesses a few interesting properties, for example, when the gate voltage applied across the MOS structure reduces the energy interval between Fermi-level and Si valence band of the Si surface to values smaller than the hole ionization Gibbs free energy of the defect, a sharp DLTS peak is still observable; and the hole apparent activation energy increases with the decrease of the Si surface potential barrier height. These properties can be successfully explained with the transition energy band model of the Si/SiO₂ interface.     

Properties of an Al<Subscript>2</Subscript>O<Subscript>3</Subscript>/Si interface

The phase chemical composition of an Al₂O₃/Si interface formed upon molecular deposition of a 100-nm-thick Al₂O₃ layer on the Si(100) (c-Si) surface is investigated by depth-resolved ultrasoft x-ray emission spectroscopy. Analysis is performed using Al and Si L_{2, 3} emission bands. It is found that the thickness of the interface separating the c-Si substrate and the Al₂O₃ layer is approximately equal to 60 nm and the interface has a complex structure. The upper layer of the interface contains Al₂O₃ molecules and Al atoms, whose coordination is characteristic of metallic aluminum (most likely, these atoms form sufficiently large-sized Al clusters). The shape of the Si bands indicates that the interface layer (no more than 10-nm thick) adjacent to the substrate involves Si atoms in an unusual chemical state. This state is not typical of amorphous Si, c-Si, SiO₂, or SiO_x (it is assumed that these Si atoms form small-sized Si clusters). It is revealed that SiO₂ is contained in the vicinity of the substrate. The properties of thicker coatings are similar to those of the 100-nm-thick Al₂O₃ layer and differ significantly from the properties of the interfaces of Al₂O₃ thin layers.     

Formation of silicon oxide nanowires directly from Au/Si and Pd–Au/Si substrates

Amorphous silicon oxide (SiO_x) nanowires were directly grown by thermal processing of Si substrates. Au and Pd–Au thin films with thicknesses of 3 nm deposited on Si (0 0 1) substrates were used as catalysts for the growth of nanowires. High-yield synthesis of SiO_x nanowires was achieved by a simple heating process (1000–1150 °C) in an Ar ambient atmosphere without introducing any additional Si source materials. The as-synthesized products were characterized by field-emission scanning electron microscopy, energy-dispersive X-ray spectroscopy, and transmission electron microscopy measurements. The SiO_x nanowires with lengths of a few and tens of micrometers had an amorphous crystal structure. The solid–liquid–solid model of nanowire formation was shown to be valid.     

Growth of amorphous SiO<Subscript>2</Subscript> nanowires on Si using a Pd/Au thin film as a catalyst

Nanowires of amorphous SiO₂ were synthesized by thermal processing of a Si(100) substrate at 1100 °C in the presence of a nitrogen flow, and using a 15 nm thick high silicon-solubility Pd/Au film as a catalyst. The substrate itself was the only source of silicon for the nanowire growth. The nanostructures produced were characterized by high resolution transmission and scanning electron microscopy and by X-ray diffraction. The nanowire growth is consistent with the vapor-liquid-solid (VLS) mechanism, with particles of Pd₂Si and Au(Pd) being observed to form from the reaction between silicon and the catalytic film, and to remain at the tip of the wires. The synthesized nanowires showed a well defined morphology which could be very interesting for lasing applications. PACS 81.05.Ys; 81.10.Bk; 85.40.Ux     

Excellent Si surface passivation by low temperature SiO2 using an ultrathin Al2O3 capping film

It is demonstrated that the application of an ultrathin aluminum oxide (Al₂O₃) capping film can improve the level of silicon surface passivation obtained by low‐temperature synthesized SiO₂ profoundly. For such stacks, a very high level of surface passivation was achieved after annealing, with S_eff < 2 cm/s for 3.5 Ω cm n‐type c‐Si. This can be attributed primarily to a low interface defect density (D_it < 10¹¹ eV^–1 cm^–2). Consequently, the Al₂O₃ capping layer induced a high level of chemical passivation at the Si/SiO₂ interface. Moreover, the stacks showed an exceptional stability during high‐temperature firing processes and therefore provide a low temperature (≤400 °C) alternative to thermally‐grown SiO₂. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Valence band variation in Si (110) nanowire induced by a covered insulator

In this work, we investigate strain effects induced by the deposition of gate dielectrics on the valence band structures in Si (110) nanowire via the simulation of strain distribution and the calculation of a generalized 6 × 6k$\cdot$p strained valence band. The nanowire is surrounded by the gate dielectric. Our simulation indicates that the strain of the amorphous SiO₂ insulator is negligible without considering temperature factors. On the other hand, the thermal residual strain in a nanowire with amorphous SiO₂ insulator which has negligible lattice misfit strain pushes the valence subbands upwards by chemical vapour deposition and downwards by thermal oxidation treatment. In contrast with the strain of the amorphous SiO₂ insulator, the strain of the HfO₂ gate insulator in Si (110) nanowire pushes the valence subbands upwards remarkably. The thermal residual strain by HfO₂ insulator contributes to the up-shifting tendency. Our simulation results for valence band shifting and warping in Si nanowires can provide useful guidance for further nanowire device design.     

Interface state density and barrier height improvement in ammonium sulfide treated Al2O3/Si interfaces

The HF treatment removes the native oxide and lays behind the dangling bonds over the Si surface which causes the increment in density of interface traps (D_it) through the direct deposition of high-k dielectric on Si. Here, we propose the facile method for reduction of interface traps and improvement in barrier height with the (NH₄)₂S treatment on Al₂O₃/Si interfaces, which can be used as the base for the non-volatile memory device. The AFM was used to optimize the treatment time and surface properties, while XPS measurements were carried out to study the interface and extract the barrier height (Φ_B). The short period of 20 s treatment shows the improvement in the barrier height (1.02 eV), while the one order reduction in the D_it (0.84 × 10¹² cm²/eV) of sulfur passivated Al/Al₂O₃/Si MOS device. The results indicate the favorable passivation of the dangling bonds over the Si surfaces covered by sulfur atoms.     

Preparation, structure and photo-catalytic performances of hybrid Bi2SiO5 modified Si nanowire arrays

Bi₂SiO₅ modified Si nanowire array films were fabricated as photo-catalysts via dip-coating Bi(NO₃)₃ on silver-assisted electroless wet chemical etching Si nanowires and subsequently annealing. The structures and morphologies of as-prepared samples are characterized by X-ray diffraction, Fourier transform infrared spectrum, scanning electron microscopy and transmission electron microscopy. The results of photocatalytic experiments indicated that the Bi₂SiO₅ modified Si nanowire arrays benefit the improvement for efficient electron-hole separation and photo-catalytic stability, thereby possessing superior photo-degradation performance. These hybrid nanowire arrays will be promising materials for photo-catalysts and degradation agents.     

Metal-oxide-semiconductor characteristics of lanthanum cerium oxide film on Si

Metal-organic decomposed lanthanum cerium oxide (La _x Ce _y O _z ) film had been spin-coated on n-type Si substrate. Effects of post-deposition annealing temperature and time on the metal-oxide-semiconductor (MOS) properties of the film were studied. As temperature increased from 400 to 1000°C for 15 minutes dwell time, La _x Ce _y O _z demonstrated a decrease in interface trap density (D _it) and total interface trap density (D _total), which were related to the formation of SiO _x /silicates interfacial layer (IL). The lowest leakage current density and highest dielectric breakdown voltage (V _B) was obtained in 1000°C-annealed sample. When longer annealing times (30–120 minutes) were studied on the 1000°C-annealed sample, the sample annealed at 1000°C for 120 min showed the best MOS characteristics with V _B of 30 V. Reasons contributing to such observation were discussed.     

Stability and band offsets between Si and LaAlO<Subscript>3</Subscript>

The replacement of traditional SiO₂ with high-k oxides allows the physical thickness of the gate dielectric to be thinner without the tunneling problem in Si-based metal-oxide-semiconductor field-effect transistors. LaAlO₃ appears to be a promising high-k material for use in future ultra large scale integrated devices. In the present paper, the electronic properties of Si/LaAlO₃ (001) heterojunctions are investigated by first-principles calculations. We studied the initial adsorption of Si atoms on the LaAlO₃ (001) surface, and found that Si atoms preferentially adsorb on top of oxygen atoms at higher coverage. The surface phase diagrams indicate that Si atoms may substitute oxygen atoms at the LaO-terminated surface. The band offsets, electronic density of states, and atomic charges are analyzed for the various Si/LaAlO₃ heterojunctions. Our results suggest that the Si/AlO₂ interface is suitable for the design of metal oxide semiconductor devices because the valence and conduction band offsets are both larger than 1 eV.     

Optical studies of Si/SiO<Subscript><Emphasis Type="Bold">2</Emphasis></Subscript> interfaces by second-harmonic generation spectroscopy of silicon interband transitions

Optical second-harmonic generation (SHG) studies of Si/SiO₂ interfaces by resonant two-photon excitation of Si interband transitions are reviewed. Three different types of interband resonances at Si interfaces are identified in SHG spectra: (i) E₁ and E₂ critical-point bulk interband transitions in the space-charge region of charged Si interfaces, (ii) E₁- and E₂-type transitions associated with Si atoms at the interface in bulk-like tetrahedral coordination, and (iii) transitions related to Si interface atoms with bonding properties specific of the atomic structure of the interface. The effects of the polarity of space-charge fields on SHG spectra of Si(100)/SiO₂ interfaces are also discussed. PACS 73.40.Qv; 73.20.-r; 42.65.Ky     

Fabrication and structural characterization of Mg<Subscript>2</Subscript>SiO<Subscript>4</Subscript> nanowires

This article demonstrates the first reported successful synthesis of Mg₂SiO₄ nanowires. We have thermally heated Au-coated Si substrates, using a quartz tube with its inner surface pre-coated with MgO nanostructures. We have characterized the sample morphologies by using scanning electron microscopy and transmission electron microscopy (TEM). X-ray diffraction analysis and high-resolution TEM observation coincidentally revealed that the nanowires were crystalline with an orthorhombic Mg₂SiO₄ structure. We have discussed the possible growth mechanism of Mg₂SiO₄ nanowires. PACS 81.07.-b; 81.05.Zx; 61.10.Nz; 68.37.Hk; 68.37.Lp     

Characteristics of SiOx nanowires synthesized via the thermal heating of Cu-coated Si substrates

We have demonstrated the growth of SiO_x nanowires by the simple heating of the Cu-coated Si substrates. We have applied X-ray diffraction, scanning electron microscopy and transmission electron microscopy techniques to characterize the structure of the samples. The as-synthesized SiO_x nanowires had amorphous structures with diameters in the range of 20–80 nm. The thickness of the Cu layer affected the resultant sample morphology, favoring the nanowire formation at smaller thickness. Photoluminescence spectra of the nanowires exhibited blue emission. We have proposed the possible growth mechanism.     

TEOS-based low-pressure chemical vapor deposition for gate oxides in 4H–SiC MOSFETs using nitric oxide post-deposition annealing

The use of SiO₂/4H–SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) can be problematic due to high interface state density (D_it) and low field-effect mobility (μ_fe). Here, we present a tetra-ethyl-ortho-silicate (TEOS)-based low-pressure chemical vapor deposition (LPCVD) method for fabricating the gate oxide of 4H–SiC MOSFETs using nitric oxide post-deposition annealing. SiO₂/4H–SiC MOS capacitors and MOSFETs were fabricated using conventional wet and TEOS oxides. The measured effective oxide charge density (Q_eff) and D_it of the TEOS-based LPCVD SiO₂/4H–SiC MOS capacitor with nitridation were 4.27 × 10¹¹ cm⁻² and 2.99 × 10¹¹ cm⁻²eV⁻¹, respectively. We propose that the oxide breakdown field and barrier height were dependent on the effective Q_eff. The measured μ_fe values of the SiO₂/4H–SiC MOSFETs with wet and TEOS oxides after nitridation were, respectively, 11.0 and 17.8 cm²/V due to the stable nitrided interface between SiO₂ and 4H–SiC. The proposed gate stack is suitable for 4H–SiC power MOSFETs.     

Growth of one-dimensional Ag/Si/SiOx capsule nanostructures by self-assembled SiOx template

One-dimensional Ag/Si/SiO_x capsule nanostructures have been synthesized by thermal evaporation of the mixture of SiO and Ag₂O. Products were analyzed by using SEM, TEM, HREM and element map. Two kinds of morphologies were observed. Inside the amorphous SiO_x shell, Ag nanowires interspersed by short segments of Si were formed when Ag content was higher than Si. Ag and Si contacted well and nanosize MS (metal-semiconductor) structures were obtained. One-dimensional periodic nanostructures that Ag particles embedded in the nanowire were synthesized when Si content was higher than Ag. SiO_x nanotubes were also observed. Structure analysis shows that Ag/Si/SiO_x nanostructures are grown by a self-assembled SiO_x template mechanism. And the growth of SiO_x nanotubes is tightly related to the adding of Ag. PACS 81.07.Bc; 81.10.Bk; 61.14.-x     

Synthesis and characteristics of Fe<Subscript>96-x</Subscript>Zr<Subscript>x</Subscript>B<Subscript>4</Subscript> nanowire arrays

Fe-rich Fe_96-xZr_xB₄ (0≤x≤7) nanowires were first prepared by electrodepositing into anodic aluminum oxide templates. Transmission electron microscope analysis shows that the nanowires are uniform and are about 100 nm in diameter with an aspect ratio of around 75. The broad peaks of X-ray diffraction and the Mössbauer spectrum indicate that the Fe_96-xZr_xB₄ nanowires are composed of α-Fe-like and Zr-rich FeZrB phases. Selected area electro diffraction results also indicate that the structure of Fe₈₉Zr₇B₄ nanowires is amorphous. A vibrating sample magnetometer is employed to study the magnetic properties of nanowire arrays at room temperature. The coercivity of nanowire arrays in parallel to the wire axis decreases with increasing Zr content.     

Ionizing radiation effects on electrical and reliability characteristics of sputtered Ta2O5/Si interface

This paper describes the effect of ionizing radiation on the interface properties of Al/Ta₂O₅/Si metal oxide semiconductor (MOS) capacitors using capacitance–voltage (C–V) and current–voltage (I–V) characteristics. The devices were irradiated with X-rays at different doses ranging from 100?rad to 1?Mrad. The leakage behavior, which is an important parameter for memory applications of Al/Ta₂O₅/Si MOS capacitors, along with interface properties such as effective oxide charges and interface trap density with and without irradiation has been investigated. Lower accumulation capacitance and shift in flat band voltage toward negative value were observed in annealed devices after exposure to radiation. The increase in interfacial oxide layer thickness after irradiation was confirmed by Rutherford Back Scattering measurement. The effect of post-deposition annealing on the electrical behavior of Ta₂O₅ MOS capacitors was also investigated. Improved electrical and interface properties were obtained for samples deposited in N₂ ambient. The density of interface trap states (D_it) at Ta₂O₅/Si interface sputtered in pure argon ambient was higher compared to samples reactively sputtered in nitrogen-containing plasma. Our results show that reactive sputtering in nitrogen-containing plasma is a promising approach to improve the radiation hardness of Ta₂O₅/Si MOS devices.