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1.
The effect of etching time of porous silicon on solar cell performance   总被引:1,自引:0,他引:1  
Porous silicon (PS) layers based on crystalline silicon (c-Si) n-type wafers with (1 0 0) orientation were prepared using electrochemical etching process at different etching times. The optimal etching time for fabricating the PS layers is 20 min. Nanopores were produced on the PS layer with an average diameter of 5.7 nm. These increased the porosity to 91%. The reduction in the average crystallite size was confirmed by an increase in the broadening of the FWHM as estimated from XRD measurements. The photoluminescence (PL) peaks intensities increased with increasing porosity and showed a greater blue shift in luminescence. Stronger Raman spectral intensity was observed, which shifted and broadened to a lower wave numbers of 514.5 cm−1 as a function of etching time. The lowest effective reflectance of the PS layers was obtained at 20 min etching time. The PS exhibited excellent light-trapping at wavelengths ranging from 400 to 1000 nm. The fabrication of the solar cells based on the PS anti-reflection coating (ARC) layers achieved its highest efficiency at 15.50% at 20 min etching time. The I-V characteristics were studied under 100 mW/cm2 illumination conditions.  相似文献   

2.
方昕  沈文忠 《物理学报》2011,60(8):88801-088801
认识及控制多晶硅中杂质行为对于实现低成本、高效率多晶硅太阳电池有着重要的意义.利用红外光谱技术研究了定向凝固多晶硅锭中不同部位材料热处理前后的氧浓度、碳浓度变化,结合少子寿命、光电转换效率、内量子效率等电池性能,探索不同含量的氧、碳杂质对电池性能影响的物理机制.提出一种考虑碳影响的氧沉淀生长模型,并模拟了热处理后氧沉淀的尺寸分布和数量.研究发现,碳除了使利用硅锭顶部材料制备得到的电池转换效率降低外,还是决定氧沉淀作用的重要因素.由于碳含量多造成中部材料氧沉淀的尺寸大、数量多,引起缺陷,增加复合,而碳在底部 关键词: 氧 碳 太阳电池 转换效率  相似文献   

3.
Emitted multi-crystalline silicon and black silicon solar cells are conformal doped by ion implantation using the plasma immersion ion implantation (PⅢ) technique. The non-uniformity of emitter doping is lower than 5 %. The secondary ion mass spectrometer profile indicates that the PⅢ technique obtained 100-rim shallow emitter and the emitter depth could be impelled by furnace annealing to 220 nm and 330 nm at 850 ℃ with one and two hours, respectively. Furnace annealing at 850 ℃ could effectively electrically activate the dopants in the silicon. The efficiency of the black silicon solar cell is 14.84% higher than that of the mc-silicon solar cell due to more incident light being absorbed.  相似文献   

4.
5.
A porous silicon (PS) layer was prepared by photoelectrochemical etching (PECE), and a zinc oxide (ZnO) film was deposited on a PS layer using a radio frequency (RF) sputtering system. The surface morphology of the PS and ZnO/PS layers was characterised using scanning electron microscopy (SEM). Nano-pores were produced in the PS layer with an average diameter of 5.7 nm, which increased the porosity to 91%. X-ray diffraction (XRD) of the ZnO/PS layers shows that the ZnO film is highly oriented along the c-axis perpendicular to the PS layer. The average crystallite size of the PS and ZnO/PS layers are 17.06 and 17.94 nm, respectively. The photoluminescence (PL) emission spectra of the ZnO/PS layers present three emission peaks, two peaks located at 387.5 and 605 nm due to the ZnO nanocrystalline film and a third located at 637.5 nm due to nanocrystalline PS. Raman measurements of the ZnO/PS layers were performed at room temperature (RT) and indicate that a high-quality ZnO nanocrystalline film was formed. Optical reflectance for all the layers was obtained using an optical reflectometer. The lowest effective reflectance was obtained for the ZnO/PS layers. The fabrication of crystalline silicon (c-Si) solar cells based on the ZnO/PS anti-reflection coating (ARC) layers was performed. The IV characteristics of the solar cells were studied under 100 mW/cm2 illumination conditions. The ZnO/PS layers were found to be an excellent ARC and to exhibit exceptional light-trapping at wavelengths ranging from 400 to 1000 nm, which led to a high efficiency of the c-Si solar cell of 18.15%. The ZnO/PS ARC layers enhance and increase the efficiency of the c-Si solar cell. In this paper, the fabrication processes of the c-Si solar cell with ZnO/PS ARC layers are an attractive and promising technique to produce high-efficiency and low-cost of c-Si solar cells.  相似文献   

6.
王利  张晓丹  杨旭  魏长春  张德坤  王广才  孙建  赵颖 《物理学报》2013,62(5):58801-058801
采用重掺杂的p型微晶硅来改善前电极掺硼氧化锌 (ZnO:B) 和窗口层p型非晶硅碳 (p-a-SiC) 之间的非欧姆接触特性. 通过优化插入层p型微晶硅的沉积参数 (氢稀释比H2/SiH4、硼掺杂比B2H6/SiH4) 获得了较薄厚度下 (20 nm) 暗电导率高达4.2 S/cm的p型微晶硅材料. 在本征层厚度约为150 nm, 仅采用Al背反射电极的情况下,获得了效率6.37%的非晶硅顶电池(Voc=911 mV, FF=71.7%, Jsc=9.73 mA/cm2), 开路电压Voc和填充因子FF均较无插入层的电池有大幅提升. 关键词: 氧化锌 p型微晶硅 非晶硅顶电池 非欧姆接触  相似文献   

7.
《Current Applied Physics》2014,14(5):653-658
This paper concerns the topic of surface passivation properties of rapid thermal oxidation on p-type monocrystalline silicon wafer for use in screen-printed silicon solar cells. It shows that inline thermal oxidation is a very promising alternative to the use of conventional batch type quartz tube furnaces for the surface passivation of industrial phosphorus-diffused emitters. Five minutes was the most favorable holding time for the rapid thermal oxidation growth of the solar cell sample, in which the average carrier lifetime was increased 19.4 μs. The Fourier transform infrared spectrum of the rapid thermal oxidation sample, whose structure was Al/Al-BSF/p-type Si/n-type SiP/SiO2/SiNx/Ag solar cell with an active area of 15.6 cm2, contained an absorption peak at 1085 cm−1, which was associated with the Si–O bonds in silicon oxide. The lowest average reflectance of this sample is 0.87%. Furthermore, for this sample, its average of internal quantum efficiency and conversion efficiency are respectively increased by 8% and 0.23%, compared with the sample without rapid thermal oxidation processing.  相似文献   

8.
丁月珂  黄仕华 《光子学报》2021,50(3):194-200
采用等离子体增强化学气相沉积法生长的单层本征氢化非晶硅薄膜对单晶硅片进行钝化,结果表明增加氢稀释比有利于减少薄膜中的缺陷,增强钝化效果,过量的氢稀释比会导致非晶硅在硅片表面的外延晶化生长,降低钝化效果。退火导致非晶硅晶化程度增加,降低了钝化效果,同时退火提升了薄膜的质量,改变了H键合方式,增强了钝化效果。因此,单层氢化非晶硅只有在合适的氢稀释比和退火温度才可以获得最佳钝化效果。为了提高非晶硅薄膜对硅片的钝化效果,采用具有高低氢稀释比的叠层本征非晶硅薄膜对硅片进行钝化。因此将高氢稀释比沉积的非晶硅薄膜叠层生长于低氢稀释比的薄膜之上,避免非晶硅在硅片表面的外延生长。在退火过程中,高氢稀释比薄膜中的氢扩散到低氢稀释比薄膜中,有效地钝化了非晶硅中和单晶硅表面的悬挂键,改善了非晶硅/硅片的界面质量,叠层钝化后硅片的少子寿命为7.36 ms,隐含开路电压为732 mV。  相似文献   

9.
《Current Applied Physics》2014,14(9):1240-1244
A cylindrical Si3N4 nanopattern whose heights was 200 nm was fabricated on a glass substrate, and an aluminum-doped zinc oxide (AZO) layer was grown on the nanopatterned glass substrate. The nanopattern was applied to an amorphous silicon solar cell in order to increase the light-scattering effect, thus enhancing the efficiency of the solar cell. The reflectance of the solar cell on the Si3N4 nanopattern decreased and its absorption increased. Compared to a flat substrate, the short-circuit current density (Jsc) and conversion efficiency of a solar cell on the Si3N4 nanopatterned substrate were improved by 17.9% and 24.2%, respectively, as determined from solar simulator measurements.  相似文献   

10.
刘杰  刘邦武  夏洋  李超波  刘肃 《物理学报》2012,61(14):148102-148102
表面织构是一种有效降低表面反射率、提高硅基太阳能电池效率的方法. 采用等离子体浸没离子注入的方法制备了黑硅抗反射层.分别通过原子力显微镜和紫外-可见-近红外分光光度计对黑硅样品表面形貌和反射率进行分析, 结果发现黑硅样品表面布满了高度为0—550 nm的山峰状结构, 结构层中硅体积分数和折射率随抗反射层厚度增加而连续降低. 在300—1000 nm波段范围内,黑硅样品的加权平均反射率低至6.0%. 通过传递矩阵方法对黑硅样品反射谱进行模拟,得到的反射谱与实测反射谱非常符合.  相似文献   

11.
《Current Applied Physics》2018,18(6):663-666
Tin sulfide (SnS) film is grown by sputtering process with subsequent post-sulfurization. As-deposited SnS consists of orthorhombic and cubic structure SnS whereas post-sulfurized films showed pure orthorhombic crystal structure. This structural transformation was confirmed by X-ray diffraction (XRD), Raman spectroscopy and UV–Vis spectroscopy. We used post-annealed SnS film as an absorber layer of solar cell. The fabricated SnS solar cell was composed of SLG/Mo/SnS/CdS/i-ZnO/ITO. We measured current density-voltage (J-V) and external quantum efficiency (EQE) curves for the completed devices. The best efficiency of SnS solar cell was ∼0.5%. The EQE curve showed existence of multiple phases of SnS, even though XRD and Raman spectroscopy showed pure SnS phase. The multiple phases were observed again by photoluminescence (PL). PL also revealed deep defect states of SnS absorber. Thus, the inhomogeneous SnS absorber is one of the main bottlenecks for high efficiency SnS solar cell.  相似文献   

12.
A GaAsP/SiGe tandem solar cell on Si substrate has been further fabricated using light trapping techniques, such as texturing and adding a back surface reflector, and thinning the Si substrate. This is of importance to increase the Jsc of the Si0.18Ge0.82 bottom cell in this tandem system since bottom cell is current limiting. The Jsc of the bottom cell has been increased by relative 7.4%. This current improvement leads to a predicted efficiency of near 21% for this tandem device, with an absolute efficiency improvement of 0.3% over previous results without light trapping processes. The current of the bottom cell can be further improved by optimizing the bottom cell structure and texturing process, further thinning the Si substrate and increasing Ge concentration. (© 2016 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)  相似文献   

13.
This paper studies the fabrication and characterization of 80 nm zinc oxide anti-reflective coating (ARC) on flexible 1.3 μm thin film microcrystalline silicon (μc-Si) solar cell. High resolution X-ray diffraction (HR-XRD) shows a c-axis oriented ZnO (0 0 2) peak (hexagonal crystal structure) at 34.3° with full width at half maximum (FWHM) of 0.3936°. Atomic force microscope (AFM) measures high surface roughness root-mean-square (RMS) of the layer (50.76 nm) which suggests scattering of the incident light at the front surface of the solar cell. UV–vis spectrophotometer illustrates that ZnO ARC has optical transmittance of more than 80% in the visible and infra-red (IR) regions and corresponds to band gap (Eg) of 3.3 eV as derived from Tauc equation. Inclusion of ZnO ARC successfully suppresses surface reflectance from the cell to 2% (at 600 nm) due to refractive index grading between the Si and the ZnO besides quarter-wavelength (λ/4) destructive interference effect. The reduced reflectance and effective scattering effect of the incident light at the front side of the cell are believed to be the reasons why short-circuit current (Isc) and efficiency (η) of the cell improve.  相似文献   

14.
15.
Charging damage in the fabrication of a micro- and nanoelectronic device is one of the electrical damages during plasma etching and caused basically by a huge difference of the flux velocity distribution between positive ions and electrons toward the wafer to be processed. Beam-like positive ions are accumulated on the bottom of a miniaturized structure during etching. With the evolution of the technology node, charging damage will increase due to several factors, increase of plasma exposure time, decrease of annealing temperature, and narrow process window, etc., caused by the increase of the number of metal layers and the introduction of new materials such as low-k and high-k instead of SiO2. The progress of a top-down nanotechnology depends on the development of in situ diagnostics regarding plasma damage to lower-level elements and on the development of charging-free plasma process. In this paper, in situ charging measurements by using a test chip and negative charge injection to the wafer by optical computerized tomography are first demonstrated. Second, we discuss the characteristics of the charging potential on the bottom of SiO2holes during etching in a two-frequency capacitively coupled plasma (2f-CCP), and refer to the procedure to reduce the positive potential by utilizing the negative charge acceleration to the hole bottom under the artificial formation of a double-layer close to the wafer. In addition, the charging’s effect on the aspect ratio of the hole and the antenna ratio are discussed.  相似文献   

16.
Imaging experiments at the European X‐ray Free Electron Laser (XFEL) require silicon pixel sensors with extraordinary performance specifications: doses of up to 1 GGy of 12 keV photons, up to 105 12 keV photons per 200 µm × 200 µm pixel arriving within less than 100 fs, and a time interval between XFEL pulses of 220 ns. To address these challenges, in particular the question of radiation damage, the properties of the SiO2 layer and of the Si–SiO2 interface, using MOS (metal‐oxide‐semiconductor) capacitors manufactured on high‐resistivity n‐type silicon irradiated to X‐ray doses between 10 kGy and 1 GGy, have been studied. Measurements of capacitance/conductance–voltage (C/G–V) at different frequencies, as well as of thermal dielectric relaxation current (TDRC), have been performed. The data can be described by a dose‐dependent oxide charge density and three dominant radiation‐induced interface states with Gaussian‐like energy distributions in the silicon band gap. It is found that the densities of the fixed oxide charges and of the three interface states increase up to dose values of approximately 10 MGy and then saturate or even decrease. The shapes and the frequency dependences of the C/G–V measurements can be quantitatively described by a simple model using the parameters extracted from the TDRC measurements.  相似文献   

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