Fabrication and characterization of 4H—SiC bipolar junction transistor with double base epilayer

In this paper we report on a novel structure of a 4H-SiC bipolar junction transistor with a double base epilayer that is continuously grown.The measured dc common-emitter current gain is 16.8 at IC = 28.6 mA(J C = 183.4 A/cm2),and it increases with the collector current density increasing.The specific on-state resistance(Rsp-on) is32.3mΩ·cm 2 and the open-base breakdown voltage reaches 410 V.The emitter N-type specific contact resistance and N + emitter layer sheet resistance are 1.7×10-3 Ω·cm2 and 150 /,respectively.     

Composite-Collector InGaAs/InP Double Heterostructure Bipolar Transistors with Current-Gain Cutoff Frequency of 242 GHz

To eliminate the conduction band spike at the base-collector interface, an InP/InGaAs double heterostructure bipolar transistor （DHBT） with an InGaAsP composite collector is designed and fabricated using the conventional mesa structure. The DHBT with emitter area of 1.6×15μm^2 exhibits current-gain cutoff frequency ft = 242 OHz at the high collector current density Jc = 2.1 mA/μm^2, which is to our knowledge the highest ft reported for the mesa InP DHBT in China. The breakdown voltage in common-emitter configuration is more than 5 V. The high-speed InP/InGaAs DHBT with high current density digital circuits. is very suitable for the application in ultra high-speed     

Three-dimensional simulation of fabrication process-dependent effects on single event effects of SiGe heterojunction bipolar transistor

The fabrication process dependent effects on single event effects(SEEs) are investigated in a commercial silicon–germanium heterojunction bipolar transistor(SiGe HBT) using three-dimensional(3D) TCAD simulations. The influences of device structure and doping concentration on SEEs are discussed via analysis of current transient and charge collection induced by ions strike. The results show that the SEEs representation of current transient is different from representation of the charge collection for the same process parameters. To be specific, the area of C/S junction is the key parameter that affects charge collection of SEE. Both current transient and charge collection are dependent on the doping of collector and substrate. The base doping slightly influences transient currents of base, emitter, and collector terminals. However, the SEEs of SiGe HBT are hardly affected by the doping of epitaxial base and the content of Ge.     

Highly sensitive giant magnetoimpedance in a solenoid containing FeCo-based ribbon

The highly sensitive giant magneto-impedance effect in a solenoid containing a magnetic core of Fe₃₆Co₃₆Nb₄Si_4.8B_19.2 (FeCo-based) ribbon under a weak magnetic field (WMF) is presented in this paper. The FeCo-based amorphous ribbon is prepared by single roller quenching and annealed with Joule heat in a flowing nitrogen atmosphere. The giant magnetoimpedance effect in solenoid (GMIES) profiles are measured with an HP4294A impedance analyzer. The result shows that the GMIES responds to the WMF sensitively (as high as 1580 %/A穖^-1). The high sensitivity can be obtained in a moderate narrow range of annealing current density (30-34 A/mm²) and closely depends on the driven current frequency. The highest sensitivity (1580 %/A穖^-1) is obtained when the FeCo-based amorphous ribbon is annealed at 32 A/mm² for 10 min and then driven with an alterning current (AC) at the frequency of 350 kHz. The highly sensitive GMIES under the WMF may result from the multiple magnetic-anisotropic structure, which is induced by the temperature gradient produced during Joule-heating the ribbon.     

New 4H silicon carbide metal semiconductor field-effect transistor with a buffer layer between the gate and the channel layer

A new 4H silicon carbide metal semiconductor field-effect transistor (4H-SiC MESFET) structure with a buffer layer between the gate and the channel layer is proposed in this paper for high power microwave applications. The physics-based analytical models for calculating the performance of the proposed device are obtained by solving one- and two-dimensional Poisson's equations. In the models, we take into account not only two regions under the gate but also a third high field region between the gate and the drain which is usually omitted. The direct-current and the alternating-current performances for the proposed 4H-SiC MESFET with a buffer layer of 0.2 μ m are calculated. The calculated results are in good agreement with the experimental data. The current is larger than that of the conventional structure. The cutoff frequency (f_T) and the maximum oscillation frequency (f_max) are 20.4 GHz and 101.6 GHz, respectively, which are higher than 7.8 GHz and 45.3 GHz of the conventional structure. Therefore, the proposed 4H-SiC MESFET structure has better power and microwave performances than the conventional structure.     

A Base-Emitter Self-Aligned Multi-Finger Sil-xGex/Si Power Heterojunction Bipolar Transistor

With a crystal orientation dependent on the etch rate of Si in KOH-based solution, a base-emitter self-Migned large-area multi-finger configuration power SiGe heterojunction bipolar transistor （HBT） device （with an emitter area of about 880μm^2） is fabricated with 2μm double-mesa technology. The maximum dc current gain is 226.1. The collector-emitter junction breakdown voltage BVcEo is 10 V and the collector-base junction breakdown voltage BVcBo is 16 V with collector doping concentration of 1 × 10^17 cm^-3 and thickness of 400nm. The device exhibited a maximum oscillation frequency fmax of 35.5 GHz and a cut-off frequency fT of 24.9 GHz at a dc bias point of Ic = 70 mA and the voltage between collector and emitter is VCE = 3 V. Load pull measurements in class-A operation of the SiGe HBT are performed at 1.9 GHz with input power ranging from OdBm to 21 dBm. A maximum output power of 29.9dBm （about 977mW） is obtained at an input power of 18.SdBm with a gain of 11.47dB. Compared to a non-self-aligned SiGe HBT with the same heterostructure and process, fmax and fT are improved by about 83.9% and 38.3%, respectively.     

Effect of lateral structure parameters of SiGe HBTs on synthesized active inductors

The effect of lateral structure parameters of transistors including emitter width, emitter length, and emitter stripe number on the performance parameters of the active inductor(AI), such as the effective inductance Ls, quality factor Q,and self-resonant frequency ω_0 is analyzed based on 0.35-μm Si Ge Bi CMOS process. The simulation results show that for AI operated under fixed current density JC, the HBT lateral structure parameters have significant effect on Ls but little influence on Q and ω_0, and the larger Ls can be realized by the narrow, short emitter stripe and few emitter stripes of Si Ge HBTs. On the other hand, for AI with fixed HBT size, smaller JCis beneficial for AI to obtain larger Ls, but with a cost of smaller Q and ω_0. In addition, under the fixed collector current IC, the larger the size of HBT is, the larger Ls becomes, but the smaller Q and ω_0 become. The obtained results provide a reference for selecting geometry of transistors and operational condition in the design of active inductors.     

A novel structure of a high current gain 4H-SiC BJT with a buried layer in base

In this paper, a new structure of a 4H-SiC bipolar junction transistor (BJT) with a buried layer (BL) in the base is presented. The current gain shows an approximately 100% increase compared with that of the conventional structure. This is attributed to the creation of a built-in electric field for the minority carriers to transport in the base which is explained based on 2D device simulations. The optimized design of the buried layer region is also considered by numeric simulations.     

Device physics and design of FD-SOI JLFET with step-gate-oxide structure to suppress GIDL effect

A novel n-type junctionless field-effect transistor(JLFET) with a step-gate-oxide(SGO) structure is proposed to suppress the gate-induced drain leakage(GIDL) effect and off-state current I_(off).Introducing a 6-nm-thick tunnel-gateoxide and maintaining 3-nm-thick control-gate-oxide,lateral band-to-band tunneling(L-BTBT) width is enlarged and its tunneling probability is reduced at the channel-drain surface,leading the off-state current I_(off) to decrease finally.Also,the thicker tunnel-gate-oxide can reduce the influence on the total gate capacitance of JLFET,which could alleviate the capacitive load of the transistor in the circuit applications.Sentaurus simulation shows that I_(off) of the new optimized JLFET reduced significantly with little impaction on its on-state current I_(on) and threshold voltage V_(TH) becoming less,thus showing an improved I_(on)/I_(off) ratio(5×10~4) and subthreshold swing(84 mV/dec),compared with the scenario of the normal JLFET.The influence of the thickness and length of SGO structure on the performance of JLFET are discussed in detail,which could provide useful instruction for the device design.     

Highlights from the COMPASS experiment

The Compass experiment at CERN is studying the nucleon spin structure with a 160 GeV polarized muon beam and polarized targets as well as hadron structure with 190 GeV pion,kaon and proton beams.The paper gives an overview of the results for the helicity and transverse spin structure of the nucleon.A first result from the spectroscopy experiments,the observation of a resonance with exotic J P C = 1-＋ quantum numbers at 1660 MeV is also presented.The paper ends with an outlook to future measurements.     

晶体管杂系参数与自然等效线路

本文研究面结合型晶体管共发射极线路的小讯号h参数与自然等效线路中元件的关系。根据两种合金管(2N104及Ⅱ-6晶体管)h参数的实验结果求出h参数与自然等效线路元件随频率及随直流运用状态(直流发射极电流及直流集电极电压)的相互关系。对实验结果与根据晶体管物理构造分析计算的结果进行了比较。对开路反向电压放大系数μ_bc的现象给予详细分析,并求出μ_bc与开路输出导纳h₂₂的相互关系。两套晶体管的h参数及自然等效线路的完整资料可供晶体管器件设计及线路研究者的使用。     

关于晶体管最高振荡频率有关因素的测量分析

本文讨论了晶体管最高振荡频率有关因素的一种测量分析方法。利用在基极和集电极迴路中串入外加串联电阻后测量最高振荡频率的变动,可以同时获得晶体管共发射极短路电流放大零增益频率f_T、基极电阻γ_b、集电极电容C_c以及本征的特性频率f_Td。讨论了当基极层厚度调制作用所致的集电极电导起作用时的分析方法。最后分析了漂移晶体管最高振荡频率与晶体管外部参数的关系,结果说明,上述方法在考虑了适应于漂移晶体管的修正步骤后,除同样能得到f_Td、γ_b、C_c等有关参数外,还可以分析得出漂移晶体管基极层中的漂移电场强度。     

Control of the Interface Between Electron‐Hole and Electron‐Ion Plasmas: Hybrid Semiconductor‐Gas Phase Devices as a Gateway for Plasma Science

Coupling electron‐hole (e^–‐ h⁺) and electron‐ion plasmas across a narrow potential barrier with a strong electric field provides an interface between the two plasma genres and a pathway to electronic and photonic device functionality. The magnitude of the electric field present in the sheath of a low temperature, nonequilibrium microplasma is sufficient to influence the band structure of a semiconductor region in immediate proximity to the solid‐gas phase interface. Optoelectronic devices demonstrated by leveraging this interaction are described here. A hybrid microplasma/semiconductor photodetector, having a Si cathode in the form of an inverted square pyramid encompassing a neon microplasma, exhibits a photosensitivity in the ～420–1100 nm region as high as 3.5 A/W. Direct tunneling of electrons into the collector and the Auger neutralization of ions arriving at the Si surface appear to be facilitated by an n ‐type inversion layer at the cathode surface resulting from bandbending by the microplasma sheath electric field. Recently, an npn plasma bipolar junction transistor (PBJT), in which a low temperature plasma serves as the collector in an otherwise Si device, has also been demonstrated. Having a measured small signal current gain h_fe as large as 10, this phototransistor is capable of modulat‐ing and extinguishing the collector plasma with emitter‐base bias voltages <1 V. Electrons injected into the base when the emitter‐base junction is forward‐biased serve primarily to replace conduction band electrons lost to the collector plasma by secondary emission and ion‐enhanced field emission in which ions arriving at the base‐collector junction deform the electrostatic potential near the base surface, narrowing the potential barrier and thereby facilitating the tunneling of electrons into the collector. Of greatest significance, therefore, are the implications of active, plasma/solid state interfaces as a new frontier for plasma science. Specifically, the PBJT provides the first opportunity to control the electronic properties of a material at the boundary of, and interacting with, a plasma. By specifying the relative number densities of free (conduction band) and bound (valence band) electrons at the base‐collector interface, the PBJT's emitter‐base junction is able to dictate the rates of secondary electron emission (including Auger neutralization) at the semiconductor‐plasma interface, thereby offering the ability to vary at will the effective secondary electron emission coefficient for the base surface (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Investigation of an InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with reduced potential spike

In this work, an improved InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) with an InGaP wide-bandgap collector is investigated. In the emitter–base region, the thin narrow bandgap n-type GaAs layer is sandwiched between a wide-bandgap N-type InGaP confinement layer and a narrow-bandgap p-type GaAs base layer. In the collector–base structure, an undoped 30 Å-thick GaAs spacer and a heavily doped 30 Å-thick GaAs are inserted between the base and collector. Due to the absence of a potential spike both at the base–emitter and base–collector junctions, the studied device shows lower offset and saturation voltages. In addition, not only are the excellent current–voltage characteristics observed, but also the undesired effects, e.g. the electron blocking effect, are completely eliminated.     

Study of In0.49Ga0.51P/GaAs/In0.49Ga0.51P doubleδ-doped heterojunction bipolar transistor

A lattice-matched In_0.49Ga_0.51P/GaAs/In_0.49Ga_0.51P doubleδ -doped heterojunction bipolar transistor, prepared by low-pressure metal organic chemical vapor deposition (LP-MOCVD), is fabricated successfully and reported. Due to the insertion of δ -doped sheets and setback layers both at base–emitter (B–E) and base–collector (B–C) heterojunctions, the potential spikes are suppressed significantly. In addition, the electron blocking effect is removed and a dramatic improvement of current gain is obtained. A modified Ebers–Moll model is employed to study and analyse the device performances. The experimental results show that the common-emitter current gain over 210 at the collector current of 35 mA and an offset voltageΔV_CE smaller than 50 mV are obtained. Also, a lower knee-shaped voltage of 1.4 V at the collector current of 40 mA is observed. These results indicate that the device studied is a good candidate for high-speed and high-power circuit applications.     

雪崩晶体管的导通方式讨论

本文详细讨论了雪崩晶体管各种不同的导通方式,并发现由于雪崩晶体管C—E极间电压变化速率太大时,造成雪崩晶体管导通,论述了产生这种现象的原因,及此现象的存在对超快速电路的影响。     

双极晶体管在强电磁脉冲作用下的损伤效应与机理

针对典型n⁺-p-n-n⁺结构的双极晶体管,从器件内部电场强度、电流密度和温度分布变化的分析出发,研究了在强电磁脉冲(electromagnetic pulse,EMP)作用下其内在损伤过程与机理.研究表明,双极晶体管损伤部位在不同幅度的注入电压作用下是不同的,注入电压幅度较低时,发射区中心下方的集电区附近首先烧毁,而在高幅度注入电压作用下,由于基区-外延层-衬底构成的PIN结构发生击穿,导致靠近发射极一侧的基极边缘处首先发生烧毁.利用数据分析软件,对不同注入电 关键词： 双极晶体管 强电磁脉冲 器件损伤 损伤功率     

双极晶体管微波损伤效应与机理

结合Si基n⁺-p-n-n⁺外延平面双极晶体管, 考虑了器件自热、高电场下的载流子迁移率退化和载流子雪崩产生效应, 建立了其在高功率微波(high power microwave, HPM)作用下的二维电热模型. 通过分析器件内部电场强度、电流密度和温度分布随信号作用时间的变化, 研究了频率为1 GHz的等效电压信号由基极和集电极注入时双极晶体管的损伤效应和机理. 结果表明集电极注入时器件升温发生在信号的负半周, 在正半周时器件峰值温度略有下降, 与集电极注入相比基极注入更容易使器件毁伤, 其易损部位是B-E结. 对初相分别为0和π的两个高幅值信号的损伤研究结果表明, 初相为π的信号更容易损伤器件, 而发射极串联电阻可以有效的提高器件的抗微波损伤能力.     

Study of the multiple-negative-differential-resistance (MNDR) switching behaviors based on heterojunction bipolar transistor (HBT) structures

In this paper, we demonstrate multiple-negative-differential-resistance (MNDR) switching behaviors based on the InGaP/GaAs heterostructure-emitter bipolar transistor (HEBT) and InGaAlAs/InP heterojunction bipolar transistor (HBT) structures. The devices act like conventional HBTs under forward operation mode. The proposed HEBTs show lower offset voltage due to the correct design of the emitter thickness. On the other hand, MNDR phenomena resulting from avalanche multiplication, confinement effects and the potential redistribution process are observed under inverted operation mode for both devices. In addition, three-terminal NDR characteristics are investigated under the applied base currentI_B . Moreover, for the InGaAlAs/InP HBT, anomalous multiple-route and multiple-step current–voltage (I–V) characteristics at 77 K are observed due to the insertion of a InGaAs quantum well (QW) between the base and collector layers.