A review on the design of ternary logic circuits

A multi-valued logic system is a promising alternative to traditional binary logic because it can reduce the complexity, power consumption, and area of circuit implementation. This article briefly summarizes the development of ternary logic and its advantages in digital logic circuits. The schemes, characteristics, and application of ternary logic circuits based on CMOS, CNTFET, memristor, and other devices and processes are reviewed in this paper, providing some reference for the further research and development of ternary logic circuits.     

A novel circuit design for complementary resistive switch-based stateful logic operations

Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch(CRS)-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits.     

Shannon Logic Based Novel QCA Full Adder Design with Energy Dissipation Analysis

Quantum-dot Cellular Automata (QCA) is an emerging nanotechnology to replace VLSI-CMOS digital circuits. Due to its attractive features such as low power consumption, ultra-high speed switching, high device density, several digital arithmetic circuits have been proposed. Adder circuit is the most prominent component used for arithmetic operations. All other arithmetic operation can be successively performed using adder circuits. This paper presents Shannon logic based QCA efficient full adder circuit for arithmetic operations. Shannon logic expression with control variables helps the designer to reduce hardware cost; using with minimum foot prints of the chip size. The mathematical models of the proposed adder are verified with the theoretical values. In addition, the energy dissipation losses of the proposed adder are carried out. The energy dissipation calculation is evaluated under the three separate tunneling energy levels, at temperature T = 2K.The proposed adder dissipates less power. QCAPro tool is used for estimating the energy dissipation. In this paper we proposed novel Shannon based adder for arithmetic calculations. This adder has been verified in different aspects like using Boolean algebra besides it power analysis has been calculated. In addition 1-bit full adder has been enhanced to propose 2-bit and 4-bit adder circuits.     

Phase-controlling phononic crystals: realization of acoustic Boolean logic gates

A phononic crystal (PC) consisting of a square array of cylindrical polyvinylchloride inclusions in air is used to construct a variety of acoustic logic gates. In a certain range of operating frequencies, the PC band structure shows square-like equi-frequency contours centered off the gamma point. This attribute allows for the realization of non-collinear wave and group velocity vectors in the PC wave vector space. This feature can be utilized to control with great precision, the relative phase between propagating acoustic waves in the PC. By altering the incidence angle of the impinging acoustic beams or varying the PC thickness, interferences occur between acoustic wave pairs. It is recognized that information can be encoded with this mechanism (e.g., wave amplitudes/interference patterns) and accordingly to construct a series of logic gates emulating Boolean functions. The NAND, XOR, and NOT gates are demonstrated with finite-difference time-domain simulations of acoustic waves impinging upon the PC.     

用于弹道测量的实时测速同步触发仪设计

介绍了一种实时获取当发弹丸速度的同步触发系统.采用两台天幕靶和测时电路实时测量当发弹丸的速度,根据测得的速度和事先确定的靶距,计算输出测试仪器触发需要的延时值.同时,设计了滤除蚊虫、飞鸟等外界环境干扰的电路,确保输出的触发信号稳定可靠.详细介绍了系统组成、工作原理与逻辑电路的设计.设计的系统经过实弹射击试验验证,工作稳...     

Double-leaf microperforated panel space absorbers: A revised theory and detailed analysis

A double-leaf microperforated panel space absorber (DLMPP) is composed of two microperforated panels (MPPs) placed in parallel with an air-cavity in-between, without a back wall or any backing structure. This was proposed as a space sound absorber, which can be used for a sound absorbing screen or partition. A conventional MPP absorber with a rigid back wall is effective only around its resonance frequency, which is usually at middle frequencies, and not effective at low frequencies. However, a DLMPP can be effective also at low frequencies, because an additional sound absorption is produced by its acoustic flow resistance. In the authors’ previous work, theoretical analyses on the acoustic properties of a DLMPP were carried out using a simplified electro-acoustical equivalent circuit model. However, the equivalent circuit model includes an approximation, and more sophisticated theory is required for a better prediction and detailed discussion. In this paper, a revised theory for a DLMPP is presented: A Helmholtz integral formulation is employed to obtain a rigorous solution for more precise prediction of the absorptivity of a DLMPP. The result of the present revised theory is compared with that of the equivalent circuit model, and the difference between them is discussed. A parametric survey is made through numerical examples by the present revised theory to discuss its acoustic properties.     

Quantum Fourier Transform-Based Arithmetic Logic Unit on a Quantum Processor

This study proposes and construct a primitive quantum arithmetic logic unit (qALU) based on the quantum Fourier transform (QFT). The qALU is capable of performing arithmetic ADD (addition) and logic NAND gate operations. It designs a scalable quantum circuit and presents the circuits for driving ADD and NAND operations on two-input and four-input quantum channels, respectively. By comparing the required number of quantum gates for serial and parallel architectures in executing arithmetic addition, it evaluates the performance. It also execute the proposed quantum Fourier transform-based qALU design on real quantum processor hardware provided by IBM. The results demonstrate that the proposed circuit can perform arithmetic and logic operations with a high success rate. Furthermore, it discusses in detail the potential implementations of the qALU circuit in the field of computer science, highlighting the possibility of constructing a soft-core processor on a quantum processing unit.     

流化床风帽故障的声发射检测

针对气固流化床中风帽故障影响流化质量问题,本文提出一种能够快速精确地检测出风帽故障位置和类型的声发射检测方法;声发射技术是一种实时、在线、非侵入流场的声波检测方法,利用均匀安装在流化床分布板下方的声发射传感器进行定位测量;采集气固流化床内颗粒撞击分布板产生的声信号,对该信号进行多尺度小波包分解,找出特征频段,由各个测点声发射信号总能量对比可以直观反应风帽故障存在位置,而各尺度能量分率的变化能进行故障类型判断;这种实时测量方法能更早,更精确的对风帽破损情况进行准确的判断。     

用DIS数字化信息系统测量金属棒中声速的有效方法

本文设计了一种将驻波法与声波传感器相结合测定金属棒中声速的有效方法.将金属棒固定在中点,沿轴向摩擦激励纵振动并在棒中形成驻波而发声,用DIS数字化信息系统接收声波信号,得到波形图,由此测得棒中声波的基频和声速.本文分别测定了铝、钢、黄铜、紫铜4种不同金属材料棒中的声速.结果表明,同种材料、不同长度金属棒中声速的测量结果...     

All-optical functions based on semiconductor ring lasers

Semiconductor ring laser （SRL） has been shown to possess robust bistability between its two possible directions, i.e., clockwise （cw） and counter-clockwise （ccw） lasing, routinely demonstrating directional extinction ratio （DER） of 〉 25 dB. In this paper, experimental schemes and results using the SRL as a universal photonic digital element to form all-optical logic, memory, and signal processing circuits are summarized. It is demonstrated that the SRL can be used for both combinatorial and sequential logic functions, and as all-optical regeneration devices. Furthermore, it is shown that a SRL logic circuit can be all-optically reconfigured to perform different all-optical logic functions.     

Polarization-encoded all-optical quaternary multiplexer and demultiplexer - A proposal

Multi-valued logic is positioned as a coming generation technology that can execute arithmetic functions faster and with less interconnect than binary logic. Furthermore, nonbinary data storage would require less physical space than binary data. The application of multi-valued digital signals can provide considerable relief of capacity constraints. In electronics many proposals have already been reported. But, here for the first time we propose an all-optical circuit for designing quaternary (four-valued) multiplexer and demultiplexer with the help of some polarization-encoded basic quaternary logic gates (quaternary min and quaternary delta literal). Nonlinear interferometer-based optical switch can take an important role here. The principles and possibilities of design of all-optical quaternary multi-valued multiplexer and demultiplexer circuits are proposed and described.     

Physical Limitations on Fundamental Efficiency of SET-Based Brownian Circuits

Brownian circuits are based on a novel computing approach that exploits quantum fluctuations to increase the efficiency of information processing in nanoelectronic paradigms. This emerging architecture is based on Brownian cellular automata, where signals propagate randomly, driven by local transition rules, and can be made to be computationally universal. The design aims to efficiently and reliably perform primitive logic operations in the presence of noise and fluctuations; therefore, a Single Electron Transistor (SET) device is proposed to be the most appropriate technology-base to realize these circuits, as it supports the representation of signals that are token-based and subject to fluctuations due to the underlying tunneling mechanism of electric charge. In this paper, we study the physical limitations on the energy efficiency of the Single-Electron Transistor (SET)-based Brownian circuit elements proposed by Peper et al. using SIMON 2.0 simulations. We also present a novel two-bit sort circuit designed using Brownian circuit primitives, and illustrate how circuit parameters and temperature affect the fundamental energy-efficiency limitations of SET-based realizations. The fundamental lower bounds are obtained using a physical-information-theoretic approach under idealized conditions and are compared against SIMON 2.0 simulations. Our results illustrate the advantages of Brownian circuits and the physical limitations imposed on their SET-realizations.     

High throughput N-modular redundancy for error correction design of memristive stateful logic

Memristive stateful logic is one of the most promising candidates to implement an in-memory computing system that computes within the storage unit. It can eliminate the costs for the data movement in the traditional von Neumann system. However, the instability in the memristors is inevitable due to the limitation of the current fabrication technology, which incurs a great challenge for the reliability of the memristive stateful logic. In this paper, the implication of device instability on the reliability of the logic event is simulated. The mathematical relationship between logic reliability and redundancy has been deduced. By combining the mathematical relationship with the vector-matrix multiplication in a memristive crossbar array, the logic error correction scheme with high throughput has been proposed. Moreover, a universal design paradigm has been put forward for complex logic. And the circuit schematic and the flow of the scheme have been raised. Finally, a 1-bit full adder (FA) based on the NOR logic and NOT logic is simulated and the mathematical evaluation is performed. It demonstrates the scheme can improve the reliability of the logic significantly. And compared with other four error corrections, the scheme which can be suitable for all kinds of R-R logics and V-R logics has the best universality and throughput. Compared with the other two approaches which also need additional complementary metal-oxide semiconductor (CMOS) circuits, it needs fewer transistors and cycles for the error correction.     

A Spatial Domain Quantum Watermarking Scheme

This paper presents a spatial domain quantum watermarking scheme. For a quantum watermarking scheme, a feasible quantum circuit is a key to achieve it. This paper gives a feasible quantum circuit for the presented scheme. In order to give the quantum circuit, a new quantum multi-control rotation gate, which can be achieved with quantum basic gates, is designed. With this quantum circuit, our scheme can arbitrarily control the embedding position of watermark images on carrier images with the aid of auxiliary qubits. Besides reversely acting the given quantum circuit, the paper gives another watermark extracting algorithm based on quantum measurements. Moreover, this paper also gives a new quantum image scrambling method and its quantum circuit. Differ from other quantum watermarking schemes, all given quantum circuits can be implemented with basic quantum gates. Moreover, the scheme is a spatial domain watermarking scheme, and is not based on any transform algorithm on quantum images. Meanwhile, it can make sure the watermark be secure even though the watermark has been found. With the given quantum circuit, this paper implements simulation experiments for the presented scheme. The experimental result shows that the scheme does well in the visual quality and the embedding capacity.     

基于泰伯效应的高斯光束尺寸测量

光栅用在高斯光束参数测量中的突出优点是方法简单，成本较低，全息光栅由于其制备容易，无周期误差而比一般光栅具有更多的优点。在用光栅进行光斑测量的实验中，观察到由全息光栅引起的泰伯（Ｔａｌｂｏｔ）效应携带有关光斑参数的有用信息，本文提出了一种基于泰伯效应的测量方法，只需测定条纹间隔就能确定高斯光束尺寸，因此降低了对光源或光栅定位精度，电路和光源稳定性的要求，文中聚焦高斯光束照明全息光栅时光场分布，及其     

The two independent equations of circuits in integral form of field theory:The fundamental law of circuits

1 Introduction Historically, circuit theory was initially considered as a part of the electromagnetic theory. Later on, it branched out to become an independent theory. After several stages of its development, Kirchhoff’s law was commonly regarded as the fundamental law of circuits[1]. Especially after the 1960s, the completely topological formulation of Kirchhoff’s law made even more important contribution to the development of moderncircuit theory. However, it has been also known for a l…     

高维辅助的普适量子线路优化

受到Lanyon等(Lanyon B P et al 2008 Nature Physics. 5 134)利用高维Hilbert空间成功简化Toffoli门的启发, 本文将辅助维度应用到普适量子线路中, 结合Cosine-Sine Decomposition(CSD), Quantum Shannon Decomposition(QSD)等矩阵分解方法, 优化了两比特和三比特普适幺正量子线路, 给出了计算n比特普适量子线路复杂度的公式, 并利用线性光学和腔QED系统设计了实验方案. 结果表明, 两比特和三比特量子线路的复杂度已分别接近和优于目前最优结果, 且随着比特数的增加, 本方案的优势愈加明显.