不同温度下制备的CdTe薄膜对太阳电池光电性能的影响

在不同温度下用近空间升华法（CSS）制备了CdTe多晶薄膜,结合I-V,C-V特性及深能级瞬态谱研究了不同温度制备的CdTe薄膜对CdS/CdTe太阳电池性能的影响.结果表明,制备温度对电池组件的开路电压影响不大,对短路电流和填充因子有影响,CdTe薄膜的深中心对温度和频率的响应基本一致.580℃制备的样品暗饱和电流密度最小,载流子浓度较高,光电特性较好,而且空穴陷阱浓度较低,深中心复合作用较小.在此研究基础上制备出了面积为300 mm×400 mm 关键词： 制备温度 CdTe薄膜 深能级瞬态谱（DLTS） CdS/CdTe太阳电池     

CdS/CdTe薄膜太阳电池的深能级瞬态谱和光致发光研究

用深能级瞬态谱和光致发光研究了无背接触层的CdS/CdTe薄膜太阳电池的杂质分布和深能级中心.得到了净掺杂浓度在器件中的分布.确定了两个能级位置分别在E_V+0365 eV和E_V+0282 eV的深中心,它们的浓度分别为167×10¹² cm^-3和386×10¹¹ cm^-2,俘获截面分别为143×10^-14cm²和153×10^-16cm².它们来源于以化学杂质形式存在的Au和（或）Te_Cd^-复合体,或与氩氧气氛下沉积CdTe时的氧原子相关. 关键词： 深能级瞬态谱 光致发光 CdS/CdTe太阳电池     

Er3+注入CdTe薄膜的结构和光电性能研究

采用离子注入技术对近距离升华制备的CdTe薄膜进行Er³⁺掺杂研究.讨论了不同掺Er³⁺浓度对CdTe薄膜的结构和光电性能的影响.利用X射线衍射仪、扫描电子显微镜、紫外-可见分光光度计、霍耳效应测试系统和复阻抗分析仪对样品进行测试.结果表明，适当的掺杂量可以改善CdTe薄膜的结晶性能，降低晶界势垒高度，提高其导电性能.在一定掺杂范围内掺Er³⁺对CdTe薄膜的光能隙影响不大. 关键词： CdTe薄膜 离子注入 晶界势垒 光能隙     

肖特基结的制备与势垒测量

采用磁控溅射方法在Nb07％-SrTiO3基片上制作Au薄膜接触,并在氧气气氛下750℃退火30 min,在室温环境下测量电流电压和电容电压等特性曲线,观测整流特性,根据相应实验数据采用饱和电流法、电容C-2与反偏电压V成线性关系计算肖特基势垒的大小.     

Er3+注入CdTe薄膜的结构和光电性能研究

采用离子注入技术对近距离升华制备的CdTe薄膜进行Er3+掺杂研究.讨论了不同掺Er3+浓度对CdTe薄膜的结构和光电性能的影响.利用X射线衍射仪、扫描电子显微镜、紫外-可见分光光度计、霍耳效应测试系统和复阻抗分析仪对样品进行测试.结果表明,适当的掺杂量可以改善CdTe薄膜的结晶性能,降低晶界势垒高度,提高其导电性能.在一定掺杂范围内掺Er3+对CdTe薄膜的光能隙影响不大.     

肖特基势垒对铁磁/有机半导体结构自旋注入性质的影响

理论研究了铁磁/有机半导体肖特基接触时的电流自旋极化注入,并讨论了电流自旋极化率随界面处肖特基势垒高度、有机半导体层中特殊载流子及其迁移率、界面附近掺杂浓度的变化关系.通过计算发现,寻找在势垒区中载流子迁移率比较大的有机半导体材料对实现有效的自旋注入是必要的;同时还发现,由于铁磁/有机半导体接触而形成的肖特基势垒不利于自旋注入.因此要想实现有效的自旋注入,界面附近必须采用重掺杂来有效减少势垒区的宽度,且势垒的高度要限制在一定的范围内.     

CdTe,核 壳型CdTe/CdS及CdTe/ZnS量子点的合成及表征

在水相中制备了半导体CdTe纳米晶,核 壳型CdTe/CdS和CdTe/ZnS纳米晶（即量子点;QDs）.利用扫描隧道显微镜（STM）和荧光光谱(FS)对合成的纳米晶量子点进行了研究,并且根据FS的数据进行了量子效率的计算.STM的结果表明合成的量子点直径约为3 nm并且分布良好.为了提高量子效率,对Cd2+浓度和Cd2+∶S2－比例等反应条件进行了研究,结果表明随着回流时间的增加,核 壳型量子点CdTe/CdS的量子效率总体上呈下降趋势.CdTe/CdS在pH8.5,Cd2+∶S2－=10∶1（摩尔比）时可获得80.0%的最大量子效率.同时制备了核 壳型量子点CdTe/ZnS,其最大发射波长由551 nm（CdTe）红移到635 nm（CdTe/ZnS）表明量子点的尺寸在增长,但是量子效率下降到14.4%. 当前研究的量子点可适用于生物标记,生物成像,以及基于共振能量转移的生物传感研究.     

CdTe/CdS核壳结构量子点超快载流子动力学

在水相合成CdTe以及CdTe/CdS核壳结构量子点基础上, 利用基于抽运-探测技术的瞬态差分透射技术研究了CdTe量子点以及不同CdS壳层厚度的CdTe/CdS量子点的最低激子能态的超快激发与弛豫动力学. 研究表明:相比于CdTe,CdTe/CdS量子点的电子空穴由于空间分离,其所需的激发时间要长于电子空穴空间重叠态所需要的激发时间.随着壳层厚度的增加, 量子点表面的钝化有效地减少了表面态相关弛豫机理,并延长相对应的弛豫时间.     

InAs量子点在肖特基势垒二极管输运特性中的影响

在77到292K的范围内,系统研究了含InAs自组装量子点的金属-半导体-金属双肖特基势垒二极管的输运特性.随着温度上升,量子点的存储效应引起的电流回路逐渐减小.在测试温度范围内,通过量子点的共振隧穿过程在电流电压(I-V)曲线中造成台阶结构,且使电流回路随温度的上升急剧减小.根据肖特基势垒的反向I-V曲线,计算了势垒的反向饱和电流密度和平均理想因子.发现共振随穿效应使肖特基势垒在更大的程度上偏离了理想情况,而量子点的电子存储效应主要改变了肖特基势垒的有效势垒高度,从而影响了势垒的反向饱和电流密度 关键词： 自组装量子点 肖特基势垒 电流-电压特性     

Performance improvement in CdTe solar cells by modifying the CdS/CdTe interface with a Cd treatment

The performance of n-CdS/p-CdTe solar cells is often degraded under light soaking or thermal stress, even though the technology of CdTe solar cells is close to a commercial level. The Cu diffusion from a Cu back contact to a CdS window layer might degrade the cell's performance. To prevent the Cu diffusion, a very-thin intrinsic CdTe layer was introduced at the n-CdS/p-CdTe interface by depositing a very-thin Cd metal layer on the CdS film and converting the Cd metal into intrinsic CdTe during p-CdTe deposition at high temperature. By the Cd treatment on CdS surface, pinholes or voids were eliminated at the CdS/CdTe and the intermixing of Te and S at the interface was much suppressed. The depletion width was much increased and the intensity of LTPL peak was increased. The analysis suggested that an intrinsic CdTe interlayer was formed and the surface recombination rate was suppressed by the intrinsic interlayer. As a result, the short circuit current of the CdTe solar cell was significantly increased due the increased current gain in the blue wavelength region. The thermal stability of the CdTe solar cell was also greatly improved and the Cu diffusion was retarded by the intrinsic CdTe interlayer at the n-CdS/p-CdTe.     

Understanding the junction degradation mechanism in CdS/CdTe solar cells using a Cd-deficient CdTe layer

It is known that CdTe solar cells are often degraded under solar illumination. But the degradation mechanism is not fully proved because it does not appear consistently. The junction degradation in CdS/CdTe solar cells was investigated using a CdTe layer with Cd deficient composition, where Cd vacancy concentration is high. It was found that the Cu atoms easily filled the Cd vacancies in CdTe and transport to junction area from Cu back contact. PL measurement and spectral quantum efficiency measurement showed that the incorporation of Cu atoms in CdS forms a defect energy level at 1.55 eV below the conduction band in CdS. As a result, the junction built-in potential is decreased and light penetration into CdTe absorber is shielded. For reliable and stable CdTe cells, the formation of Cd vacancy in CdTe should be avoided by careful control of CdTe.     

碲化镉薄膜太阳电池中的关键科学问题研究

文章对CdTe薄膜太阳电池中的4个关键科学问题进行了讨论,并对电池器件的性能进行了研究,其中包括高质量硫化镉薄膜、背接触层、CdS/CdTe界面和CdCl2热处理性能的研究。文章作者研究了背电极接触层中Cu掺杂含量对电池性能的影响,通过改变背接触层中Cu的含量,可以改变Cu与Te反应产生的物相成分,从而发现以Cu1.4Te为主导的背接触缓冲层能有效地减少电池I—V 曲线中的“翻转”(roll-over)现象,同时能有效地降低背接触势垒。此外,还研究了CdS/CdTe界面的CdCl2热处理反应,发现当热处理温度高于350℃时,CdS与CdTe之间的互扩散开始发生,此温度对应于CdS由立方相转变为六方相;而在550℃热处理后,S 和Te 互扩散形成的CdSxTe1-x 化合物,其x 值高达11%。通过优化电池制备工艺,获得了在AM1.5标准光源下高达14.6%的CdTe电池转换效率。     

Enhancing the performance of thin film CdS/PbS photovoltaic solar cells

This work investigates dependence of the short-circuit current density, open-circuit voltage, fill factor and efficiency of a thin film CdS/PbS solar cell on thickness of transparent conductive oxide (TCO) layer, thickness of window layer (CdS), concentration of uncompensated acceptors (width of space-charge region), carrier lifetime in PbS and the reflectivity from metallic back contact. The effect of optical losses, front and rear recombination losses as well as the recombination losses on space-charge region are also considered in this study. As a result, by thinning the front contact layer indium tin oxide from 400 to 100 nm and window layer (CdS) from 200 to 100 nm it is possible to reduce the optical losses from 32 to 20%. The effect of electron lifetime on the internal and external quantum efficiency can be neglected at high width of the space-charge region. The maximum current density of 18.4 mA/cm² is achieved at wide space-charge region (concentration of uncompensated acceptors = 10¹⁵ cm^?3) and the longest lifetime (τ_n = 10^?6 s) where the optical and recombination losses are about 55%. The maximum efficiency of 5.17%, maximum open-circuit voltage of 417 mV and approximately fixed fill factor of 74% are yielded at optimum conditions such as: electron lifetime = 10^?6 s; concentration of uncompensated acceptors = 10¹⁶ cm^?3; thickness of TCO = 100 nm; thickness of CdS = 100 nm; velocity of surface and rear recombination = 10⁷ cm/s and thickness of absorber layer = 3 μm. When the reflectance from the back contact is 100%, the cell parameters improve and the cell efficiency records a value of 6.1% under the above conditions.     

Theoretical study on the behaviour of metal-p-n-Si Schottky barrier solar cell

The performance of Au-p-n-Si Schottky barrier solar cell has been investigated theoretically following Li’s work on GaAs. The behaviour of the barrier height as a function of carrier densities in then andp regions and thep layer thickness is investigated. The photovoltaic cell characteristics are worked out and conditions for maximum efficiency obtained. Communication No. 2376     

Evaluation of electrical and optical characteristics of ZnO/CdS/CIS thin film solar cell

In this study, device modeling and simulation are conducted to explain the effects of each layer thickness and temperature on the performance of ZnO/CdS/CIS thin film solar cells. Also, the thicknesses of the CIS and CdS absorber layers are considered in this work theoretically and experimentally. The calculations of solar cell performances are based on the solutions of the well-known three coupling equations: the continuity equation for holes and electrons and the Poisson equation. Our simulated results show that the efficiency increases by reducing the CdS thickness. Increasing the CIS thickness can increase the efficiency but it needs more materials. The efficiency is more than 19% for a CIS layer with a thickness of 2 μm. CIS nanoparticles are prepared via the polyol route and purified through centrifugation and precipitation processes.Then nanoparticles are dispersed to obtain stable inks that could be directly used for thin-film deposition via spin coating.We also obtain x-ray diffraction(XRD) peak intensities and absorption spectra for CIS experimentally. Finally, absorption spectra for the CdS window layer in several deposition times are investigated experimentally.     

Thermally evaporated CdS/CdTe thin film solar cells: Optimization of CdCl2 evaporation treatment on absorber layer

CdCl₂ treatment is crucial in the fabrication of highly efficient CdS/CdTe thin-film solar cells. This study reports a comprehensive analysis of thermal evaporated CdS/CdTe thin-film solar cells when the CdTe absorber layer is CdCl₂ annealed at temperatures from 340 to 440 °C. Samples were characterized for structural, optical, morphological and electrical properties. The films annealed at 400 °C showed better crystallinity with a cubic zinc blende structure having large grains. Higher refractive index, optical conductivity, and absorption coefficient were recorded for the CdTe films annealed at 400 °C with CdCl₂. Optimum photoactive properties for CdS/CdTe thin-film solar cells were also obtained when samples were annealed at 400 °C for 20 min with CdCl₂, and the best device exhibited V_OC of 668.4 mV, J_SC of 13.6 mA cm⁻², FF of 53.9% and an efficiency of 4.9%.     

Deep level transient spectroscopy investigation of deep levels in CdS/CdTe thin film solar cells with Te:Cu back contact

Deep levels in Cds/CdTe thin film solar cells have a potent influence on the electrical property of these devices. As an essential layer in the solar cell device structure, back contact is believed to induce some deep defects in the CdTe thin film. With the help of deep level transient spectroscopy (DLTS), we study the deep levels in CdS/CdTe thin film solar cells with Te:Cu back contact. One hole trap and one electron trap are observed. The hole trap H1, localized at E_v+0.128~eV, originates from the vacancy of Cd (V_Cd. The electron trap E1, found at E_c-0.178~eV, is considered to be correlated with the interstitial Cu_i⁼ in CdTe.