Characterization of magnesium oxide gate insulators grown using RF sputtering for ZnO thin-film transistors

A ZnO thin-film transistor (TFT) with an MgO insulator was fabricated on a silicon (100) substrate using a radiofrequency magnetron sputtering system. The MgO insulator was deposited using the same deposition system; the total pressure during the deposition process was maintained at 5 mTorr, and the oxygen percentage of O₂/(Ar + O₂) was set at 30%, 50%, or 70%. The process temperature was maintained at below 300 °C. The dielectric constant of the MgO thin layer was approximately 11.35 with an oxygen percentage of 70%. This ZnO TFT displayed enhanced transistor properties, with a field-effect mobility of 0.0235 cm² V⁻¹ s⁻¹, an I_ON/I_OFF ratio of ∼10⁵, and an SS value of 1.18 V decade⁻¹; these properties were superior to those measured for the MgO insulators synthesized using oxygen percentages of 30% and 50%.     

Top-gate amorphous IGZO thin-film transistors with a SiO buffer layer inserted between active channel layer and gate insulator

In this paper, top-gate thin-film transistors (TFTs) using amorphous In-Ga-Zn-O as the n-channel active layer and SiO₂ as gate insulator were fabricated by radio frequency magnetron sputtering at room temperature. In this device, a SiO layer was used to be a buffer layer between active layer and gate insulator for preventing the damage of the InGaZnO surface by the process of sputtering SiO₂ with relatively high sputtering power. The thickness of buffer layers was studied and optimized for enhancing the TFTs performances. Contrasting to the TFTs without buffer layer, the optimized thickness of 10 nm SiO buffer layer improved the top-gate TFTs performances greatly: mobility increases 30%, reached 1.29 cm²/V s, the I_on/I_off ratio increases 3 orders, and the trap density at the interface of channel/insulator decreases about 1 order, indicated that the improvement of semiconductor/dielectric interface by buffering the sputtering power.     

Polymer thin-film transistors with high dielectric constant gate insulators

Field-effect transistors consisting of poly(3-hexylthiophene) have been fabricated with high dielectric constant SrBi₂Ta₂O₉ films working as the gate insulator. Significantly enhanced gate effects were observed in these devices compared to similar transistors with conventional SiO₂ gate dielectric. Our devices exhibited operating voltages around 10 V, as compared to about 100 V for devices employing SiO₂ as the gate dielectric. Moreover, inverters based on such polymer transistors were demonstrated with nice input–output characteristics. PACS 82.35.Cd     

A photosensitive copolymer for the gate insulator of organic thin-film transistors

A novel cross-linkable copolymer for the gate insulators of organic thin-film transistors (OTFTs) was synthesized by free radical copolymerization with methyl methacrylate and ethylene methylacrylate cinnamoylate. Copolymers of molecular weights (Mn: 109200–160000 g mol⁻¹) and polydispersities (1.59–2.24) were characterized by FTIR and NMR. Spin-coated thin films had smooth surfaces with the root-mean-square (RMS) surface roughness of 0.23 nm, 0.41 nm, respectively, before and after UV irradiation. Exposure of the copolymers to UV light produced cross-linking of the polymeric chains that could be confirmed by comparing the FTIR and UV spectra recorded prior and after irradiation. Moreover, the vanadyl-phthalocyanine (VOPc) OTFTs with the photosensitive copolymer as gate insulator were fabricated and found to exhibit a carrier mobility of 0.25 cm²/V s, an on/off ratio of 10⁴.     

Enhanced electrical properties of pentacene-based organic thin-film transistors by modifying the gate insulator surface

A reliable surface treatment for the pentacene/gate dielectric interface was developed to enhance the electrical transport properties of organic thin-film transistors (OTFTs). Plasma-polymerized fluorocarbon (CFx) film was deposited onto the SiO₂ gate dielectric prior to pentacene deposition, resulting in a dramatic increase of the field-effect mobility from 0.015 cm²/(V s) to 0.22 cm²/(V s), and a threshold voltage reduction from −14.0 V to −9.9 V. The observed carrier mobility increase by a factor of 10 in the resulting OTFTs is associated with various growth behaviors of polycrystalline pentacene thin films on different substrates, where a pronounced morphological change occurs in the first few molecular layers but the similar morphologies in the upper layers. The accompanying threshold voltage variation suggests that hole accumulation in the conduction channel-induced weak charge transfer between pentacene and CFx.     

Polymer thin-film transistor based on a high dielectric constant gate insulator

In this paper full polymer thin-film transistors (PTFTs) based on Poly (acrylonitrile) (PAN) as the gate dielectric and poly (2-methoxy-5-(2'-ethyl-hexyloxy)-1,4-phenylene-vinylene) (MEH-PPV) as the semiconductor layer were investigated by using different channel width/length ratios. Relatively high dielectric constant of the polymer dielectric layer (6.27) can remarkably reduce the threshold voltage of the transistors to below -3V. Hole field-effect mobility of MEH-PPV of the PTFTs was about 4.8×10^-4cm²/Vs, and on/off current ratio was larger than 10², which was comparable with that of transistors with widely used Poly (4-vinyl phenol) (PVP) or SiO₂ as gate dielectrics.     

Composition influence of SiNx gate insulator fabricated by radio frequency (RF) Magnetron sputtering on characteristics of organic thin-film transistors

To investigate the effect of composition of SiNx on the properties of organic thin-film transistors (OTFTs), we fabricated bottom gate top contact OTFTs devices with different composition SiNx gate insulator. Pentacene based OTFTs with SiNx insulator, prepared using an interface modification process of UV-ozone treatment, exhibited effective mobility of 0.63 cm2/Vs and on/off current ratio of 10⁵. Overall improvement in field-effect mobility, threshold voltage was observed as silicon content in SiNx increases. The results demonstrate that the viability of using SiNx for OTFTs and of UV-ozone treatment could be used to improve the properties of organic thin-film transistors. The dependence of the contact angle on the SiNx film composition is evident for the untreated samples, the contact angle increases as the silicon content in the untreated nitride film increases. In contrast, the rise in contact angle across all samples after surface treatment signifies effective surface modification to promote hydrophobicity of the nitride surface. The hydrophobic surface is needed for the organic semiconductor.     

Pentacene thin film transistors using La2O3 as gate insulator

A study of Pentacene OTFTs using La₂O₃ as gate insulator is presented. The device characteristics were studied and analyzed. The OTFTs exhibit p-type conductivity with field effect mobility 6.5 × 10⁻⁸ m²/V.s, ON/OFF ratio 1.4 × 10², sub-threshold swing 2 mV/decade and hole concentration 4.5 × 10¹⁷ cm⁻³. The SEM and XRD analysis on the semiconductor film are also reported.     

Normally-off AlGaN/GaN heterojunction field-effect transistors with in-situ AlN gate insulator

AlGaN/GaN heterojunction field-effect transistors (HFETs) with p-GaN cap layer are developed for normally-off operation, in which an in-situ grown AlN layer is utilized as the gate insulator. Compared with the SiN_x gate insulator, the AlN/p-GaN interface presents a more obvious energy band bending and a wider depletion region, which helps to positively shift the threshold voltage. In addition, the relatively large conduction band offset of AlN/p-GaN is beneficial to suppress the gate leakage current and enhance the gate breakdown voltage. Owing to the introduction of AlN layer, normally-off p-GaN capped AlGaN/GaN HFET with a threshold voltage of 4 V and a gate swing of 13 V is realized. Furthermore, the field-effect mobility is approximately 1500 cm²·V^-1·s^-1 in the 2DEG channel, implying a good device performance.     

An organic electrophosphorescent device driven by all-organic thin-film transistor using photoacryl as a gate insulator

Organic electrophosphorescent devices have been intensively investigated for using in full-color flat-panel display. Since the quantum efficiency of electrophosphorescent device decreases rapidly as the luminance increases, it is desirable to operate the electrophosphorescent display with active matrix rather than passive matrix. Here we report the study of driving electrophosphorescent diode with all-organic TFT. We obtained the maximum power luminance that was obtained about 90 cd/m². Turn-on voltage is approximately 10 V. Field effect mobility, threshold voltage, and on–off current ratio in 0.5-μm thick gate dielectric layer were 0.13 cm²/V s, −7 V, and 10⁶ A/A. The structure of electrophosphorescent diode is ITO/TPD/BCP:Ir(ppy)₃/BCP/Alq₃/Li:Al/Al. In organic TFT, photoacryl is used as an insulator and pentacene as an active layer.     

Effect of stacked dielectric with high dielectric constant and surface modification on current enhancement in pentacene thin-film transistors

The effect of a stacked dielectric has been studied on pentacene thin-film transistors (TFTs) with respect to the current enhancement, the crystalline polymorph, and the structural change of the film. Here we show that the performance improvement of the device is successfully achieved by the dielectric effects of the high dielectric constant and the surface modification in hybrid dielectric configuration. The systematic analysis on the device feature governed by the interfacial property was carried out for a hybrid structured insulator system using SiO₂ and cross-linked (C-L) polyvinyl alcohol (PVA), including the surface modified layer of dilute polymethyl methacrylate (PMMA). Through thickness combinations of bilayer dielectrics with low-k SiO₂ and high-k PVA, the device also exhibits noticeable enhancement of the current drivability up to the current level of 94 μA at a practical gate bias of ?30 V. Moreover, we present the effect of a surface-modified layer with dilute PMMA. After the formation of ultra-thin PMMA layer in a bilayer insulator, the organic dielectric shows an effectively changed surface property into hydrophobicity even on a strong hydroxyl-rich dielectric surface, resulting in the distinct increase of structural order in the film due to the reduction of surface free energy.     

Modeling of polycrystalline ZnO thin-film transistors with a consideration of the deep and tail states

We report a model of the carrier transport and the subgap density of states in a polycrystalline ZnO film for simulating a polycrystalline ZnO thin film transistor. This simple model considering the deep and the band tail states reproduces well the characteristics of polycrystalline ZnO thin film transistors. Furthermore, using the developed model, we study the effects of defect parameters on the electrical performances of the polycrystalline ZnO thin film transistors.     

Degradation and its fast recovery in a-IGZO thin-film transistors under negative gate bias stress

A new type of degradation phenomena featured with increased subthreshold swing and threshold voltage after negative gate bias stress (NBS) is observed for amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs), which can recover in a short time. After comparing with the degradation phenomena under negative bias illumination stress (NBIS), positive bias stress (PBS), and positive bias illumination stress (PBIS), degradation mechanisms under NBS is proposed to be the generation of singly charged oxygen vacancies ($V_{\mathrm{o}}^{+}$) in addition to the commonly reported doubly charged oxygen vacancies ($V_{\mathrm{o}}^{2+}$). Furthermore, the NBS degradation phenomena can only be observed when the transfer curves after NBS are measured from the negative gate bias to the positive gate bias direction due to the fast recovery of $V_{\mathrm{o}}^{+}$ under positive gate bias. The proposed degradation mechanisms are verified by TCAD simulation.     

Degradation mechanisms for a-InGaZnO thin-film transistors functioning under simultaneous DC gate and drain biases

Degradation of a-InGaZnO thin-film transistors working under simultaneous DC gate and drain bias stress is investigated, and the corresponding degradation mechanism is proposed and verified. The maximum degradation occurs under the bias stress condition that makes the electric field and electron concentration relatively high at the same time. Trapping of hot electrons in the etching-stop layer under the extended drain electrode is proven to be the underlying mechanism. The observed degradation phenomena, including distortion in the transfer curve on a logarithmic scale and two-slope dependence on gate bias on a linear scale, current crowding in the output curve, and smaller degradation in transfer curves measured under large drain bias, can all be well explained with the proposed degradation mechanism.     

Carbon nanotube transistors with graphene oxide films as gate dielectrics

Carbon nanomaterials,including the one-dimensional(1-D) carbon nanotube(CNT) and two-dimensional(2-D) graphene,are heralded as ideal candidates for next generation nanoelectronics.An essential component for the development of advanced nanoelectronics devices is processing-compatible oxide.Here,in analogy to the widespread use of silicon dioxide(SiO2) in silicon microelectronic industry,we report the proof-of-principle use of graphite oxide(GO) as a gate dielectrics for CNT field-effect transistor(FET) via a...     

Optical properties of ZnO thin films on SiO2 substrates deposited by radio frequency magnetron sputtering

The optical properties of both the annealed and as-deposited ZnO thin films by radio frequency (RF)magnetron sputtering on SiO2 substrates were studied. In the annealed films, two pronounced well defined exciton absorption peaks for the A and B excitons were obtained in the absorption spectra, a strong free exciton emission without deep-level emissions was observed in the photoluminescence (PL) spectra at room temperature. It was found that annealing the films in oxygen dramatically improved the optical properties and the quality of the films.     

High-performance amorphous indium gallium zinc oxide thin-film transistors with sol-gel processed gate dielectric and channel layer fabricated using microwave irradiation

In this study, we fabricated high-performance a-IGZO TFTs by forming Al₂O₃ and a-IGZO thin films for gate insulator and active channel layer, respectively, using a sol-gel process. MWI for low thermal budget process was used to condensate Al₂O₃ and a-IGZO films, which was compared with the CTA. It is found that the MWI is superior process to the conventional method in terms of precursor and solvent decomposition and has proven to be more effective for eliminating residual organic contaminants. In addition, the MWI-treated Al₂O₃ and IGZO films have smoother surfaces, higher visible light transmittance, lower carbon contamination and impurities than the CTA-treated films. We have demonstrated that a-IGZO TFTs with sol-gel solution-processed Al₂O₃ gate insulator and a-IGZO channel layer can achieve a field effect mobility of 69.2 cm²/V·s, a subthreshold swing of 86.2 mV/decade and a large on/off current ratio of 1.48 × 10⁸, by the MWI process even at temperatures below 200 °C. In addition, the MWI-treated a-IGZO TFTs have excellent resistance to electron trapping and good stability to positive and negative gate-bias stress. Therefore, the sol-gel processed a-IGZO TFTs with Al₂O₃ gate oxide and the MWI treatment with a low thermal budget are promising for emerging transparent flat panel displays applications.     

Negative gate bias stress effects on conduction and low frequency noise characteristics in p-type poly-Si thin-film transistors

The instability of p-channel low-temperature polycrystalline silicon thin film transistors(poly-Si TFTs) is investigated under negative gate bias stress(NBS) in this work. Firstly, a series of negative bias stress experiments is performed, the significant degradation behaviors in current–voltage characteristics are observed. As the stress voltage decreases from-25 V to-37 V, the threshold voltage and the sub-threshold swing each show a continuous shift, which is induced by gate oxide trapped charges or interface state. Furthermore, low frequency noise(LFN) values in poly-Si TFTs are measured before and after negative bias stress. The flat-band voltage spectral density is extracted, and the trap concentration located near the Si/SiO_2 interface is also calculated. Finally, the degradation mechanism is discussed based on the current–voltage and LFN results in poly-Si TFTs under NBS, finding out that Si–OH bonds may be broken and form Si*and negative charge OH-under negative bias stress, which is demonstrated by the proposed negative charge generation model.