Electrical Modeling of Thin-Film Transistors

An overview of device physics-oriented electrical modeling of thin-film transistors (TFTs) is presented. Four specific models are considered: (i) square-law, (ii) 3-layer, (iii) comprehensive depletion-mode, and (iv) discrete trap. For each model, a functional assessment of model equations is undertaken in terms of independent and dependent variables, model parameters, physical operating parameters, and constraining inequalities in order to facilitate mapping of model equations into a corresponding equivalent circuit. Channel mobility and “subthreshold” current trends are elucidated. Finally, a conductance integral equation based on Shockley's gradual channel approximation is introduced and is employed in model development and device assessment.     

Electrical Instability of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors under Ultraviolet Illumination

The electrical instability behaviors of amorphous-indium-gallium-zinc-oxide(a-IGZO) thin-film transistors(TFTs)under ultraviolet(UV) illumination are studied.As UV radiation dosage increases,the turn-on voltage of the TFT shows continuous negative shift,which is accompanied by enhanced degradation of sub-threshold swing and field-effect mobility.The electrical instability is caused by the increased carrier concentration and defect states within the device channel,which can be further attributed to additional oxygen vacancy generation and ionization of oxygen vacancy related defects upon UV illumination,respectively.Furthermore,the performance of the a-IGZO TFT treated with UV radiation can gradually recover to its initial state after long-time storage.     

Ultralow-Voltage Electric-Double-Layer Oxide-Based Thin-Film Transistors with Faster Switching Response on Flexible Substrates

Phosphosilicate glass （PSG） electrolyte films are deposited by improving the content of phosphorus doping during plasma-enhanced chemical vapor deposition, and a fast electric-double-layer （EDL） polarization response of 100 kHz is measured. The mechanism of the fast polarization response and EDL formation are investigated in detail. By using PSG electrolyte films as gate dielectrics, indium-zinc-oxide （1Z0） thin-film transistors （TFTs） are fabricated on flexible plastic substrates. Due to the huge EDL gate capacitance, such TFTs show only 0.8 V operation and excellent electrical performances with a large current on/off ratio of 10^7, low subthreshold swing of 72 m V/decade and high Eeld-effect mobility of 16.76 cm^2 /V·s. More importantly, the devices exhibit a fast switching response above 100Hz. Our results demonstrate that such PSG gated TFTs take a great step for low-power flexible oxide electronics application.     

柔性低温多晶硅薄膜晶体管的弯曲稳定性

研究了以聚酰亚胺为基板的p型低温多晶硅薄膜晶体管在不同弯曲半径下的偏压稳定性。当曲率半径从15 mm变到3 mm时,在拉伸弯曲状态下,阈值电压和平坦时保持一致(Vth=-1.34 V),迁移率μsat从45.65 cm~2/(V·s)降到45.17 cm~2/(V·s),开关比增大;在压缩弯曲状态下,转移特性曲线和平坦状态保持了非常好的一致性。在最小弯曲半径为3 mm时,进行了正负偏压稳定性测试,结果表明,器件依然具有很好的稳定性。     

Electrical Characterization of Copper Phthalocyanine Thin-Film Transistors with Fluoride Gate Insulator

Different fluoride materlals are used as gate dielectrics to fabricate copper phthalocyanine （CuPc） thin film transistors （OTFTs）. The fabricated devices exhibit good electrical characteristics and the mobility is found to be dependent on the gate voltage from 10^-3 to 10^-1 cm^2V^-1 s^-1. The observed noticeable electron injection at the drain electrode is of great significance in achieving ambipolar OTFTs, The same method for formation of organic semiconductors and gate dielectric films greatly simplifies the fabrication process. This provides a convenient way to produce high-performance OTFTs on a large scale and should be useful for integration in organic displays.     

Electrical Characteristics of Copper Phthalocyanine Thin-Film Transistors with Polyamide-6/Polytetrafluoroethylene Gate Insulator

Polyamide-6（PA 6）/polytetrafluoroethylene is studied as a potential gate dielectric for flexible organic thin film transistors. The same method used for the formation of organic semiconductor and gate dielectric films greatly simplifies the fabrication process of devices. The fabricated transistors show good electrical characteristics. Ambipolar behaviour is observed even when the device is operated in air.     

Influence of Post-Annealing on Electrical Characteristics of Thin-Film Transistors with Atomic-Layer-Deposited ZnO-Channel/Al_2O_3-Dielectric

High-performance thin-film transistors(TFTs) with a low thermal budget are highly desired for flexible electronic applications.In this work,the TFTs with atomic layer deposited ZnO-channel/Al_2O_3-dielectric are fabricated under the maximum process temperature of 200℃.First,we investigate the effect of post-annealing environment such as N_2,H_2-N_2(4%) and O_2 on the device performance,revealing that O_2 annealing can greatly enhance the device performance.Further,we compare the influences of annealing temperature and time on the device performance.It is found that long annealing at 200℃ is equivalent to and even outperforms short annealing at 300℃.Excellent electrical characteristics of the TFTs are demonstrated after O_2 annealing at 200℃ for 35 min,including a low off-current of 2.3 × 10~(-13) A,a small sub-threshold swing of 245mV/dec,a large on/off current ratio of 7.6×10~8,and a high electron effective mobility of 22.1cm~2/V·s.Under negative gate bias stress at — 10 V,the above devices show better electrical stabilities than those post-annealed at 300℃.Thus the fabricated high-performance ZnO TFT with a low thermal budget is very promising for flexible electronic applications.     

Improved Performance by a Double-Insulator Layer in Organic Thin-Film Transistors

Organic thin film transistors based on pentacene are fabricated by the method of full evaporation. The thickness of insulator film can be controlled accurately, which influences the device operation voltage markedly. Compared to the devices with a single-insulator layer, the electric performance of devices by using a double-insulator as the gate dielectric has good improvement. It is found that the gate leakage current can be reduced over one order of magnitude, and the on-state current can be enhanced over one order of magnitude. The devices with double-insulator layer exhibit field-effect mobility as large as 0.14cm^2/Vs and near the zero threshold voltage. The results demonstrate that using a proper double insulator as the gate dielectrics is an effective method to fabricate OTFTs with high electrical performance.     

Reinforced Concrete Fracture Diagnostics under Conditions of Bending by Parameters of the Electric Response to an Impact Action

Technical Physics - Regularities of changes in the stress-strain state of reinforced concrete in the process of testing for four-point bending have been studied. The change in characteristics of...     

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

An analytical model for current–voltage behavior of amorphous In-Ga-Zn-O thin-film transistors(a-IGZO TFTs)with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance(C_(TI)/C_(BI)).Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.     

ZnO-Based Transparent Thin-Film Transistors with MgO Gate Dielectric Grown by in-situ MOCVD

ZnO transparent thin-film transistors with MgO gate dielectric were fabricated by in-situ metal organic chemicM vapor deposition （MOCVD） technology. We used an uninterrupted growth method to simplify the fabrication steps and to avoid the unexpectable contaminating during epitaxy process. MgO layer is helpful to reduce the gate leakage current, as well as to achieve high transparency in visible light band, due to the wide band gap （7. 7eV） and high dielectric constant （9.8）. The XRD measurement indicates that the ZnO layer has high crystal quality. The field effect mobility and the on/off current ratio of the device is 2.69cm^2V^-1s^-1 and - 1 × 10^4, respectively.     

Bilayer Photoresist Insulator for High Performance Organic Thin-Film Transistors on Plastic Films

A novel bilayer photoresist insulator is applied in flexible vanadyl-phthalocyanine （VOPc） organic thin-film transistors （OTFTs）. The micron-size patterns of this photoresisit insulator can be directly defined only by photolithography without the etching process. Furthermore, these OTFTs exhibit high field-effect mobility （about 0.8cm2/Vs） and current on/off ratio （about 106）. In particular, they show rather low hysteresis （〈 1 V）. The results demonstrate that this bilayer photoresist insulator can be applied in large-area electronics and in the facilitation of patterning insulators.     

Growth Related Carrier Mobility Enhancement of Pentacene Thin-Film Transistors with High-k Oxide Gate Dielectric

Carrier mobifity enhancement from 0.09 to 0.59cm2/Vs is achieved for pentacene-based thin-film transistors （TFTs） by modifying the Hf02 gate dielectric with a polystyrene （PS） thin film. The improvement of the transistor＇s performance is found to be strongly related to the initial film morphologies of pentacene on the dielectrics. In contrast to the three-dimensional island-like growth mode on the HI02 surface, the Stranski- Krastanov growth mode on the smooth and nonpolar PS/HfO2 surface is believed to be the origin of the excellent carrier mobility of the TFTs. A large well-connected first monolayer with fewer boundaries is formed via the Stranski-Krastanov growth mode, which facilitates a charge transport parallel to the substrate and promotes higher carrier mobility.     

Low-Voltage Depletion-Mode Indium-Tin-Oxide Thin-Film Transistors Gated by Ba0.4Sr0.6TiO3 Dielectric

We report on the fabrication and characterization of low-voltage indium-tin-oxide （ITO） thin-film transistors （TFTs） gated by a0.4Sr0.6TiO3 （BST） gate dielectric deposited at room temperature. The 400-nm-thick BST film shows a low leakage current density of 6 × 10^-8 A/cm^2 and a high specific capacitance of 83 nF/cm^2 （corresponding εr= 37）. The ITO TFTs gated by such BST dielectric operate in a depletion mode with an operation voltage of 5.0 V. The device exhibits a threshold voltage of -3.7 V, a subthreshold swing of 0.5 V/decade, a field effect mobility of 3.2cm^2/Vs and a current on/off ratio of 1.4× 10^4.     

Electrical Characterization of Deep Trap Properties in High-k Thin-Film HfO2 Dielectric

Deep-trap properties of high-dielectric-constant （k） HfO2 thin films are investigated by deep-level transient spectroscopy and capacitance-voltage methods. The hole traps of the HfO2 dielectric deposited on a p-type Si substrate by sputtering are investigated in a metal-oxide-semiconductor structure over a temperature range of 300-500K. The potential depth, cross section and concentration of hole traps are estimated to be about 2.5eV, 1.8 ×10^-16 cm^2 and 1.0 × 10^16 cm^-3, respectively.     

Effect of the Crystal Structure on the Electrical Properties of Thin-Film PZT Structures

A new method of two-stage crystallization of lead zirconate–titanate (PZT) films using a seed sublayer with a low excess lead content has been proposed and realized. A seed layer with a strong texture of perovskite Pe(111) grains is formed from a solution with a lead excess of 0–5 wt %; the fast growth of the grains is provided by the deposition of the main film from a solution with high lead content. As a result, a strong Pe(111) texture with complete suppression of the Pe(100) orientation forms. An analysis of current–voltage dependences of the transient currents and the distributions of the local conductivity measured by the contact AFM method reveals two various mechanisms of current percolation that are determined by traps in the bulk and at the perovskite grain interfaces.

     

Electrical Studies on Pentacene Thin Film Transistors with Different Channel Widths

In order to conduct electrical studies on organic thin film transistors, top-contact devices are fabricated by growing polycrystalline films of freshly synthesized pentacene over Si/SiO2 substrates with two different channel widths under identical conditions. Reasonable field effect mobilities in order of 10^-2-10^-3 cm^2V^-1s^-1 are obtained in these devices. An elaborative electrical characterization of all the devices is undertaken to study the variance in output saturation current, field effect mobility, and leakage current with aging under ambient conditions. As compared to the devices with longer channel width, the devices with shorter channel width exhibit better electrical performance initially. However, the former devices sustain the moderate performance much longer than the latter ones.     

氮掺铟锡锌薄膜晶体管的制备及其光电特性

以P型100硅作为衬底,采用射频磁控溅射技术,在室温下制备了氮掺杂氧化铟锡锌薄膜晶体管(ITZO TFTs),研究了氮气流量对氧化铟锡锌薄膜晶体管结构、光学、电学特性以及稳定性的影响。实验结果表明:在不同氮气流量条件下制备的氧化铟锡锌薄膜均为非晶态,在可见光范围内的平均透过率均在90%左右,光学带隙数值在3.28~3.32 e V之间变化。在氮气流量为4 m L/min时制备的ITZO TFTs,有源层与栅极电介质界面处的界面态密度(N~(max)_s)仅为4.3×10~(11)cm~(-2),场效应迁移率(μ_(FE))为18.72 cm~2/(V·s),开关比(I_(on/off))为10~6,亚阈值摆幅(S)为0.39 V/dec,电学性能最优。栅极正偏压应力测试结果表明,该器件具有最强的稳定性。因此,适量的氮掺杂可有效地实现器件氧空位的钝化,降低器件的界面态密度,提高ITZO TFTs的电学性能及稳定性。