源、漏到栅距离对次亚微米ggNMOS ESD保护电路鲁棒性的影响

基于对静电放电(electrostatic discharge,ESD)应力下高电压、大电流特性的研究,本文通过优化晶格自加热漂移-扩散模型和热力学模型,并应用优化模型建立了全新的0.6 μm CSMC 6S06DPDM-CT02 CMOS工艺下栅接地NMOS (gate grounded NMOS,ggNMOS)ESD保护电路3D模型,对所建模型中漏接触孔到栅距离(drain contact to gate spacing,DCGS)与源接触孔到栅距离(source contact to gate sp 关键词： 栅接地NMOS 静电放电 漏接触孔到栅的距离 源接触孔到栅的距离     

栅耦合型静电泄放保护结构设计

提出了一种新型栅耦合型静电泄放(ESD)保护器件——压焊块电容栅耦合型保护管.该结构不仅解决了原有栅耦合型结构对特定ESD冲击不能及时响应的问题，而且节省了版图面积，提高了ESD失效电压.0.5 μm标准互补型金属氧化物半导体工艺流片测试结果表明，该结构人体模型ESD失效电压超过8 kV.给出了栅耦合型ESD保护结构中ESD检测结构的设计方法，能够精确计算检测结构中电容和电阻的取值. 关键词： 静电泄放 栅耦合 金属氧化物半导体场效应管 压焊块电容     

基于TLP建模的系统级静电放电效应仿真

系统级静电放电(ESD)效应仿真可以在电子系统进行测试之前进行有效的静电放电效应防护,缩短研发周期。根据传输线脉冲测试(TLP)结果,对瞬态电压抑制(TVS)二极管和芯片引脚进行spice行为建模,结合ESD脉冲源的等效电路模型,PCB板的S参数模型,采用场路协同技术完成了系统级静电放电效应的仿真。针对一个典型的电子系统,在IEC 61000-4-2 ESD应力作用下,完成了一款开关芯片防护电路的仿真,并对电路进行了加工、放电测试,仿真与测试芯片引脚的电压波形吻合良好,验证了该仿真方法的有效性。     

应变SiGe p 型金属氧化物半导体场效应管栅电容特性研究

由于台阶的出现, 应变SiGe p型金属氧化物半导体场效应管 (pMOSFET) 的栅电容特性与体Si器件的相比呈现出很大的不同, 且受沟道掺杂的影响严重. 本文在研究应变SiGe pMOSFET器件的工作机理及其栅电容C-V 特性中台阶形成机理的基础上, 通过求解器件不同工作状态下的电荷分布, 建立了应变SiGe pMOSFET栅电容模型, 探讨了沟道掺杂浓度对台阶的影响. 与实验数据的对比结果表明, 所建立模型能准确反映应变SiGe pMOSFET器件的栅电容特性, 验证了模型的正确性. 该理论为Si基应变金属氧化物半导体(MOS)器件的设计制造提供了重要的指导作用, 并已成功应用于Si基应变器件模型参数提取软件中, 为Si基应变MOS的仿真奠定了理论基础. 关键词： 应变SiGe pMOSFET 栅电容特性 台阶效应 沟道掺杂     

量子阱Si/SiGe/Sip型场效应管阈值电压和沟道空穴面密度模型

Si材料中较低的空穴迁移率限制了Si互补金属氧化物半导体器 件在高频领域的应用. 针对SiGe p型金属氧化物半导体场效应管(PMOSFET)结构, 通过求解纵向一维泊松方程,得到了器件的纵向电势分布, 并在此基础上建立了器件的阈值电压模型,讨论了Ge组分、缓冲层厚度、 Si帽层厚度和衬底掺杂对阈值电压的影响.由于SiGe沟道层较薄, 计算中考虑了该层价带势阱中的量子化效应. 当栅电压绝对值过大时, 由于能带弯曲和能级分裂造成SiGe沟道层中的空穴会越过势垒到达Si/SiO₂界面, 从而引起器件性能的退化. 建立了量子阱SiGe PMOSFET沟道层的空穴面密度模型, 提出了最大工作栅电压的概念, 对由栅电压引起的沟道饱和进行了计算和分析. 研究结果表明,器件的阈值电压和最大工作栅压与SiGe层Ge组分关系密切, Ge组分的适当提高可以使器件工作栅电压范围有效增大.     

隧道场效应晶体管静电放电冲击特性研究

随着器件尺寸的不断减小,集成度的逐步提高,功耗成为了制约集成电路产业界发展的主要问题之一.由于通过引入带带隧穿机理可以实现更小的亚阈值斜率,隧道场效应晶体管(TFET)器件已成为下一代集成电路的最具竞争力的备选器件之一.但是TFET器件更薄的栅氧化层、更短的沟道长度容易使器件局部产生高的电流密度、电场密度和热量,使得其更容易遭受静电放电(ESD)冲击损伤.此外,TFET器件基于带带隧穿机理的全新工作原理也使得其ESD保护设计面临更多挑战.本文采用传输线脉冲的ESD测试方法深入分析了基本TFET器件在ESD冲击下器件开启、维持、泄放和击穿等过程的电流特性和工作机理.在此基础之上,给出了一种改进型TFET抗ESD冲击器件,通过在源端增加N型高掺杂区,有效的调节接触势垒形状,降低隧穿结的宽度,从而获得更好的ESD设计窗口.     

15 nm Bulk nFinFET器件性能研究及参数优化

为研究Bulk FinFET工作时基本结构参数、器件温度和栅极材料对其性能的影响,建立了一个15 nm n型Bulk FinFET器件模型,仿真分析了不同栅长、鳍宽、鳍高、沟道掺杂浓度、器件工作温度、栅极材料对器件性能的影响,发现增长栅长、降低鳍宽和增加鳍高有助于抑制短沟道效应;1×10¹⁷ cm^-3以下的低沟道掺杂浓度对器件特性影响不大,但高掺杂会使器件失效;器件工作温度的升高会导致器件性能的下降;采用高K介质材料作为栅极器件性能优于传统材料SiO₂。     

漏致势垒降低效应对短沟道应变硅金属氧化物半导体场效应管阈值电压的影响

结合应变硅金属氧化物半导体场效应管(MOSFET)结构,通过求解二维泊松方程,得到了应变Si沟道的电势分布,并据此建立了短沟道应变硅NMOSFET的阈值电压模型.依据计算结果,详细分析了弛豫Si_1－βGe_β中锗组分β、沟道长度、漏电压、衬底掺杂浓度以及沟道掺杂浓度对阈值电压的影响,从而得到漏致势垒降低效应对小尺寸应变硅器件阈值电压的影响,对应变硅器件以及电路的设计具有重要的参考价值. 关键词： 应变硅金属氧化物半导体场效应管 漏致势垒降低 二维泊松方程 阈值电压模型     

功率MOSFET的负偏置温度不稳定性效应中的平衡现象

通过对功率金属氧化物半导体场效应晶体管在静态应力下的负偏置温度不稳定性的实验研究, 发现器件参数的退化随时间的关系遵循反应扩散模型所描述的幂函数关系, 并且在不同栅压应力下, 实验结果中均可观察到平台阶段的出现. 基于反应扩散理论的模型进行了仿真研究, 通过仿真结果分析和验证了此平台阶段对应于反应平衡阶段, 并且解释了栅压应力导致平台阶段持续时间不同的原因. 关键词： 功率金属氧化物半导体场效应晶体管 负偏置温度不稳定性 反应扩散模型     

单轴应变Si NMOSFET热载流子栅电流模型

热载流子效应产生的栅电流是影响器件功耗及可靠性的重要因素之一,本文基于热载流子形成的物理过程,建立了单轴应变硅NMOSFET热载流子栅电流模型,并对热载流子栅电流与应力强度、沟道掺杂浓度、栅源电压、漏源电压等的关系,以及TDDB(经时击穿)寿命与栅源电压的关系进行了分析研究.结果表明,与体硅器件相比,单轴应变硅MOS器件不仅具有较小的热载流子栅电流,而且可靠性也获得提高.同时模型仿真结果与单轴应变硅NMOSFET的实验结果符合较好,验证了该模型的可行性.     

基于梯度掺杂策略的碳纳米管场效应管性能优化

双极性传输特性是制约碳纳米管场效应管(carbon nanotube field effect transistors,CNFETs)性能提高的一个重要因素.为降低器件的双极性传输特性并获得较大的开关电流比,提出了一种漏端梯度掺杂策略,该策略不仅适合于类MOS碳纳米管场效应管(C-CNFETs),同时也适合于隧穿碳纳米管场效应管(T-CNFETs).基于非平衡格林函数的数值研究结果表明,该策略不仅能有效降低器件的双极传输特性,而且能将器件开关电流比提高数个数量级.进一步研究发现,该掺杂策略在这两类碳纳米管 关键词： 梯度掺杂 带间隧穿 双极性传输 碳纳米管场效应管     

Discrete dopant effects in ultrasmall fully depleted ballistic SOI MOSFETs

Using a recursive scattering matrix variant, we examine the effects of discrete dopants on the threshold voltage of ultrasmall fully depleted SOI MOSFETs. We find that more highly doped channels produce more interference than do more lightly doped channels. This causes larger fluctuations in threshold voltage. Further, we find that the location of the channel dopants is quite important in the direction of the threshold voltage shift with dopants occurring closer to the source of the device having a larger impact.     

选择性发射极晶体硅太阳电池的二维器件模拟及性能优化

利用PC2D二维模拟软件对选择性发射极晶体硅太阳电池(SE电池)进行了器件模拟和参数优化的研究.在对丝网印刷磷浆法制备的SE电池的实测典型电流-电压曲线实现完美拟合的基础上,全面系统地研究了栅线、基区、选择性发射区和背表面场层等的参数对电池性能的影响.模拟表明:基区少子寿命、前表面复合速度和背表面复合速度是对电池效率影响幅度最大的三个参数.在所研究的参数范围内,当基区少子寿命从50μs上升到600μs时,电池效率从18.53%上升到19.27%.低的前表面复合速度是使发射区方块电阻配比优化有意义的前提.要取得理想的电池效率,背表面复合速度需控制在500 cm/s以下.此外,对于不同的前表面复合速度,电池效率的最大值总是在50—90Ω/□的重掺区方阻、110—180Ω/□的轻掺区方阻的范围内取得.对不同的栅线数目,重掺区宽度与栅线间距之比为32%时,电池的效率最高.另外,在主栅结构保持较低面积比率的前提下,主栅数目的增加也可提高效率.最后,通过优化p型SE电池的效率可达到20.45%.     

A two-dimensional analytical modeling for channel potential and threshold voltage of short channel triple material symmetrical gate Stack(TMGS) DG-MOSFET

In the present work, a two-dimensional(2D) analytical framework of triple material symmetrical gate stack(TMGS)DG-MOSFET is presented in order to subdue the short channel effects. A lightly doped channel along with triple material gate having different work functions and symmetrical gate stack structure, showcases substantial betterment in quashing short channel effects to a good extent. The device functioning amends in terms of improved exemption to threshold voltage roll-off, thereby suppressing the short channel effects. The encroachments of respective device arguments on the threshold voltage of the proposed structure are examined in detail. The significant outcomes are compared with the numerical simulation data obtained by using 2D ATLAS~(TM) device simulator to affirm and formalize the proposed device structure.     

紧凑型高功率亚纳秒脉冲压缩装置的设计研制

分析了三传输线型脉冲压缩装置的原理,从提高功率增益和小型化角度,在脉冲压缩装置中设计了一种3起端并联绕线的内置型高阻螺旋线结构。建立电路仿真模型和三维结构电磁场仿真模型,分析了高阻螺旋线特征参数对功率增益的影响。根据优化后的结果研制出紧凑型高功率亚纳秒脉冲压缩装置,经测试,前级输入脉冲宽度8 ns,功率1 GW时,输出脉冲宽度1.5 ns,功率3.7 GW,功率增益3.7。经过30万次运行考核,装置内部无滑闪和击穿现象,验证了设计可靠性。     

Two-dimensional analytical subthreshold model of graded channel DG FD SOI n-MOSFET with gate misalignment effect

A two-dimensional (2-D) analytical subthreshold model is developed for a graded channel double gate (DG) fully depleted SOI n-MOSFET incorporating a gate misalignment effect. The conformal mapping transformation (CMT) approach has been used to provide an accurate prediction of the surface potential, electric field, threshold voltage and subthreshold behavior of the device, considering the gate misalignment effect to be on both source and drain side. The model is applied to both uniformly doped (UD) and graded channel (GC) DG MOSFETs. The results of an analytical model agree well with 3-D simulated data obtained by ATLAS-3D device simulation software.     

Design and simulation of double-lightly doped MOSCNT using non-equilibrium Green’s function

In this paper, we propose a new ohmic-structure of ballistic carbon nanotube field-effect transistors (CNTFETs) in which the source and drain regions are doped stepwise and the device acts as MOSFET like CNTFET (MOSCNT). The number of lightly doped regions and their doping concentrations are optimized to obtain the lowest OFF current. To study the device characteristics, the Poisson–Schrödinger equations are solved self-consistently using the Nonequilibrium Green’s Function (NEGF) formalism in the mode space approach. To find the Hamiltonian matrix, the tight-binding approximation with only p _z orbital is used. The obtained results show that the stepwise regions lead to barrier widening due to the reduction in potential gradient. Therefore, the band-to-band tunneling (BTBT) and the ambipolar behavior of the device decrease due to band engineering. This causes to the superior reduction of OFF current and dissipative power. In addition, the device performance shows lower subthreshold swing (SS), smaller drain induced barrier lowering (DIBL), and larger current ratio than that of the previous structures.     

Design and fabrication of a compact multimode interference splitter with silicon photonic nanowires

A compact multimode interference （MMI） splitter with silicon photonic nanowires on silicon-on-insulator （SOI） substrate is designed and fabricated. The footprint of the MMI section is only approximately 3×10 （μm）. The simulation results show that the device may have a low excess loss of 0.04 dB. The transmission loss of the silicon photonics wire is measured to be 0.73±0.3 dB/mm. The compact size and low transmission loss allow the device to be used in ultra-compact photonic integrated circuits. The device exhibits a good light splitting function. In a spectral range of 1549-1560 nm, the excess loss is 1.5 dB and the average imbalance between the two channels is 0.51 dB.     

Research on the origin of negative effect in uniform doping GaN-based Gunn diode under THz frequency

The transport properties of GaN-based uniform doping Gunn diode are calculated by an ensemble Monte Carlo method. The drift velocity, electron density, and electric field distribution as a function of time in the device are illustrated under direct current (DC) and alternating current (AC) bias condition. With the help of port current, the relationship between electron transport status and port current can be acquired, which will be useful to understand the origin of negative differential resistance and guide the device design. Different from the traditional opinion, the maximum current do not appear at the same time when electron accumulation domain arrives at device anode. The reason is that when electron accumulation domain comes into heavily doped anode, the velocity will be decelerated a lot for highly ionized impurity scattering, and the electrons in the domain will be used to neutralize positive ion region which provides the electrons during formation of the domain. Some researchers believe that the electrons in the domain come from heavily doped cathode region, but our simulation shows clearly that the electrons come from heavily doped anode side. Finally, the AC simulation shows the possibility of negative differential résistance in GaN diode under THz frequency. What is more, AC simulation result has the same tendency with DC simulation.     

纳米MOSFET毫米波噪声的简洁模型

为了使复杂的纳米MOSFET毫米波噪声物理模型可用于工程设计,研究了其简洁模型的表达形式。通过器件的双端口相关噪声矩阵变换和分析,实现了复杂的噪声物理模型的简化。所提出的简洁模型不仅高精度地表征了器件的非准静态效应,并且可通过Verilog-A语言以四结点的形式,直接嵌入到ADS仿真设计工具,从而在保证精度的同时,大大降低了设计的复杂度。实验结果验证了所建模型在强反型区和弱反型区均比现有的三结点模型具有更高的准确性。