Room-temperature flexible thin film transistor with high mobility

We report a room-temperature and high-mobility InGaZnO thin-film transistor on flexible substrate. To gain both high gate capacitance and low leakage current, we adopt stacked dielectric of Y₂O₃/TiO₂/Y₂O₃. This flexible IGZO TFT shows a low threshold voltage of 0.45 V, a small sub-threshold swing of 0.16 V/decade and very high field-effect mobility of 40 cm²/V. Such good performance is mainly contributed by improved gate stack structure and thickness modulation of IGZO channel that reduce the interface trap density without apparent mobility degradation.     

Flexible InGaZnO thin film transistors using stacked Y2O3/TiO2/Y2O3 gate dielectrics grown at room temperature

In this Letter, we report a low operation voltage and high mobility flexible InGaZnO thin‐film transistor (TFT) using room‐temperature processed Y₂O₃/TiO₂/Y₂O₃ gate dielectric. The flexible IGZO TFT showed a low threshold voltage of 0.75 V, a small sub‐threshold swing of 137 mV/decade, a good field effect mobility of 32.7 cm²/V s, and a large I_on/I_off ratio of 1.7 × 10⁶. The low operation voltage, small sub‐threshold swing and high mobility could be ascribed to the combination of high‐κ TiO₂ and large band gap Y₂O₃, which provide the potential to meet the requirements of low‐temperature and low‐power portable electronics.

     

Improved performance of InGaZnO thin-film transistors with Ta2O5/Al2O3 stack deposited using pulsed laser deposition

Ta₂O₅/Al₂O₃ stacked thin film was fabricated as the gate dielectric for low-voltage-driven amorphous indium–gallium–zinc-oxide (IGZO) thin film transistors (TFTs). The Ta₂O₅/Al₂O₃ stacked thin film exhibits a combination of the advantages of Al₂O₃ and Ta₂O₅. The IGZO TFT with Ta₂O₅/Al₂O₃ stack exhibits good performance with large saturation mobility of 26.66 cm² V⁻¹ s⁻¹, high on/off current ratio of 8 × 10⁷, and an ultra-small subthreshold swing (SS) of 78 mV/decade. Such small SS value is even comparable with that of submicrometer single-crystalline Si MOSFET.     

Room temperature fabrication Oxide TFT with Y2O3 as a gate oxide and Mo contact

In this investigation, an operating voltage as low as 5 V has been achieved for Oxide TFT with Y₂O₃ as a gate oxide and a-IGZO as an active layer. The OTFT has been fabricated at room temperature using RF sputter. The mobility and threshold voltages are 11.3 cm²/V s and 3.4 V for the device with W/L = 0.8, respectively. The annealing at 400 °C in N₂ containing 5% H₂ ambient has been utilized to improve the electrical performance of TFT. The on-off current which is determined by gate dielectric has been observed to be 10⁴. It has also been observed that the dielectric properties of gate oxide deteriorate on annealing. The dielectric constant of Y₂O₃ is observed in the range between 5.1 and 5.4 measured on various devices.     

High‐mobility flexible thin‐film transistors with a low‐temperature zirconium‐doped indium oxide channel layer

Thin film transistors (TFTs) with zirconium‐doped indium oxide (ZrInO) channel layer were successfully fabricated on a flexible PEN substrate with process temperature of only 150 °C. The flexible ZrInO TFT exhibited excellent electrical performance with a saturation mobility of as high as 22.6 cm² V^–1 s^–1, a sub‐threshold swing of 0.39 V/decade and an on/off current ratio of 2.5 × 10⁷. The threshold voltage shifts were 1.89 V and ?1.56 V for the unpassivated flexible ZrInO TFT under positive and negative gate bias stress, respectively. In addition, the flexible ZrInO TFT was able to maintain the relatively stable performance at bending curvatures larger than 20 mm, but the off current increased apparently after bent at 10 mm. Detailed studies showed that Zr had an effect of suppress the free carrier generation without seriously distorting the In₂O₃ lattice. (© 2016 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

SiOx interlayer to enhance the performance of InGaZnO-TFT with AlOx gate insulator

We have fabricated indium–gallium–zinc (IGZO) thin film transistor (TFT) using SiO_x interlayer modified aluminum oxide (AlO_x) film as the gate insulator and investigated their electrical characteristics and bias voltage stress. Compared with IGZO-TFT with AlO_x insulator, IGZO-TFT with AlO_x/SiO_x insulator shows superior performance and better bias stability. The saturation mobility increases from 5.6 cm²/V s to 7.8 cm²/V s, the threshold voltage downshifts from 9.5 V to 3.3 V, and the contact resistance reduces from 132 Ωcm to 91 Ωcm. The performance improvement is attributed to the following reasons: (1) the introduction of SiO_x interlayer improves the insulator surface properties and leads to the high quality IGZO film and low trap density of IGZO/insulator interface. (2) The better interface between the channel and S/D electrodes is favorable to reduce the contact resistance of IGZO-TFT.     

Extraction of density-of-states in amorphous InGaZnO thin-film transistors from temperature stress studies

The instability of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) with different active layer thicknesses under temperature stress has been investigated through using the density-of-states (DOS). Interestingly, the a-IGZO TFT with 22 nm active layer thickness showed a better stability than the others, which was observed from the decrease of interfacial and semiconductor bulk trap densities. The DOS was calculated based on the experimentally-obtained activation energy (E_A), which can explain the experimental observations. We developed the high-performance Al₂O₃ TFT with 22 nm IGZO channel layer (a high mobility of 7.4 cm²/V, a small threshold voltage of 2.8 V, a high I_on/I_off 1.8 × 10⁷, and a small SS of 0.16 V/dec), which can be used as driving devices in the next-generation flat panel displays.     

A p-channel SMC poly-Si thin film-transistor with a GOLDD structure

We have developed a silicide-mediated crystallization (SMC) polycrystalline silicon (poly-Si) thin film transistor (TFT) with a gate overlapped lightly doped drain (GOLDD) structure. Applying a GOLDD structure to the SMC poly-Si TFT, the off-state leakage current of coplanar TFT is reduced, while the reduction of the on-state current is relatively small. The p-channel poly-Si TFT with a GOLDD structure exhibited a field effect mobility of 50 cm²/V s and an off-state leakage current of 3.8×10⁻¹¹ A/μm at the drain voltage of −5 V and the gate voltage of 10 V.     

射频磁控溅射低温制备非晶铟镓锌氧薄膜晶体管

利用射频磁控溅射技术室温制备了铟镓锌氧(IGZO)薄膜,采用X射线衍射(XRD)表征薄膜的晶体结构,原子力显微镜(AFM)观察其表面形貌,分光光度计测量其透光率。结果表明:室温制备的IGZO薄膜为非晶态且薄膜表面均匀平整,可见光透射率大于80%。将室温制备的IGZO薄膜作为有源层,在低温(<200℃)条件下成功地制备了铟镓锌氧薄膜晶体管(a-IGZO TFT),获得的a-IGZO-TFT器件的场效应迁移率大于6.0 cm2.V-1.s-1,开关比约为107,阈值电压为1.2 V,亚阈值摆幅(S)约为0.9 V/dec,偏压应力测试a-IGZO TFT阈值电压随时间向右漂移。     

InGaZnO薄膜晶体管背板的栅极驱动电路静电释放失效研究

本文通过解析阵列基板栅极驱动(gate driver on array, GOA)电路中发生静电释放(electro-static discharge,ESD)的InGaZnO薄膜晶体管(InGaZnO thin-film transistor, IGZO TFT)器件发现:栅极Cu金属扩散进入了SiN_x/SiO_2栅极绝缘层;源漏极金属层成膜前就发生了ESD破坏;距离ESD破坏区域越近的IGZO TFT,电流开关比越小,直到源漏极与栅极完全短路.本文综合IGZO TFT器件工艺、GOA区与显示区金属密度比、栅极金属层与绝缘层厚度非均匀性分布等因素,采用ESD器件级分析与系统级分析相结合的方法,提出栅极Cu:SiN_x/SiO_2界面缺陷以及这三层薄膜的厚度非均匀分布是导致GOA电路中沟道宽长比大的IGZO TFT发生ESD失效的关键因素,并针对性地提出了改善方案.     

一步掩膜法制备超低压ITO沟道纸上薄膜晶体管

基于一步掩模法工艺制备了一种新型的纸上双电荷层超低压薄膜晶体管. 在室温射频磁控溅射过程中, 仅仅利用一块镍掩模板, 就可同时沉积出氧化铟锡(ITO)源漏电极和ITO沟道. 在此基础上, 以等离子体增强化学气相沉积法(PECVD)合成的具有双电荷层效应的微孔SiO₂为栅介质, 成功制备出以纸为衬底的超低压氧化物薄膜晶体管. 这种晶体管显示出极好的性能: 超低的工作电压1.5 V, 场效应迁移率为20.1 cm²/Vs, 亚阈值斜率为188 mV/decade, 开关电流比为5× 10⁵. 这种基于全室温一步掩模法工艺制备的纸上氧化物薄膜晶体管具有工作电压低, 工艺简单, 成本低廉等优点, 非常有望应用于未来便携式低功耗电子产品的制造中.     

Effect of antimony doping on the low‐temperature performance of solution‐processed indium oxide thin film transistors

The effects of antimony (Sb) doping on solution‐processed indium oxide (InO_x) thin film transistors (TFTs) were examined. The Sb‐doped InSbO TFT exhibited a high mobility, low gate swing, threshold voltage, and high I_ON/OFF ratio of 4.6 cm²/V s, 0.29 V/decade, 1.9 V, and 3 × 10⁷, respectively. The gate bias and photobias stability of the InSbO TFTs were also improved by Sb doping compared to those of InO_x TFTs. This improvement was attributed to the reduction of oxygen‐related defects and/or the existence of the lone‐pair s‐electron of Sb³⁺ in amorphous InSbO films. (© 2014 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Low-voltage-drive ZnO thin-film transistors (TFTs) with room-temperature radio frequency magnetron sputtering SiO₂ as the gate insulator were fabricated successfully on the glass substrate. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 4.2 V, a field effect mobility of 11.2 cm²/V s, an on/off ratio of 3.1 × 10⁶ and a subthreshold swing of 0.61 V/dec. The drain current can reach to 1 mA while the gate voltage is only of 12 V and drain voltage of 8 V. The C–V characteristics of a MOS capacitor with the structure of ITO/SiO₂/ZnO/Al was investigated. The carrier concentration N_D in the ZnO active layer was determined, the calculated N_D is 1.81 × 10¹⁶ cm⁻³, which is the typical value of undoped ZnO film used as the channel layer for ZnO-TFT devices. The experiment results show that SiO₂ film is a promising insulator for the low voltage and high drive capability oxide TFTs.     

同步对称双栅InGaZnO薄膜晶体管电势模型研究

研究了同步对称双栅氧化铟镓锌薄膜晶体管(InGaZnO thin film transistors,IGZO TFTs)的沟道电势,利用表面电势边界方程联合Lambert函数推导得到了器件沟道电势的解析模型.该模型考虑了IGZO薄膜中存在深能态及带尾态等缺陷态密度,能够同时精确地描述器件在亚阈区(sub-threshold)与开启区(above threshold)的电势分布.基于所提出的双栅IGZO TFT模型,讨论了不同厚度的栅介质层和有源层时,栅-源电压对双栅IGZO TFT的表面势以及中心势的调制效应.对比分析了该模型的计算值与数值模拟值,结果表明二者具有较高的符合程度.     

The effect of post-metal annealing on the electrical performance and stability of two-step-annealed solution-processed In2O3 thin film transistors

In this work, solution-processed indium oxide (In₂O₃) thin film transistors (TFTs) were fabricated by a two-step annealing method. The influence of post-metal annealing (PMA) temperatures on the electrical performance and stability is studied. With the increase of PMA temperatures, the on-state current and off-state current (I_on/I_off) ratio is improved and the sub-threshold swing (SS) decreased. Moreover, the stability of In₂O₃ TFTs is also improved. In all, In₂O₃ TFT with post-metal annealing temperature of 350°С exhibits the best performance (a threshold voltage of 4.75 V, a mobility of 13.8 cm²/V, an I_on/I_off ratio of 1.8 × 10⁶, and a SS of 0.76 V/decade). Meanwhile, the stability under temperature stress (TBS) and positive bias stress (PBS) also show a good improvement. It shows that the PMA treatment can effectively suppress the interface trap and bulk trap and result in an obviously improvement of the In₂O₃ TFTs performance.     

Amorphous IZO TTFTs with saturation mobilities exceeding 100 cm2/Vs

In this paper we demonstrate the use of amorphous binary In₂O₃–ZnO oxides simultaneously as active channel layer and as source/drain regions in transparent thin film transistor (TTFT), processed at room temperature by rf sputtering. The TTFTs operate in the enhancement mode and their performances are thickness dependent. The best TTFTs exhibit saturation mobilities higher than 10² cm²/Vs, threshold voltages lower than 6 V, gate voltage swing of 0.8 V/dec and an on/off current ratio of 10⁷. This mobility is at least two orders of magnitude higher than that of conventional amorphous silicon TFTs and comparable to or even better than other polycrystalline semiconductors. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

基于超薄Al2O3栅绝缘层的低工作电压IGZO薄膜晶体管及其在共源极放大器中的应用

随着薄膜晶体管(Thin-film transistor,TFT)在各类新兴电子产品中得到广泛应用,作为各类电子设备的关键组件,其工作电压和稳定性面临着巨大挑战。为了满足未来高度集成化、功能复杂的应用场合,实现其低工作电压和高稳定性就变得异常重要。我们在150 mm×150 mm大面积玻璃基底上,采用磁控溅射非晶铟镓锌氧化物(amorphous indium-gallium-zinc-oxide,a-IGZO)作为有源层,以原子层沉积(ALD)Al2O3为栅绝缘层,制备了底栅顶接触型a-IGZO TFT,并研究了50,40,30,20 nm超薄Al2O3栅绝缘层对TFT器件的影响。其中,20 nm超薄Al2O3栅绝缘层TFT具有最优综合性能:1 V的低工作电压、接近0 V的阈值电压和仅为65.21 mV/dec的亚阈值摆幅,还具有15.52 cm^2/(V·s)的高载流子迁移率以及5.85×10^7的高开关比。同时,器件还表现出优异的稳定性:栅极±5 V偏压1 h阈值电压波动最小仅为0.09 V以及优良的150 mm×150 mm大面积分布均一性。实现了TFT器件的低工作电压和高稳定性。最后,以该TFT器件为基础设计了共源极放大器,得到14 dB的放大增益。     

Performance of La2O3/InAlN/GaN metal—oxide—semiconductor high electron mobility transistors

We report on the performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors(MOSHEMTs) and InAlN/GaN high electron mobility transistors(HEMTs).The MOSHEMT presents a maximum drain current of 961 mA/mm at Vgs = 4 V and a maximum transconductance of 130 mS/mm compared with 710 mA/mm at Vgs = 1 V and 131 mS/mm for the HEMT device,while the gate leakage current in the reverse direction could be reduced by four orders of magnitude.Compared with the HEMT device of a similar geometry,MOSHEMT presents a large gate voltage swing and negligible current collapse.     

Effects of Y incorporation in TaON gate dielectric on electrical performance of GaAs metal–oxide–semiconductor capacitor

In this study, GaAs metal–oxide–semiconductor (MOS) capacitors using Y‐incorporated TaON as gate dielectric have been investigated. Experimental results show that the sample with a Y/(Y + Ta) atomic ratio of 27.6% exhibits the best device characteristics: high k value (22.9), low interfacestate density (9.0 × 10¹¹ cm^–2 eV^–1), small flatband voltage (1.05 V), small frequency dispersion and low gate leakage current (1.3 × 10^–5A/cm² at V_fb + 1 V). These merits should be attributed to the complementary properties of Y₂O₃ and Ta₂O₅:Y can effectively passivate the large amount of oxygen vacancies in Ta₂O₅, while the positively‐charged oxygen vacancies in Ta₂O₅ are capable of neutralizing the effects of the negative oxide charges in Y₂O₃. This work demonstrates that an appropriate doping of Y content in TaON gate dielectric can effectively improve the electrical performance for GaAs MOS devices.

Capacitance–voltage characteristic of the GaAs MOS capacitor with TaYON gate dielectric (Y content = 27.6%) proposed in this work with the cross sectional structure and dielectric surface morphology as insets.     

微晶硅薄膜晶体管稳定性研究

对有源区处于结构过渡区的微晶硅底栅薄膜晶体管，测试其偏压衰退特性时，观察到一种“自恢复”的衰退现象.当栅和源漏同时施加10 V的偏压时，测试其源-漏电流随时间的变化，发现源-漏电流先衰减、而后又开始恢复上升的反常现象.而当采用栅压为10 V、源-漏之间施加零偏压的模式时，源-漏电流随时间呈先是几乎指数式下降、随之是衰退速度减缓的正常衰退趋势.就此现象进行了初步探讨. 关键词： 过渡区硅材料 微晶硅薄膜晶体管 稳定性 自恢复衰退