射频集成电路周期稳态快速模拟算法的研究

使用拟牛顿（Newton）算法，不同计算Jacobi矩阵，保留了Newto法的超线性收敛特性，是求解大规模非线性方程组的有效方法。文章提出了应用拟Newton法快速求解电路周期稳态响应的拟Newton打靶法和拟Newton谐波平衡法。实验结果表明，拟Newton打靶法和拟Newton谐波平衡法具有较高的计算效率。     

电路在正弦激励下非正弦稳态的响应

基于作者的教学实践,讨论了电路在正弦激励下产生非正弦稳态的响应的各种情况。零状态动态电路存在正弦稳态响应的充要条件为,响应的象函数Y(s)存在且仅存在一对共轭虚极点,而Y(s)的其它极点均位于复平面的开左半平面上。通过实例说明了在正弦激励下产生非正弦稳态的响应的情形。电路本文的讨论对丰富正弦稳态电路分析的教学内容,加深学生对相关知识的理解,具有良好的助益。     

NRD波导正交场平衡混频器准周期稳态响应分析

详细研究了毫米波无辐射介质波导正交场单平衡混频器在双频信号激励下的准周期稳态响应。根据NRD波导的模式完备性与正交性原理，结合导线天线分析方法和矩量法，计算了这种?昆频器中的一个重要结构——交叉杆金属结构对本振LSE模和入射信号LSM模的扰动作用，得到了相应的本振感应电动势和入射信号感应电动势。在此基础上，使用基于多维傅立叶变换的交调波平衡法，分析了该混频器的准周期稳态响应。     

基于MOSFET PDE模型的射频自治电路周期稳态算法研究

本文研究了基于MOSFET PDE模型的射频自治电路周期稳态求解算法.采用该算法仿真典型的Colpitts振荡器电路,得到电压波形和工业界公认标准器件仿真器MEDICI瞬态模拟得到电压波形具有很好的一致性.     

射频CMOS混频器的设计

混频器是射频系统中的一个关键部分,其性能的好坏直接影响到整个系统的性能.文章对CMOS混频器的设计及其特性进行了深入的分析和研究,并对各种不同特点的混频器进行了比较和总结.     

一种双频双模射频电路的设计

给出了一种基于802．11b／g下的双模电路设计，该电路能很好地应用于2．4GHz和5.8GHz两个工作频段，并能实现全向和定向两种工作模式的转换。仿真结果表明，该电路有良好的回波损耗和传输特性，可以较好地满足无线局域网中的应用。     

激光陀螺射频激励的激励特性研究

本文给出了射频激励激光陀螺的功率输出和Ｈｅ－Ｎｅ气压,气比关系的实验结果,同时给出了一个实用的射频激励源电路,并帝测了它的输出特性。     

射频集成电路的模拟技术

电路模拟是目前RF IC(射频集成电路)设计中主要的CAD工具，文章介绍了RF IC模拟的现状。首先简要叙述了电路稳态响应分析的试射法和谐波平衡法，这是RF IC模拟的基础技术。然后重点介绍了近年来出现的RF IC模拟中的一些新方法，包括基于Krylov子空间迭代的快速算法，包络法，多变量偏微分方程法等，指出了它们的各自的特点和适用的条件，最后讨论了今后的工作方向。     

解非线性电路稳态响应的一种有效算法

本文提供一种计算非线性电路的稳态响应的有效算法,在多频信号激励的强迫振荡电路和耦合振荡电路都可使用。该方法可称为“代换算法”。因为,它每一步的变量都是用残留误差的各个频率分量解关联时不变电路,该电路是用“松弛法”将时变电路转换而来。此算法非常简单而有效,并且可应用于各种非线性电路。     

基于MOSFET PDE模型的射频电路周期稳态分析

研究了基于 MOSFET PDE模型的射频电路周期稳态分析有效算法 :通过恰当的系统解耦、松弛迭代和边值问题求解等方法避免了复杂的 PDE周期稳态分析 ,较好地解决了基于 MOSFET PDE模型的射频电路周期稳态分析的计算效率问题。采用该算法仿真典型的 C类功率放大器得到电流波形和工业界公认标准器件仿真器 MEDICI瞬态模拟得到电流波形比较 ,显示出很好的一致性。     

正弦稳态电路功率问题

正弦稳态电路功率的分析比较复杂,本文介绍了求解这些电路时遇到的问题,强调了表示电压相量的电流相量数学关系式的应用。     

基于小波平衡的非线性电路稳态模拟

本文提出一种基于小波理论的非线性电路稳态模拟算法――小波平衡法.该方法在时域中求解电路稳态响应,克服了频域模拟算法由于谐波次数较高导致计算量很大的缺点,具有复杂度低,精度高,存在一个自适应算法自动选择模拟阶数等优点.模拟结果证明,本文的小波平衡法是一种十分有效的方法.     

高维滞环多值电路唯一稳态的研究

本文利用矩阵分解方法，在用常数界定元件成份关系斜率条件下，得到了确定高维具有滞环的非线性非自治电路唯一稳态的新条件。本文的结果表明，该类电路的唯一稳态，可以用分解矩阵的稳定性来决定，本文的结果中，电路元件可以是多值元件，这大大放松了目前已的经典结果中要求电路元件为单值的限制，扩展了已有的结果，同时，本文的结果，对于确定高维非线性非自治电路的唯一稳态，比已有结果，更加有力和简洁。     

CMOS射频集成电路的现状与进展

随着低功耗、可移动个人无线通信的发展和CMOS工艺性能的提高,用CMOS工艺实现无线通信系统的射频前端不仅必要而且可能.本文讨论了用CMOS工艺实现射频集成电路的特殊问题.首先介绍各种收发器的体系结构,对它们的优缺点进行比较,指出在设计中要考虑的一些问题.其次讨论CMOS射频前端的重要功能单元,包括低噪声放大器、混频器、频率综合器和功率放大器.对各单元模块在设计中的技术指标,可能采用的电路结构以及应该注意的问题进行了讨论.此外,论文还讨论了射频频段电感、电容等无源器件集成的可能性以及方法.最后对CMOS射频集成电路的发展方向提出了一些看法.     

一阶RC电路时域分析和频域分析的对比

本文以一阶RC积分电路和微分电路为例,分别给出了这两个电路的时域和频域分析结果.对这些分析结果进行对比,并从信号处理的角度做出定性解释,表明对同一电路从时域和频域两个不同角度得到的结论在本质上是一致的.对动态电路的这种对比分析,有利于加深学生对动态电路本质的理解,并且对不同章节的内容建立统一的认识.     

Using Spectral Subtraction for Suppression of Noise in Speech Signals with Analog Integrated Circuits

A new modification of the spectral subtraction algorithm is presented which enables operating entirely in the time domain and is thus suitable for realization in analog integrated circuits. The noise spectrum is obtained during speechless intervals and stored for spectral subtraction when speech is present in the signal. The frequency range of interest of the speech signal is divided into narrow frequency bands by means of a bank of band-pass filters. For each frequency band the noise model is realized as an auxiliary signal multiplied by a particular weight. A subsystem is presented that produces an output signal whose power is equal to the difference between the input signal power and the noise model power for each frequency channel, thereby realizing the spectral subtraction. Circuits to achieve the described operation are outlined. Finally, simulation results of the noise removal algorithm are shown in the form of a spectrogram and the results showing improvement in automatic speech recognition are given.     

农村多重覆盖广播电视MMDS信号的接收方法

以西部建设农村广播电视公共服务体系为例，介绍在多重广播电视MMDS信号覆盖区域免费接收更多电视节目的方法，并指出相关器件的应用特点。     

An analysis of high-frequency noise in RF active CMOS mixers

An analysis of high-frequency noise in RF active CMOS mixers including single-balanced and double-balanced architectures is presented. The analysis investigates the contribution of non-white gate-induced noise to the output noise power as well as the spot noise figure (NF) of the RF CMOS mixer. It accounts for the non-zero correlation between the gate-induced noise and the channel’s thermal noise. The noise contribution of the RF transconductor and the switching pair to the output noise power is studied. Experimental results verify the accuracy of the analytical model. Payam Heydari (S’98–M’00) received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, in 1992, 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California, in 2001. During the summer of 1997, he was with Bell-Labs, Lucent Technologies, where he worked on noise analysis in deep submicrometer very large-scale integrated (VLSI) circuits. During the summer of 1998, he was with IBM T. J. Watson Research Center, Yorktown Heights, NY, where he worked on gradient-based optimization and sensitivity analysis of custom-integrated circuits. Since August 2001, he has been an Assistant Professor of Electrical Engineering at the University of California, Irvine, where his research interest is the design of high-speed analog, RF, and mixed-signal integrated circuits. Dr. Heydari has received the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Mention Award from the Department of EE-Systems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the EECS Department of the University of California, Irvine. His name was included in the 2006 Who’s Who in America. Dr. Heydari Professor Heydari has been the Associate Editor of IEEE TRANS. ON CIRCUITS AND SYSTEMS, I, since 2006. He currently serves on the Technical Program Committees of International Symposium on Low-Power Electronics and Design (ISLPED), International Symposium on Quality Electronic Design (ISQED), and the Local Arrangement Chair of the ISLPED conference. He was the Student Design Contest Judge for the DAC/ISSCC Design Contest Award in 2003, the Technical Program Committee member of the IEEE Design and Test in Europe (DATE) from 2003 to 2004, and International Symposium on Physical Design (ISPD) in 2003.