CMOS monolithic optoelectronic integrated circuit for on-chip optical interconnection

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) is designed and fabricated using standard 0.35-μm CMOS technology. This OEIC monolithically integrates light emitting diode (LED), silicon dioxide waveguide, photodetector and receiver circuit on a single silicon chip. The silicon LED operates in reverse breakdown mode and can emit light at 8.5 V. The output optical power is 31.2 nW under 9.8 V reverse bias. The measured spectrum of LED showed two peaks at 760 nm and 810 nm, respectively. The waveguide is composed of silicon dioxide/metal multiple layers. The responsivity of the n-well/p-substrate diode photodetector is 0.42 A/W and the dark current is 7.8 pA. The LED-emitted light transmits through the waveguide and can be detected by the photodetector. Experimental results show that on-chip optical interconnects are achieved by standard CMOS technology successfully.     

Realization of optoelectronic integrated transmitter and receiver for POF Applications

The optoelectronic integrated transmitter and receiver for 650 nm plastic optical fiber (POF) communication applications realized in 0.5 μm BCD (Biplor, CMOS and DMOS) process is first described in this paper. The 650 nm resonant cavity light emitting diode (RCLED) is used as light source. It is first proposed for optoelectronic integration of the transmitter by bonding RCLED to the driver chip. Temperature compensation technology is employed in the driver circuit to compensate for the modulation current. In the monolithic optoelectronic integrated receiver, large area multi-finger PIN photodetector (PD) that is compatible with standard IC process, transimpedance amplifier and post amplifier are presented. Measurement results show that the responsivity and capacitance of PD is 0.25 A/W and 5 pF, respectively. The sensitivity of receiver is −14.6 dBm at 180 Mb/s and BER is less than 10⁻⁹ for 650 nm input light by POF. A clear eye diagram is demonstrated for 180 Mb/s PRBS. These indicate that optoelectronic integrated chips can be employed in high-speed POF-based Fast Ethernet systems for broadband access network applications.     

Simple Analog Complementary Metal Oxide Semiconductor Circuit for Generating Motion Signal

We proposed in this study a novel analog complementary metal oxide semiconductor (CMOS) circuit for generating a motion signal when an object moves, which is a simple structure. The proposed unit circuit was constructed using a previously proposed edge detection circuit and a novel proposed circuit for generating a motion signal which accepts an edge signal. The part for generating the motion signal was constructed using six metal oxide semiconductor (MOS) transistors and one capacitor. Results obtained by the simulation program with integrated circuit emphasis (SPICE) and the measured results of a test circuit constructed with discrete MOS transistors and the test circuit fabricated with a 1.2 μm CMOS process showed that the proposed unit circuit can output pulsed current (motion signal) when an object moves on the circuit. It was clarified from the SPICE results that the two-dimensional network constructed with proposed unit circuits can output motion signals. The size of the novel unit circuit is expected to be about 110 × 110μm² obtained by the 1.2 μm CMOS process. It is possible to arrange 90 × 90 unit circuits on a chip which has an area of 1 × 1cm². The aperture ratio is expected to be about 21%, which is twice as large as that of the previously proposed circuit. An integrated circuit for image processing in real time can thus be realized by applying the two-dimensional network constructed with the proposed circuits.     

一种高效稳定的光伏LED照明系统设计

为提高光伏照明系统中太阳能电池的光能利用率,对太阳能电池输出进行最大功率跟踪。设计以最大功率跟踪芯片SM72442为核心的太阳能充电控制电路,采用光伏全桥驱动芯片SM72295驱动MOS管,构成同步Buck电路,实现太阳能输出最大功率跟踪;利用LED驱动芯片XL6005设计LED驱动电路。测试数据表明,太阳能光伏电池的充电效率平均达到87.92%,LED驱动电路效率最高为91.6%。系统工作稳定,能满足特定场合下的照明需求。     

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.     

Influence of temperature on different optoelectronic characteristics of InGaN light emitting diodes

We have measured the electroluminescence (EL) and carrier lifetime characteristics in InGaN/Sapphire purple light emitting diode (LED), namely, UV3TZ-405-30 in a temperature range from 350 to 120 K and have compared them with those of a similar LED (UV3TZ-395-15) but with different Indium concentration, measured earlier. While it is found that for the present device the EL intensity decreases drastically with lowering of temperature after reaching a maximum (99%) at 228 K, this is markedly different from the previous device where intensity continues to increase monotonically till lowest temperature. This qualitatively distinct temperature dependence indicates difference in nature of localisation of carriers in the multiple quantum wells for varying Indium content in the two devices. The light–current–temperature data have been analysed in terms of the semiconductor rate equations to determine different optoelectronic properties. Next, estimating the ideality factor from the current–voltage (I–V) measurements, the effective carrier lifetime has been evaluated from the open circuit voltage decay process. Using the above measurements, the temperature dependence of the internal quantum efficiency of the device has been calculated and it is found to attain a maximum value of 99.88% at 228 K. Unlike all previous calculations, a unique feature of the present approach has been to include the effect of temperature dependence of the radiative recombination coefficient (B) in the rate equation analysis. Finally, a comparative study of the temperature dependence of the different optoelectronic properties of both devices is presented with and without this effect.     

A wide-angle camera module for disposable endoscopy

A wide-angle miniaturized camera module for disposable endoscope is demonstrated in this paper. A lens module with 150° angle of view (AOV) is designed and manufactured. All plastic injection-molded lenses and a commercial CMOS image sensor are employed to reduce the manufacturing cost. The image sensor and LED illumination unit are assembled with a lens module. The camera module does not include a camera processor to further reduce its size and cost. The size of the camera module is 5.5 × 5.5 × 22.3 mm³. The diagonal field of view (FOV) of the camera module is measured to be 110°. A prototype of a disposable endoscope is implemented to perform a pre-clinical animal testing. The esophagus of an adult beagle dog is observed. These results demonstrate the feasibility of a cost-effective and high-performance camera module for disposable endoscopy.     

新型低功耗金属氧化物TFT集成行驱动电路

金属氧化物薄膜晶体管(TFT)属于耗尽型器件,其集成的TFT的行驱动电路一般采用双负电源方案,存在与外围驱动芯片的匹配困难和功耗较大的不足。本文设计了一种新型耦合电路结构,可以产生比负电源更低的电压从而完全关闭输出模块的下拉晶体管,防止氧化物TFT耗尽模式引起的电流泄露问题,并由此设计了新型氧化物TFT行驱动电路拓扑。由于只采用一个负电源,其电源电压范围比采用双负电源方案的小,从而节省了功耗且有利于与外围驱动芯片的匹配连接。实验结果表明,基于刻蚀阻挡层(ESL)结构的氧化物TFT工艺,在玻璃衬底上成功制备了该行驱动电路,在电阻负载R L=3 kΩ和容性负载C L=30 pF下,所设计的行驱动电路在33.3 kHz时钟频率下实现脉宽10μs的全摆幅输出,每级功耗仅为160μW。基于新型耦合电路结构的行驱动电路能够满足60 Hz的刷新频率的1980×1080分辨率的显示需求。     

Rare isotope beams at ISAC—target & ion source systems

The present status of the ISAC facility for rare isotopes beams after its first 10 years of operation is presented. Planning for the ISAC facility started in 1985 with the Parksville workshop on radioactive ion beams (Buchmann and D’Auria 1985). It was put on halt by the KAON proposal and planning was only resumed in 1993 after the cancellation of KAON. The ISAC facility was built to satisfy the scientific need for accelerated beams of rare isotopes for use in applications such as nuclear physics, nuclear astrophysics, atomic and condensed matter physics as well as medicine. At the time of the ISAC proposal submission, a number of facilities were either planned or under construction. In order to have an impact in the field, the requirements and specifications for the driver beam intensity on target was set to 100 μA, 500 MeV protons, which for ISAC results in a driver beam power of 50 kW.     

大型多色半导体发光显示屏幕

研制成总发光象素为122880个的多色半导体发光显示屏.探讨了发光象元结构对出光效率和光强角分布的影响及第三色控制问题.描述了采用三级计算机系统控制屏幕显示的硬件和软件特点.     

Improved design for SOI based evanescently coupled multilayer spot-size converter

We report an improved version of a spot-size converter (SSC) consisting of a silicon nanowire evanescently coupled to a phase-matched Poly-Si multilayer structure. With wider transversal dimensions the multilayer structure expands the mode significantly thus increasing the coupling efficiency with the conventional single-mode fiber. Detailed optimization process of a 17-layer based SSC is discussed and its coupling efficiency with a high-NA fiber of radius 2 μm is obtained as 98% providing only 0.087 dB loss. Vertical alignment tolerance between the optimized SSC and a high-NA fiber of radius 2 μm is also shown. This novel design does not consist of a taper and can be fabricated by using CMOS compatible process. It has a short device length and more relaxed alignment tolerances with the fiber. Full-vectorial and computationally efficient finite element method and the least squares boundary residual method have been used for the analysis and optimization of the proposed structure.     

Optical receiver with large-area photodiode for multilevel modulation

A large-diameter PIN photodiode (400 μm) with antireflection coating optimized for wavelength 650 nm was integrated with an automatic gain control transimpedance amplifier, linear post amplifier and 50Ω linear driver. The presented optical receiver shows a high linearity in receiving multilevel signals. A sensitivity of ?29.5dBm (BER = 10^?9) at 200 Mb/s with binary signal was achieved. By using four-level pulse amplitude modulation (4-PAM) a data rate of 400 Mb/s and a sensitivity of ?21.5 dBm (SER = 10^?9) was achieved.     

大面阵CMOS实时同步成像及显示系统的设计

为了能够实时成像和同步显示,设计了一种结构简单、携带方便的大面阵CMOS实时成像及显示系统,采用EPF10K50完成了MT9M413C36STM图像生成时序和SXGA显示时序及数据输出的多路转换设计.图像传感器的数据输出转换为两路,一路数据输出给处理电路进行图像实时处理;另一路经ADV7127视频数模变换后输出,可以连接SXGA形式的显示器同步显示图像.实验设计了相关硬件电路,并用VHDL语言编写了驱动程序,在Quartus 8.0的开发环境下,进行了调试.结果表明,该系统可以在1280×1024 @ 60Hz逐行扫描模式下稳定地工作.     

An Inverter-Based,CMOS, Low-Power Optical Receiver Front-End

In this paper, a low-power optical receiver front-end which consists of a transimpedance amplifier (TIA) and three stages of limiting amplifier (LA) for 2.5 Gb/s applications is proposed in 0.18 µm CMOS technology. The proposed TIA benefits from a modified inverter structure, in which the input resistance is properly reduced due to the use of diode-connected transistors in comparison with conventional inverter circuit. Also, an active inductor is used in parallel with a diode-connected transistor at the output node, which provides a low output resistance, while it resonates with the load capacitance to extend the ?3 dB frequency bandwidth. Moreover, three stages of LAs are used to obtain extra gain, in which each LA cell uses active inductor load. However, HSPICE simulations for the proposed TIA circuit show a 42.24 dBΩ transimpedance gain, 1.96 GHz frequency bandwidth, 11.7 pA/√Hz input referred noise, and only 972 µW of power consumption at 1.5 V supply. Also, simulation results for the whole receiver system show a 75.6 dB gain, 1.7 GHz frequency bandwidth, and 6.54 mW of power consumption at 1.5 V supply. Finally, simulation results indicate that the proposed receiver system has good performances to be used as a low-power optical receiver front-end.     

A 3D-CMOS compatible silicon photo-sensor with a large vertical photosensitive area

This paper introduces design and simulation of a three-dimensional complementary metal–oxide–semiconductor CMOS compatible photo-sensor based on a silicon substrate. In the structure of photo-sensor, a vertical n+/p junction as a photosensitive area is formed on one side of a U-groove, and perpendicular to a lateral n-i-p structure on top-side of the silicon surface. This configuration enables a direct butt-coupling of a fiber-optic to the photosensitive area, which is a privilege for many remote monitoring applications. The device analysis is carried out by a two-dimensional simulation using SILVACO TCAD simulator. The thickness of the photo-sensitive area is investigated by considering the figures of merit for the two different thicknesses of 30 and 50 µm. The simulated results (according to the parameters defined for the Si substrate) show a very low dark current of 70 and 100 (fA/μm) for the 30 and 50 µm thicknesses, respectively. In addition, a high photo-current to dark current ratio of ~3000 is achieved under an intensity of 2 mW/cm² at 633 nm wavelength, according to the wavelength of red He–Ne laser. The sensor demonstrates a responsivity of 0.33 A/W corresponding to 65% external quantum efficiency and a ?3 dB frequency response of 0.2 GHz under a small signal of 2 mW/cm² at 633 nm wavelength for 10 V reverse bias.     

Influence of H2O/DEZ ratio on LPCVD ZnO:B films for application in a-Si:H/μc-Si:H tandem solar cells

In this study, boron doped zinc oxide (ZnO:B) films were prepared at different water to diethyl zinc (H₂O/DEZ) flow ratios from 0.6 to 1.4 by a low pressure chemical vapor deposition (LPCVD) technique. It is found that the morphology of ZnO:B films varies from small leaf-like to pyramidal surface structures with the increasing H₂O/DEZ flow ratio. The rough ZnO:B films deposited at a relatively H₂O/DEZ flow ratio such as 1.2 or 1.4 show a high haze value of up to 28 % at 600 nm and $\mathrm{a} (11\overline{2}0)$ preferential crystallographic orientation. All ZnO:B films were applied in hydrogenated amorphous silicon/microcrystalline silicon tandem solar cells (a-Si:H/μc-Si:H) as front electrodes. The efficiency of the solar cells increases with the increasing H₂O/DEZ flow ratio, which is attributed to a high spectral response mainly in the long-wavelength range and the consequent enhancement of short-circuit current. A high-efficiency a-Si:H/μc-Si:H tandem solar cell of 10 % was achieved. The H₂O/DEZ ratio is an important process parameter to tune the material properties of LPCVD ZnO:B films and the performances of corresponding silicon thin film solar cells.     

Characteristics of laser and current pulses in a He–SrCl2 vapor laser

An experimental investigation on the characteristics of laser and current pulses in a He–SrCl₂ vapor laser is carried out. The temporal dependences of the discharge current pulse on the laser pulses at the 1.09 μm, ～3 μm and 6.45 μm lines in strontium atoms and ions are measured and analyzed under different laser output powers. It is found that all laser pulses appear at the falling edge of the current pulse and shift forward to the current pulse with increasing laser output power.     

大面阵CMOS实时同步成像及显示系统的设计

为了能够实时成像和同步显示,设计了一种结构简单、携带方便的大面阵CMOS实时成像及显示系统,采用EPF10K50完成了MT9M413C36STM图像生成时序和SXGA显示时序及数据输出的多路转换设计.图像传感器的数据输出转换为两路,一路数据输出给处理电路进行图像实时处理;另一路经ADV7127视频数模变换后输出,可以连接SXGA形式的显示器同步显示图像.实验设计了相关硬件电路,并用VHDL语言编写了驱动程序,在Quartus 8.0的开发环境下,进行了调试.结果表明,该系统可以在1280×1024@60Hz逐行扫描模式下稳定地工作.     

The all-solid-state battery with vanadate glass-ceramic cathode

The Ga-Ag-Li|Li₇La₃Zr_1.89Al_0.15O₁₂|(Li₂O–B₂O₃–V₂O₅ + Fe) all-solid-state electrochemical cell has been designed with a simple sintering process. The Li₇La₃Zr_1.89Al_0.15O₁₂ solid electrolyte was prepared by sol-gel method. The lithium borovanadate glass was obtained by a convenient melt quenching technique. Cycliс voltammetry has shown that the current densities of the cell at 300 °C can reach several hundreds of μA cm^?2. At this temperature, the single cell voltage is about 3.2 and 0.8 V in the charged and discharged state, correspondingly. This cell produces a current enough to make a single LED of white color working. The cell surface discharge capacity exceeds 230 μAh cm^?2.     

Numerical simulation of low loss silicon photonic wire waveguide with multiple cladding layers

A different silicon photonic wire waveguide is proposed, which uses multiple thin cladding layers in order to reduce the index contrast between core and cladding interface. The reduced index contrast in the proposed waveguide has led to reduction in the scattering losses by 37% as compared to silicon wire waveguide for 400 nm × 220 nm waveguide dimension. The proposed waveguide has shown significant reduction in bending losses. It offers the bending loss of 0.0118 dB at the radius of 1 μm and 0.0063 dB for a radius of 2 μm at 1.55 μm wavelength as compared to 0.086 and 0.013 dB at the radius of 1 and 2 μm, respectively, offered by silicon photonic wire waveguide at 1.5 μm wavelength. The use of polymer material as top cladding layer resulted in decreasing the sensitivity of effective index against temperature for the designed waveguide by a factor of 2 as compared to silicon wire waveguide.