The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.     

Forward and reverse bias current-voltage characteristics of Au/n-Si Schottky barrier diodes with and without SnO2 insulator layer

The effects of interfacial insulator layer, interface states (N_ss) and series resistance (R_s) on the electrical characteristics of Au/n-Si structures have been investigated using forward and reverse bias current-voltage (I-V) characteristics at room temperature. Therefore, Au/n-Si Schottky barrier diodes (SBDs) were fabricated as SBDs with and without insulator SnO₂ layer to explain the effect of insulator layer on main electrical parameters. The values of ideality factor (n), R_s and barrier height (Φ_Bo) were calculated from ln(I) vs. V plots and Cheung methods. The energy density distribution profile of the interface states was obtained from the forward bias I-V data by taking bias dependence of ideality factor, effective barrier height (Φ_e) and R_s into account for MS and MIS SBDs. It was found that N_ss values increase from at about mid-gap energy of Si to bottom of conductance band edge of both SBDs and the MIS SBD’s N_ss values are 5-10 times lower than those of MS SBD’s. An apparent exponential increase from the mid-gap towards the bottom of conductance band is observed for both SBDs’ (MS and MIS) interface states obtained without taking R_s into account.     

Current-voltage characteristics of Au/GaN/GaAs structure

Au/GaN/n-GaAs structure has been fabricated by the electrochemically anodic nitridation method for providing an evidence of achievement of stable electronic passivation of n-doped GaAs surface. The change of the electronic properties of the GaAs surface induced by the nitridation process has been studied by means of current-voltage (I-V) characterizations on Schottky barrier diodes (SBDs) shaped on gallium nitride/gallium arsenide structure. Au/GaN/n-GaAs Schottky diode that showed rectifying behavior with an ideality factor value of 2.06 and barrier height value of 0.73 eV obeys a metal-interfacial layer-semiconductor (MIS) configuration rather than an ideal Schottky diode due to the existence of GaN at the Au/GaAs interfacial layer. The formation of the GaN interfacial layer for the stable passivation of gallium arsenide surface is investigated through calculation of the interface state density N_ss with and without taking into account the series resistance R_s. While the interface state density calculated without taking into account R_s has increased exponentially with bias from 2.2×10¹² cm⁻² eV⁻¹ in (E_c−0.48) eV to 3.85×10¹² cm⁻² eV⁻¹ in (E_c−0.32) eV of n-GaAs, the N_ss obtained taking into account the series resistance has remained constant with a value of 2.2×10¹² cm⁻² eV⁻¹ in the same interval. This has been attributed to the passivation of the n-doped GaAs surface with the formation of the GaN interfacial layer.     

Current conduction mechanism in Al/p-Si Schottky barrier diodes with native insulator layer at low temperatures

The forward bias current-voltage (I-V) characteristics of Al/p-Si (MS) Schottky diodes with native insulator layer were measured in the temperature range of 80-300 K. The obtained zero bias barrier height Φ_B0(I-V), ideality factor (n) and series resistance (R_s) determined by using thermionic emission (TE) mechanism show strong temperature dependence. There is a linear correlation between the Φ_B0(I-V) and n because of the inhomogeneties in the barrier heights (BHs). Calculated values from temperature dependent I-V data reveal an unusual behaviour such that the Φ_B0 decreases, as the n and R_s values are increasing with decreasing absolute temperature, and these changes are more pronounced especially at low temperatures. Such temperature dependence of BH is contradictory with the reported negative temperature coefficient of the barrier height. In order to explain this behaviour we have reported a modification in the expression reverse saturation current I_o including the n and the tunnelling factor (αΧ^1/2δ) estimated to be 15.5. Therefore, corrected effective barrier height Φ_bef.(I-V) versus temperature has a negative temperature coefficients (α = −2.66 × 10⁻⁴ eV/K) and it is in good agreement with negative temperature coefficients (α = −4.73 × 10⁻⁴ eV/K) of Si band gap. In addition, the temperature dependent energy distribution of interface states density N_ss profiles was obtained from the forward bias I-V measurements by taking into account the bias dependence of the Φ_e and n. The forward bias I-V characteristics confirm that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that the current conduction mechanism of MS Schottky diodes.     

The effect of PVA (Bi2O3-doped) interfacial layer and series resistance on electrical characteristics of Au/n-Si (110) Schottky barrier diodes (SBDs)

Two types of Schottky Barrier Diodes (SBDs) with and without PVA (Bi₂O₃-doped) polymeric interfacial layer, were fabricated and measured at room temperature in order to investigate the effects of the PVA (Bi₂O₃-doped) interfacial layer on the main electrical parameters such as the ideality factor (n), zero-bias barrier height (Φ_B0), series resistance (R_s) and interface-state density (N_ss). Electrical parameters of these two diodes were calculated from the current-voltage (I-V) characteristics and compared with each other. The values of Φ_B0, n and R_s for SBDs without polymeric interfacial layer are 0.71 eV, 1.44 and 4775 Ω, respectively. The values of Φ_B0, n and R_s for SBDs with PVA (Bi₂O₃-doped) polymeric interfacial layer are 0.74 eV, 3.49 and 10,030 Ω, respectively. For two SBDs, the energy density distribution profiles of interface states (N_ss) were obtained from forward-bias I-V measurements by taking the bias dependence of R_s of these devices into account. The values of N_ss obtained for the SBD with PVA (Bi₂O₃-doped) polymeric interfacial layer are smaller than those of the SBD without polymeric interfacial layer.     

Investigation of diode parameters using I-V and C-V characteristics of In/SiO2/p-Si (MIS) Schottky diodes

A study on interface states density distribution and characteristic parameters of the In/SiO₂/p-Si (MIS) capacitor has been made. The thickness of the SiO₂ film obtained from the measurement of the corrected capacitance in the strong accumulation region for MIS Schottky diodes was 220 Å. The diode parameters from the forward bias I-V characteristics such as ideality factor, series resistance and barrier heights were found to be 1.75, 106-112 Ω and 0.592 eV, respectively. The energy distribution of the interface state density D_it was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. The interface state density obtained using the I-V characteristics had an exponential growth, with bias towards the top of the valance band, from 9.44×10¹³ eV⁻¹ cm⁻² in 0.329-E_v eV to 1.11×10¹³ eV⁻¹ cm⁻² in 0.527-E_v eV at room temperature. Furthermore, the values of interface state density D_it obtained by the Hill-Coleman method from the C-V characteristics range from 52.9×10¹³ to 1.11×10¹³ eV⁻¹ cm⁻² at a frequency range of 30kHz-1 MHz. These values of D_it and R_s were responsible for the non-ideal behaviour of I-V and C-V characteristics.     

Effect of series resistance and interface states on the I-V, C-V and G/ω-V characteristics in Au/Bi-doped polyvinyl alcohol (PVA)/n-Si Schottky barrier diodes at room temperature

The forward and reverse bias current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Au/PVA (Bi-doped)/n-Si Schottky barrier diodes (SBDs) have been investigated at room temperature by taking the interface states (N_ss) and series resistance (R_s) effects into account. The voltage dependent profiles of resistance (R_i) were obtained from both the I-V and C/G-V measurements by using Ohm’s Law and Nicollian methods. The obtained values of R_i with agreement each other especially at sufficiently high bias voltages which correspond the value of R_s of the diode. Therefore, the energy density distribution profile of N_ss was obtained from the forward bias I-V data taking the bias dependence of the effective barrier height (BH) Φ_e and R_s into account. The high value of ideality factor (n) was attributed to high density of N_ss and interfacial polymer layer at metal/semiconductor (M/S) interface. In order to examine the frequency dependence of some of the electrical parameters such as doping donor concentration (N_D), Φ_e, R_s and N_ss values, C-V and G/ω-V measurements of the diode were performed at room temperature in the frequency range of 50 kHz-5 MHz. Experimental results confirmed that the N_ss, R_s and interfacial layer are important parameters that influence electrical characteristics of SBD.     

The effect of gamma irradiation on electrical and dielectric properties of Al-TiW-Pd2Si/n-Si Schottky diode at room temperature

The effects of ⁶⁰Co (γ-ray) irradiation on the electrical and dielectric properties of Al-TiW-Pd₂Si/n-Si Schottky diodes (SDs) have been investigated by using capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements at room temperature and 500 KHz. The corrected capacitance and conductance values were obtained by eliminating the effect of series resistance (R_s) on the measured capacitance (C_m) and conductance (G_m) values. The high-low frequency capacitance (CHF-CLF) method given in [12] as N_ss = (1/qA) [((1/C_LF) − (1/C_ox))⁻¹ −  ((1/C_HF) − (1/C_ox))⁻¹] was successfully adapted to the before-after irradiation capacitance given in this report as N_ss = (1/qA) [((1/C_bef) − (1/C_ox))⁻¹ − ((1/C_after) − (1/C_ox))⁻¹] for the analyzing the density of interface states. The N_ss-V plots give a distinct peak corresponding to localized interface states regions at metal and semiconductor interface. The experimental values of the ac electrical conductivity (σ_ac), the real (M′) and imaginary (M″) parts of the electrical modulus were found to be strong functions of radiation and applied bias voltage, especially in the depletion and accumulation regions. The changes in the dielectric properties in the depletion and accumulation regions stem especially from the restructuring and reordering of the charges at interface states and surface polarization whereas those in the accumulation region are caused by series resistance effect.     

Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes

In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R_S), the ideality factor (n) and the barrier height (Φ_b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (Φ_b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R_S) between 12.594 and 12.950 kΩ. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.     

The effect of series resistance and interface states on the frequency dependent C–V and G/w–V characteristics of Al/perylene/p-Si MPS type Schottky barrier diodes

The capacitance–voltage–frequency (C–V–f) and conductance–voltage–frequency (G/w–V–f) characteristics of Al/perylene/p-Si Schottky barrier diodes (SBDs) fabricated with spin coating system have been investigated in the frequency range of 30 kHz–2 MHz at room temperature. In order to elucidate the electrical characteristics of SBDs with perylene interface, the voltage and frequency dependent series resistance (R_s), frequency dependent density distribution profile of interface state (N_ss) were obtained. The measurements of C and G/w were found to be strongly dependent on bias voltage and frequency for Al/perylene/p-Si SBDs. For each frequency, the R_s–V plot gives a peak, decreasing with increasing frequencies. Also, it has been shown that the interface states density exponentially decreases with increasing frequency. The C–V–f and G/w–V–f characteristics confirm that the N_ss and R_s of the diode are important parameters that strongly influence the electric parameters in metal/polymer/semiconductor (MPS) structure.     

Electrical and interface characteristics of nanocrystalline n-Zn0.5Cd0.5S/p-Cu2S heterojunction structure prepared by dip coating

Nanocrystalline of n-Zn_0.5Cd_0.5S/p-Cu₂S heterojunctions were successfully prepared by the dip coating method. The surface morphology and the composition analysis were made by scanning electron microscopy (SEM) and energy dispersive x-ray (EDX) technique, respectively. Temperature dependent current–voltage characteristics of the heterojunctions were measured in the temperature range 300–400 K with a step of 25 K. The current–voltage (I–V) characteristics exhibit electrical rectification behavior. The zero bias barrier height (Φ_B0) and the ideality factor (n) are affected by temperature. Interface states at the n-Zn_0.5Cd_0.5S/p-Cu₂S heterojunction play a crucial role in determining the electrical characteristics of the heterojunction. The high value of n can be ascribed to the presence of an interfacial layer. The energy distribution profile of the density of interface states (N_ss) was extracted from the forward bias I–V measurements using the width of the depletion region deduced from the capacitance -voltage characteristics at high frequency (1MHz).     

Current transport mechanism in Al/Si3N4/p-Si (MIS) Schottky barrier diodes at low temperatures

The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (Al/Si₃N₄/p-Si) Schottky barrier diodes (SBDs) were measured in the temperature range of 80-300 K. By using the thermionic emission (TE) theory, the zero-bias barrier height Φ_B0 calculated from I-V characteristics was found to increase with increasing temperature. Such temperature dependence is an obvious disagreement with the negative temperature coefficient of the barrier height calculated from C-V characteristics. Also, the ideality factor decreases with increasing temperature, and especially the activation energy plot is nonlinear at low temperatures. Such behaviour is attributed to Schottky barrier inhomogeneties by assuming a Gaussian distribution of barrier heights (BHs) at interface. We attempted to draw a Φ_B0 versus q/2kT plot to obtain evidence of a Gaussian distribution of the BHs, and the values of Φ_Bo = 0.826 eV and α_o = 0.091 V for the mean barrier height and standard deviation at zero-bias, respectively, have been obtained from this plot. Thus, a modified ln(I_o/T²) − q²σ_o²/2(kT)² versus q/kT plot gives Φ_B0 and Richardson constant A^* as 0.820 eV and 30.273 A/cm² K², respectively, without using the temperature coefficient of the barrier height. This value of the Richardson constant 30.273 A/cm² K² is very close to the theoretical value of 32 A/cm² K² for p-type Si. Hence, it has been concluded that the temperature dependence of the forward I-V characteristics of the Al/Si₃N₄/p-Si Schottky barrier diodes can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights. In addition, the temperature dependence of energy distribution of interface state density (N_SS) profiles was determined from the forward I-V measurements by taking into account the bias dependence of the effective barrier height and ideality factor.     

Some electrical and structural properties of Cd/CdS/n–Si/Au–Sb sandwich structure

In view of CdS growth is very impotent for technological importance especially solar applications; synthesis of this material remains a topic of great interest for researchers by means of an economically and technically viable method. In the present paper, Cd/CdS/n–Si/Au–Sb sandwich structure has been grown by Successive Ionic Layer Adsorption and Reaction (SILAR) technique. For investigating the structural properties, X-ray diffraction (XRD), scanning electron microscopy (SEM) and energy dispersive X-ray analysis (EDAX) measurements have been performed and it has been seen that films exhibit polycrystalline behavior. The capacitance–voltage (C–V) and conductance/w-voltage (G/w–V) characteristics of Cd/CdS/n–Si/Au–Sb structure have been investigated by considering series resistance and interface states effects. These measurements have been done in the −4 V, 4 V voltage range and in the frequency range of 10 kHz–3 MHz at room temperature. It is seen that, the series resistance (R_s) and interface state density have been strongly depend on frequency. The barrier height, donor concentration, diffusion potential parameters have been determined from the linear C⁻²–V plot. The barrier height values are obtained between 0.495 and 0.796 eV and doping density values have been ranged from 1.455 × 10¹⁴ to 1.999 × 10¹⁴ cm⁻³respectively. The capacitance–frequency (C–f) and conductance/w-frequency (G/w–f) characteristics of Cd/CdS/n–Si/Au–Sb structures have been measured at the various biases 0.00–0.14 V at room temperature. The energy distribution of the interface states (N_ss) and their relaxation time (τ) have been determined from the forward bias capacitance–frequency characteristics. The N_ss and τ values have ranged from 2.01 × 10¹² cm⁻² eV⁻¹and 9.68 × 10⁻⁴ s in (Ec-0.45) eV–2.86 × 10¹³ cm⁻² eV⁻¹ and 3.81 × 10⁻⁴ s in (Ec-0.75) eV, respectively.     

Electronic and interface state density distribution properties of Ag/p-Si Schottky diode

Electronic and interface state distribution properties of Ag/p-Si Schottky diode have been investigated. The diode indicates non-ideal current-voltage behavior with an ideality factor greater than unity. The capacitance-voltage (C-V) characteristic is linear in reverse bias indicating rectification behavior and charge density within depletion layer is uniform. From I-V and C-V characteristics, junction parameters such as diode ideality factor and barrier height were found as 1.66 and ?_B(I-V) = 0.84 eV (?_B(C-V) = 0.90 eV), respectively. The interface state density N_ss and relaxation time τ of the Schottky diode were determined by means of Schottky capacitance spectroscopy method. The results show the presence of thin interfacial layer between the metal and semiconductor.     

The importance of the series resistance in calculating the characteristic parameters of the Schottky contacts

Cd/p-Si Schottky barrier diodes (SBDs) with and without the native oxide layer have been fabricated to determine the importance of the fact that the series resistance value is considered in calculating the interface state density distribution (ISDD) from the forward bias current-voltage (I-V) characteristics of the Cd/p-Si SBDs. The statistical analysis yielded mean values of 0.71 ± 0.02 eV and 1.24 ± 0.12 for the BH and ideality factor of the Cd/p-Si SBDs (15 dots) without the native oxide layer (MS), respectively, and mean values of 0.79 ± 0.02 eV and 1.36 ± 0.06 eV for the Cd/p-Si SBDs (28 dots) with the native oxide layer (metal-insulating layer-semiconductor (MIS)). The interface state density (Nss) distributions of the devices were calculated taking into account their series resistance values. At the same energy position near the top of the valence band, the interface state density values without taking into account the series resistance value of the devices are almost one order of magnitude larger than Nss obtained taking into account series resistance value.     

Electrical and dielectric properties of Al/HfO2/p-Si MOS device at high temperatures

The temperature dependence of capacitance–voltage (C–V) and conductance–voltage (G/w–V) characteristics of Al/HfO₂/p-Si metal-oxide-semiconductor (MOS) device has been investigated by considering the effect of series resistance (R_s) and interface state density (N_ss) over the temperature range of 300–400 K. The C–V and G/w–V characteristics confirm that the N_ss and R_s of the diode are important parameters that strongly influence the electric parameters in MOS device. It is found that in the presence of series resistance, the forward bias C–V plots exhibits a peak, and its position shifts towards lower voltages with increasing temperature. The density of N_ss, depending on the temperature, was determined from the (C–V) and (G/w–V) data using the Hill–Coleman Method. Also, the temperature dependence of dielectric properties at different fixed frequencies over the temperature range of 300–400 K was investigated. In addition, the electric modulus formalisms were employed to understand the relaxation mechanism of the Al/HfO₂/p-Si structure.     

Effect of series resistance on the performance of silicon Schottky diode in the presence of tin oxide layer

The current–voltage (I–V) characteristics of Al/SnO₂/p-Si (MIS) Schottky diodes prepared by means of spray deposition method have been measured at 80, 295 and 350 K. In order to interpret the experimentally observed non-ideal Al/SnO₂/p-Si Schottky diode parameters such as, the series resistance R_s, barrier height Φ_B and ideality factor n, a novel calculation method has been reported by taking into account the applied voltage drop across interfacial oxide layer V_i and ideality factor n in the current transport mechanism. The values obtained for V_i were subtracted from the applied voltage values V and then the values of R_s were recalculated. The parameters obtained by accounting for the voltage drop V_i have been compared with those obtained without considering the above voltage drop. It is shown that the values of R_s estimated from Cheung’s method were strongly temperature-dependent and decreased with increasing temperature. It is shown that the voltage drop across the interfacial layer will increase the ideality factor and the voltage dependence of the I–V characteristics. The interface state density N_ss of the diodes has an exponential growth with bias towards the top of the valance band for each temperature; for example, from 2.37 × 10¹³ eV⁻¹ cm⁻² in 0.70−E_v eV to 7.47 × 10¹³ eV⁻¹ cm⁻² in 0.62−E_v eV for 295 K. The mean N_ss estimated from the I–V measurements decreased with increasing the temperature from 8.29 × 10¹³ to 2.20 × 10¹³ eV⁻¹ cm⁻².     

Two diodes model and illumination effect on the forward and reverse bias I–V and C–V characteristics of Au/PVA (Bi-doped)/n-Si photodiode at room temperature

The forward and reverse bias current–voltage (I–V), capacitance/conductance–voltage (C/G–V) characteristics of the fabricated Au/PVA (Bi-doped)/n-Si photodiode have been investigated both in dark and under 250 W illumination intensity at room temperature. The energy density distribution profile of N_ss was extracted from the forward bias I–V measurements by taking the voltage dependence of effective barrier height (Φ_e) and R_s for photodiode both in dark and under 250 W illumination cases. The exponential growth of the N_ss from midgap toward the bottom of the conductance band is very apparent for two cases. The obtained high value of n and R_s were attributed to the particular distribution of N_ss at metal/PVA interface, surface and fabrication processes, barrier inhomogeneity of interfacial polymer layer and the form of barrier height at M/S interface. While the values of C and G/w increase R_s and R_sh decrease under illumination, due to the illumination induced electron–hole pairs in depletion region. The voltage dependent N_ss profile was also obtained from the dark and illumination capacitance at 1 MHz and these values of N_ss are in good agreement. In addition, the fill factor (FF) under 250 W illumination level was found as 28.5% and this value of FF may be accepted sufficiently high. Thus, the fabricated Au/PVA (Bi-doped)/n-Si structures are more sensitive to light, proposing them as a good candidate as a photodiode or capacitance sensor for optoelectronic applications in modern electronic industry.     

Analysis of interface states and series resistance for Al/PVA:n-CdS nanocomposite metal–semiconductor and metal–insulator–semiconductor diode structures

This paper presents the fabrication and characterization of Al/PVA:n-CdS (MS) and Al/Al₂O₃/PVA:n-CdS (MIS) diode. The effects of interfacial insulator layer, interface states (N _ss ) and series resistance (R _s ) on the electrical characteristics of Al/PVA:n-CdS structures have been investigated using forward and reverse bias I–V, C–V, and G/w–V characteristics at room temperature. Al/PVA:n-CdS diode is fabricated with and without insulator Al₂O₃ layer to explain the effect of insulator layer on main electrical parameters. The values of the ideality factor (n), series resistance (R _s ) and barrier height (? _b ) are calculated from ln(I) vs. V plots, by the Cheung and Norde methods. The energy density distribution profile of the interface states is obtained from the forward bias I–V data by taking into account the bias dependence ideality factor (n(V)) and effective barrier height (? _e ) for MS and MIS diode. The N _ss values increase from mid-gap energy of CdS to the bottom of the conductance band edge for both MS and MIS diode.     

Interface properties of an O2 annealed Au/Ni/n-Al0.18Ga0.82N Schottky contact

We oxidized a Ni/Au metal bi-layer contact fabricated on HVPE Al_0.18Ga_0.82N from 373 K to 573 K in 100 K steps. In the range 1 kHz to 2 MHz, the Capacitance–Voltage–Frequency (C–V–f) measurements reveal a frequency dispersion of the capacitance and the presence of an anomalous peak at 0.4 V owing to the presence of interface states in the as deposited contact system. The dispersion was progressively removed by O₂ anneals from temperatures as low as 373 K. These changes are accompanied by an improvement in the overall quality of the Schottky system: the ideality factor, n, improves from 2.09 to 1.26; the Schottky barrier height (SBH), determined by the Norde [1] method, increases from 0.72 eV to 1.54 eV. From the Nicollian and Goetzberger model [2], we calculated the energy distribution of the density of interface states, N_SS. Around 1 eV above the Al_0.18Ga_0.82N valence band, N_SS, decreases from 2.3×10¹² eV⁻¹ cm⁻² for the un-annealed diodes to 1.3×10¹² eV⁻¹ cm⁻² after the 573 K anneal. Our results suggest the formation of an insulating NiO leading to a MIS structure for the oxidized Au/Ni/Al_0.18Ga_0.82N contact.